3b3509859c51dd4f1c9f1fbec047ba4e5188c2be
[openwrt/staging/yousong.git] / target / linux / lantiq / patches-3.10 / 0010-MIPS-lantiq-wifi-and-ethernet-eeprom-handling.patch
1 From 591a9bdde1fa9aa6f1c6132ea04771bb1dcd6180 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 13 Mar 2013 10:02:58 +0100
4 Subject: [PATCH 18/22] owrt: lantiq: wifi and ethernet eeprom handling
5
6 ---
7 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h | 6 +
8 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 +
9 arch/mips/lantiq/xway/Makefile | 3 +
10 arch/mips/lantiq/xway/ath_eep.c | 248 ++++++++++++++++++++
11 arch/mips/lantiq/xway/eth_mac.c | 76 ++++++
12 arch/mips/lantiq/xway/pci-ath-fixup.c | 109 +++++++++
13 arch/mips/lantiq/xway/rt_eep.c | 60 +++++
14 arch/mips/pci/pci-lantiq.c | 2 +-
15 8 files changed, 506 insertions(+), 1 deletion(-)
16 create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
17 create mode 100644 arch/mips/lantiq/xway/ath_eep.c
18 create mode 100644 arch/mips/lantiq/xway/eth_mac.c
19 create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
20 create mode 100644 arch/mips/lantiq/xway/rt_eep.c
21
22 --- /dev/null
23 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
24 @@ -0,0 +1,6 @@
25 +#ifndef _PCI_ATH_FIXUP
26 +#define _PCI_ATH_FIXUP
27 +
28 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
29 +
30 +#endif /* _PCI_ATH_FIXUP */
31 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
32 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
33 @@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev,
34 extern void ltq_pmu_enable(unsigned int module);
35 extern void ltq_pmu_disable(unsigned int module);
36
37 +/* allow the ethernet driver to load a flash mapped mac addr */
38 +const u8* ltq_get_eth_mac(void);
39 +
40 #endif /* CONFIG_SOC_TYPE_XWAY */
41 #endif /* _LTQ_XWAY_H__ */
42 --- a/arch/mips/lantiq/xway/Makefile
43 +++ b/arch/mips/lantiq/xway/Makefile
44 @@ -2,4 +2,7 @@ obj-y := prom.o sysctrl.o clk.o reset.o
45
46 obj-y += vmmc.o
47
48 +obj-y += eth_mac.o
49 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
50 +
51 obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
52 --- /dev/null
53 +++ b/arch/mips/lantiq/xway/ath_eep.c
54 @@ -0,0 +1,271 @@
55 +/*
56 + * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
57 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
58 + * Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
59 + * Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
60 + * Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
61 + *
62 + * This program is free software; you can redistribute it and/or modify it
63 + * under the terms of the GNU General Public License version 2 as published
64 + * by the Free Software Foundation.
65 + */
66 +
67 +#include <linux/init.h>
68 +#include <linux/module.h>
69 +#include <linux/platform_device.h>
70 +#include <linux/etherdevice.h>
71 +#include <linux/ath5k_platform.h>
72 +#include <linux/ath9k_platform.h>
73 +#include <linux/pci.h>
74 +#include <linux/err.h>
75 +#include <linux/mtd/mtd.h>
76 +#include <pci-ath-fixup.h>
77 +#include <lantiq_soc.h>
78 +
79 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
80 +struct ath5k_platform_data ath5k_pdata;
81 +struct ath9k_platform_data ath9k_pdata = {
82 + .led_pin = -1,
83 +};
84 +static u8 athxk_eeprom_mac[6];
85 +
86 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
87 +{
88 + dev->dev.platform_data = &ath9k_pdata;
89 + return 0;
90 +}
91 +
92 +static int ath9k_eep_load;
93 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
94 +{
95 + struct device_node *np = pdev->dev.of_node, *mtd_np;
96 + struct resource *eep_res, *mac_res = NULL;
97 + void __iomem *eep, *mac;
98 + int mac_offset;
99 + u32 mac_inc = 0, pci_slot = 0;
100 + int i;
101 + struct mtd_info *the_mtd;
102 + size_t flash_readlen;
103 + const __be32 *list;
104 + const char *part;
105 + phandle phandle;
106 +
107 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
108 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
109 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
110 + of_get_property(mtd_np, "label", NULL)) || (part =
111 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
112 + != ERR_PTR(-ENODEV)) {
113 + i = mtd_read(the_mtd, be32_to_cpup(list),
114 + ATH9K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
115 + (void *) ath9k_pdata.eeprom_data);
116 + put_mtd_device(the_mtd);
117 + if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
118 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
119 + return -ENODEV;
120 + }
121 + } else {
122 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
123 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
124 +
125 + if (!eep_res) {
126 + dev_err(&pdev->dev, "failed to load eeprom address\n");
127 + return -ENODEV;
128 + }
129 + if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS << 1) {
130 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
131 + return -EINVAL;
132 + }
133 +
134 + eep = ioremap(eep_res->start, resource_size(eep_res));
135 + memcpy_fromio(ath9k_pdata.eeprom_data, eep,
136 + ATH9K_PLAT_EEP_MAX_WORDS << 1);
137 + }
138 +
139 + if (of_find_property(np, "ath,eep-swap", NULL))
140 + for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
141 + ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
142 +
143 + if (of_find_property(np, "ath,eep-endian", NULL)) {
144 + ath9k_pdata.endian_check = true;
145 +
146 + dev_info(&pdev->dev, "endian check enabled.\n");
147 + }
148 +
149 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
150 + memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data + mac_offset, 6);
151 + } else if (mac_res) {
152 + if (resource_size(mac_res) != 6) {
153 + dev_err(&pdev->dev, "mac has an invalid size\n");
154 + return -EINVAL;
155 + }
156 + mac = ioremap(mac_res->start, resource_size(mac_res));
157 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
158 + } else if (ltq_get_eth_mac())
159 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
160 + else {
161 + dev_warn(&pdev->dev, "using random mac\n");
162 + random_ether_addr(athxk_eeprom_mac);
163 + }
164 +
165 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
166 + athxk_eeprom_mac[5] += mac_inc;
167 +
168 + ath9k_pdata.macaddr = athxk_eeprom_mac;
169 + ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
170 +
171 + if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
172 + ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
173 +
174 + dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
175 + if (ath9k_eep_load) {
176 + struct pci_dev *d = NULL;
177 + while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
178 + PCI_ANY_ID, d)) != NULL)
179 + pci_fixup_device(pci_fixup_early, d);
180 + }
181 +
182 + }
183 +
184 + dev_info(&pdev->dev, "loaded ath9k eeprom\n");
185 +
186 + return 0;
187 +}
188 +
189 +static struct of_device_id ath9k_eeprom_ids[] = {
190 + { .compatible = "ath9k,eeprom" },
191 + { }
192 +};
193 +
194 +static struct platform_driver ath9k_eeprom_driver = {
195 + .driver = {
196 + .name = "ath9k,eeprom",
197 + .owner = THIS_MODULE,
198 + .of_match_table = of_match_ptr(ath9k_eeprom_ids),
199 + },
200 +};
201 +
202 +static int __init of_ath9k_eeprom_init(void)
203 +{
204 + int ret = platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
205 +
206 + if (ret)
207 + ath9k_eep_load = 1;
208 +
209 + return ret;
210 +}
211 +
212 +static int __init of_ath9k_eeprom_init_late(void)
213 +{
214 + if (!ath9k_eep_load)
215 + return 0;
216 + return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
217 +}
218 +late_initcall(of_ath9k_eeprom_init_late);
219 +subsys_initcall(of_ath9k_eeprom_init);
220 +
221 +
222 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
223 +{
224 + dev->dev.platform_data = &ath5k_pdata;
225 + return 0;
226 +}
227 +
228 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
229 +{
230 + struct device_node *np = pdev->dev.of_node, *mtd_np;
231 + struct resource *eep_res, *mac_res = NULL;
232 + void __iomem *eep, *mac;
233 + int mac_offset;
234 + u32 mac_inc = 0;
235 + int i;
236 + struct mtd_info *the_mtd;
237 + size_t flash_readlen;
238 + const __be32 *list;
239 + const char *part;
240 + phandle phandle;
241 +
242 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
243 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
244 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
245 + of_get_property(mtd_np, "label", NULL)) || (part =
246 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
247 + != ERR_PTR(-ENODEV)) {
248 + i = mtd_read(the_mtd, be32_to_cpup(list),
249 + ATH5K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
250 + (void *) ath5k_pdata.eeprom_data);
251 + put_mtd_device(the_mtd);
252 + if ((sizeof(ATH5K_PLAT_EEP_MAX_WORDS << 1) != flash_readlen)
253 + || i) {
254 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
255 + return -ENODEV;
256 + }
257 + } else {
258 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
259 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
260 +
261 + if (!eep_res) {
262 + dev_err(&pdev->dev, "failed to load eeprom address\n");
263 + return -ENODEV;
264 + }
265 + if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS << 1) {
266 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
267 + return -EINVAL;
268 + }
269 +
270 + eep = ioremap(eep_res->start, resource_size(eep_res));
271 + ath5k_pdata.eeprom_data = kmalloc(ATH5K_PLAT_EEP_MAX_WORDS<<1,
272 + GFP_KERNEL);
273 + memcpy_fromio(ath5k_pdata.eeprom_data, eep,
274 + ATH5K_PLAT_EEP_MAX_WORDS << 1);
275 + }
276 +
277 + if (of_find_property(np, "ath,eep-swap", NULL))
278 + for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
279 + ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
280 +
281 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
282 + memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
283 + } else if (mac_res) {
284 + if (resource_size(mac_res) != 6) {
285 + dev_err(&pdev->dev, "mac has an invalid size\n");
286 + return -EINVAL;
287 + }
288 + mac = ioremap(mac_res->start, resource_size(mac_res));
289 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
290 + } else if (ltq_get_eth_mac())
291 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
292 + else {
293 + dev_warn(&pdev->dev, "using random mac\n");
294 + random_ether_addr(athxk_eeprom_mac);
295 + }
296 +
297 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
298 + athxk_eeprom_mac[5] += mac_inc;
299 +
300 + ath5k_pdata.macaddr = athxk_eeprom_mac;
301 + ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
302 +
303 + dev_info(&pdev->dev, "loaded ath5k eeprom\n");
304 +
305 + return 0;
306 +}
307 +
308 +static struct of_device_id ath5k_eeprom_ids[] = {
309 + { .compatible = "ath5k,eeprom" },
310 + { }
311 +};
312 +
313 +static struct platform_driver ath5k_eeprom_driver = {
314 + .driver = {
315 + .name = "ath5k,eeprom",
316 + .owner = THIS_MODULE,
317 + .of_match_table = of_match_ptr(ath5k_eeprom_ids),
318 + },
319 +};
320 +
321 +static int __init of_ath5k_eeprom_init(void)
322 +{
323 + return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
324 +}
325 +device_initcall(of_ath5k_eeprom_init);
326 --- /dev/null
327 +++ b/arch/mips/lantiq/xway/eth_mac.c
328 @@ -0,0 +1,76 @@
329 +/*
330 + * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
331 + *
332 + * This program is free software; you can redistribute it and/or modify it
333 + * under the terms of the GNU General Public License version 2 as published
334 + * by the Free Software Foundation.
335 + */
336 +
337 +#include <linux/init.h>
338 +#include <linux/module.h>
339 +#include <linux/of_platform.h>
340 +#include <linux/if_ether.h>
341 +
342 +static u8 eth_mac[6];
343 +static int eth_mac_set;
344 +
345 +const u8* ltq_get_eth_mac(void)
346 +{
347 + return eth_mac;
348 +}
349 +
350 +static int __init setup_ethaddr(char *str)
351 +{
352 + eth_mac_set = mac_pton(str, eth_mac);
353 + return !eth_mac_set;
354 +}
355 +__setup("ethaddr=", setup_ethaddr);
356 +
357 +int __init of_eth_mac_probe(struct platform_device *pdev)
358 +{
359 + struct device_node *np = pdev->dev.of_node;
360 + struct resource *mac_res;
361 + void __iomem *mac;
362 + u32 mac_inc = 0;
363 +
364 + if (eth_mac_set) {
365 + dev_err(&pdev->dev, "mac was already set by bootloader\n");
366 + return -EINVAL;
367 + }
368 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
369 +
370 + if (!mac_res) {
371 + dev_err(&pdev->dev, "failed to load mac\n");
372 + return -EINVAL;
373 + }
374 + if (resource_size(mac_res) != 6) {
375 + dev_err(&pdev->dev, "mac has an invalid size\n");
376 + return -EINVAL;
377 + }
378 + mac = ioremap(mac_res->start, resource_size(mac_res));
379 + memcpy_fromio(eth_mac, mac, 6);
380 +
381 + if (!of_property_read_u32(np, "mac-increment", &mac_inc))
382 + eth_mac[5] += mac_inc;
383 +
384 + return 0;
385 +}
386 +
387 +static struct of_device_id eth_mac_ids[] = {
388 + { .compatible = "lantiq,eth-mac" },
389 + { /* sentinel */ }
390 +};
391 +
392 +static struct platform_driver eth_mac_driver = {
393 + .driver = {
394 + .name = "lantiq,eth-mac",
395 + .owner = THIS_MODULE,
396 + .of_match_table = of_match_ptr(eth_mac_ids),
397 + },
398 +};
399 +
400 +static int __init of_eth_mac_init(void)
401 +{
402 + return platform_driver_probe(&eth_mac_driver, of_eth_mac_probe);
403 +}
404 +device_initcall(of_eth_mac_init);
405 --- /dev/null
406 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
407 @@ -0,0 +1,109 @@
408 +/*
409 + * Atheros AP94 reference board PCI initialization
410 + *
411 + * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
412 + *
413 + * This program is free software; you can redistribute it and/or modify it
414 + * under the terms of the GNU General Public License version 2 as published
415 + * by the Free Software Foundation.
416 + */
417 +
418 +#include <linux/pci.h>
419 +#include <linux/init.h>
420 +#include <linux/delay.h>
421 +#include <lantiq_soc.h>
422 +
423 +#define LTQ_PCI_MEM_BASE 0x18000000
424 +
425 +struct ath_fixup {
426 + u16 *cal_data;
427 + unsigned slot;
428 +};
429 +
430 +static int ath_num_fixups;
431 +static struct ath_fixup ath_fixups[2];
432 +
433 +static void ath_pci_fixup(struct pci_dev *dev)
434 +{
435 + void __iomem *mem;
436 + u16 *cal_data = NULL;
437 + u16 cmd;
438 + u32 bar0;
439 + u32 val;
440 + unsigned i;
441 +
442 + for (i = 0; i < ath_num_fixups; i++) {
443 + if (ath_fixups[i].cal_data == NULL)
444 + continue;
445 +
446 + if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
447 + continue;
448 +
449 + cal_data = ath_fixups[i].cal_data;
450 + break;
451 + }
452 +
453 + if (cal_data == NULL)
454 + return;
455 +
456 + if (*cal_data != 0xa55a) {
457 + pr_err("pci %s: invalid calibration data\n", pci_name(dev));
458 + return;
459 + }
460 +
461 + pr_info("pci %s: fixup device configuration\n", pci_name(dev));
462 +
463 + mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
464 + if (!mem) {
465 + pr_err("pci %s: ioremap error\n", pci_name(dev));
466 + return;
467 + }
468 +
469 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
470 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
471 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
472 + cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
473 + pci_write_config_word(dev, PCI_COMMAND, cmd);
474 +
475 + /* set pointer to first reg address */
476 + cal_data += 3;
477 + while (*cal_data != 0xffff) {
478 + u32 reg;
479 + reg = *cal_data++;
480 + val = *cal_data++;
481 + val |= (*cal_data++) << 16;
482 +
483 + ltq_w32(swab32(val), mem + reg);
484 + udelay(100);
485 + }
486 +
487 + pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
488 + dev->vendor = val & 0xffff;
489 + dev->device = (val >> 16) & 0xffff;
490 +
491 + pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
492 + dev->revision = val & 0xff;
493 + dev->class = val >> 8; /* upper 3 bytes */
494 +
495 + pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
496 + pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
497 +
498 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
499 + cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
500 + pci_write_config_word(dev, PCI_COMMAND, cmd);
501 +
502 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
503 +
504 + iounmap(mem);
505 +}
506 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
507 +
508 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
509 +{
510 + if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
511 + return;
512 +
513 + ath_fixups[ath_num_fixups].slot = slot;
514 + ath_fixups[ath_num_fixups].cal_data = cal_data;
515 + ath_num_fixups++;
516 +}
517 --- /dev/null
518 +++ b/arch/mips/lantiq/xway/rt_eep.c
519 @@ -0,0 +1,60 @@
520 +/*
521 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
522 + *
523 + * This program is free software; you can redistribute it and/or modify it
524 + * under the terms of the GNU General Public License version 2 as published
525 + * by the Free Software Foundation.
526 + */
527 +
528 +#include <linux/init.h>
529 +#include <linux/module.h>
530 +#include <linux/pci.h>
531 +#include <linux/platform_device.h>
532 +#include <linux/rt2x00_platform.h>
533 +
534 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
535 +static struct rt2x00_platform_data rt2x00_pdata;
536 +
537 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
538 +{
539 + dev->dev.platform_data = &rt2x00_pdata;
540 + return 0;
541 +}
542 +
543 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
544 +{
545 + struct device_node *np = pdev->dev.of_node;
546 + const char *eeprom;
547 +
548 + if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
549 + dev_err(&pdev->dev, "failed to load eeprom filename\n");
550 + return 0;
551 + }
552 +
553 + rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
554 +// rt2x00_pdata.mac_address = mac;
555 + ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
556 +
557 + dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
558 +
559 + return 0;
560 +}
561 +
562 +static struct of_device_id ralink_eeprom_ids[] = {
563 + { .compatible = "ralink,eeprom" },
564 + { }
565 +};
566 +
567 +static struct platform_driver ralink_eeprom_driver = {
568 + .driver = {
569 + .name = "ralink,eeprom",
570 + .owner = THIS_MODULE,
571 + .of_match_table = of_match_ptr(ralink_eeprom_ids),
572 + },
573 +};
574 +
575 +static int __init of_ralink_eeprom_init(void)
576 +{
577 + return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
578 +}
579 +device_initcall(of_ralink_eeprom_init);