1 From 591a9bdde1fa9aa6f1c6132ea04771bb1dcd6180 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 13 Mar 2013 10:02:58 +0100
4 Subject: [PATCH 18/22] owrt: lantiq: wifi and ethernet eeprom handling
7 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h | 6 +
8 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 +
9 arch/mips/lantiq/xway/Makefile | 3 +
10 arch/mips/lantiq/xway/ath_eep.c | 248 ++++++++++++++++++++
11 arch/mips/lantiq/xway/eth_mac.c | 76 ++++++
12 arch/mips/lantiq/xway/pci-ath-fixup.c | 109 +++++++++
13 arch/mips/lantiq/xway/rt_eep.c | 60 +++++
14 arch/mips/pci/pci-lantiq.c | 2 +-
15 8 files changed, 506 insertions(+), 1 deletion(-)
16 create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
17 create mode 100644 arch/mips/lantiq/xway/ath_eep.c
18 create mode 100644 arch/mips/lantiq/xway/eth_mac.c
19 create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
20 create mode 100644 arch/mips/lantiq/xway/rt_eep.c
22 Index: linux-3.10.49/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
23 ===================================================================
24 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
25 +++ linux-3.10.49/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h 2014-07-28 15:42:11.008968725 +0100
27 +#ifndef _PCI_ATH_FIXUP
28 +#define _PCI_ATH_FIXUP
30 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
32 +#endif /* _PCI_ATH_FIXUP */
33 Index: linux-3.10.49/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
34 ===================================================================
35 --- linux-3.10.49.orig/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 2014-07-17 23:58:15.000000000 +0100
36 +++ linux-3.10.49/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 2014-07-28 15:42:11.008968725 +0100
38 extern void ltq_pmu_enable(unsigned int module);
39 extern void ltq_pmu_disable(unsigned int module);
41 +/* allow the ethernet driver to load a flash mapped mac addr */
42 +const u8* ltq_get_eth_mac(void);
44 #endif /* CONFIG_SOC_TYPE_XWAY */
45 #endif /* _LTQ_XWAY_H__ */
46 Index: linux-3.10.49/arch/mips/lantiq/xway/Makefile
47 ===================================================================
48 --- linux-3.10.49.orig/arch/mips/lantiq/xway/Makefile 2014-07-28 15:42:10.976968725 +0100
49 +++ linux-3.10.49/arch/mips/lantiq/xway/Makefile 2014-07-28 15:49:51.008978396 +0100
55 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
57 obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
58 Index: linux-3.10.49/arch/mips/lantiq/xway/ath_eep.c
59 ===================================================================
60 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
61 +++ linux-3.10.49/arch/mips/lantiq/xway/ath_eep.c 2014-07-28 15:46:33.032974234 +0100
64 + * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
65 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
66 + * Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
67 + * Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
68 + * Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
70 + * This program is free software; you can redistribute it and/or modify it
71 + * under the terms of the GNU General Public License version 2 as published
72 + * by the Free Software Foundation.
75 +#include <linux/init.h>
76 +#include <linux/module.h>
77 +#include <linux/platform_device.h>
78 +#include <linux/etherdevice.h>
79 +#include <linux/ath5k_platform.h>
80 +#include <linux/ath9k_platform.h>
81 +#include <linux/pci.h>
82 +#include <linux/err.h>
83 +#include <linux/mtd/mtd.h>
84 +#include <pci-ath-fixup.h>
85 +#include <lantiq_soc.h>
87 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
88 +struct ath5k_platform_data ath5k_pdata;
89 +struct ath9k_platform_data ath9k_pdata = {
92 +static u8 athxk_eeprom_mac[6];
94 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
96 + dev->dev.platform_data = &ath9k_pdata;
100 +static int ath9k_eep_load;
101 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
103 + struct device_node *np = pdev->dev.of_node, *mtd_np;
104 + struct resource *eep_res, *mac_res = NULL;
105 + void __iomem *eep, *mac;
107 + u32 mac_inc = 0, pci_slot = 0;
109 + struct mtd_info *the_mtd;
110 + size_t flash_readlen;
111 + const __be32 *list;
115 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
116 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
117 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
118 + of_get_property(mtd_np, "label", NULL)) || (part =
119 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
120 + != ERR_PTR(-ENODEV)) {
121 + i = mtd_read(the_mtd, be32_to_cpup(list),
122 + ATH9K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
123 + (void *) ath9k_pdata.eeprom_data);
124 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
125 + size_t mac_readlen;
126 + mtd_read(the_mtd, mac_offset, 6, &mac_readlen,
127 + (void *) athxk_eeprom_mac);
129 + put_mtd_device(the_mtd);
130 + if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
131 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
135 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
136 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
139 + dev_err(&pdev->dev, "failed to load eeprom address\n");
142 + if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS << 1) {
143 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
147 + eep = ioremap(eep_res->start, resource_size(eep_res));
148 + memcpy_fromio(ath9k_pdata.eeprom_data, eep,
149 + ATH9K_PLAT_EEP_MAX_WORDS << 1);
152 + if (of_find_property(np, "ath,eep-swap", NULL))
153 + for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
154 + ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
156 + if (of_find_property(np, "ath,eep-endian", NULL)) {
157 + ath9k_pdata.endian_check = true;
159 + dev_info(&pdev->dev, "endian check enabled.\n");
162 + if (!is_valid_ether_addr(athxk_eeprom_mac)) {
164 + if (resource_size(mac_res) != 6) {
165 + dev_err(&pdev->dev, "mac has an invalid size\n");
168 + mac = ioremap(mac_res->start, resource_size(mac_res));
169 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
170 + } else if (ltq_get_eth_mac()) {
171 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
174 + if (!is_valid_ether_addr(athxk_eeprom_mac)) {
175 + dev_warn(&pdev->dev, "using random mac\n");
176 + random_ether_addr(athxk_eeprom_mac);
179 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
180 + athxk_eeprom_mac[5] += mac_inc;
182 + ath9k_pdata.macaddr = athxk_eeprom_mac;
183 + ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
185 + if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
186 + ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
188 + dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
189 + if (ath9k_eep_load) {
190 + struct pci_dev *d = NULL;
191 + while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
192 + PCI_ANY_ID, d)) != NULL)
193 + pci_fixup_device(pci_fixup_early, d);
198 + dev_info(&pdev->dev, "loaded ath9k eeprom\n");
203 +static struct of_device_id ath9k_eeprom_ids[] = {
204 + { .compatible = "ath9k,eeprom" },
208 +static struct platform_driver ath9k_eeprom_driver = {
210 + .name = "ath9k,eeprom",
211 + .owner = THIS_MODULE,
212 + .of_match_table = of_match_ptr(ath9k_eeprom_ids),
216 +static int __init of_ath9k_eeprom_init(void)
218 + int ret = platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
221 + ath9k_eep_load = 1;
226 +static int __init of_ath9k_eeprom_init_late(void)
228 + if (!ath9k_eep_load)
230 + return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
232 +late_initcall(of_ath9k_eeprom_init_late);
233 +subsys_initcall(of_ath9k_eeprom_init);
236 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
238 + dev->dev.platform_data = &ath5k_pdata;
242 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
244 + struct device_node *np = pdev->dev.of_node, *mtd_np;
245 + struct resource *eep_res, *mac_res = NULL;
246 + void __iomem *eep, *mac;
250 + struct mtd_info *the_mtd;
251 + size_t flash_readlen;
252 + const __be32 *list;
256 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
257 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
258 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
259 + of_get_property(mtd_np, "label", NULL)) || (part =
260 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
261 + != ERR_PTR(-ENODEV)) {
262 + i = mtd_read(the_mtd, be32_to_cpup(list),
263 + ATH5K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
264 + (void *) ath5k_pdata.eeprom_data);
265 + put_mtd_device(the_mtd);
266 + if ((sizeof(ATH5K_PLAT_EEP_MAX_WORDS << 1) != flash_readlen)
268 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
272 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
273 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
276 + dev_err(&pdev->dev, "failed to load eeprom address\n");
279 + if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS << 1) {
280 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
284 + eep = ioremap(eep_res->start, resource_size(eep_res));
285 + ath5k_pdata.eeprom_data = kmalloc(ATH5K_PLAT_EEP_MAX_WORDS<<1,
287 + memcpy_fromio(ath5k_pdata.eeprom_data, eep,
288 + ATH5K_PLAT_EEP_MAX_WORDS << 1);
291 + if (of_find_property(np, "ath,eep-swap", NULL))
292 + for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
293 + ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
295 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
296 + memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
297 + } else if (mac_res) {
298 + if (resource_size(mac_res) != 6) {
299 + dev_err(&pdev->dev, "mac has an invalid size\n");
302 + mac = ioremap(mac_res->start, resource_size(mac_res));
303 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
304 + } else if (ltq_get_eth_mac())
305 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
307 + dev_warn(&pdev->dev, "using random mac\n");
308 + random_ether_addr(athxk_eeprom_mac);
311 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
312 + athxk_eeprom_mac[5] += mac_inc;
314 + ath5k_pdata.macaddr = athxk_eeprom_mac;
315 + ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
317 + dev_info(&pdev->dev, "loaded ath5k eeprom\n");
322 +static struct of_device_id ath5k_eeprom_ids[] = {
323 + { .compatible = "ath5k,eeprom" },
327 +static struct platform_driver ath5k_eeprom_driver = {
329 + .name = "ath5k,eeprom",
330 + .owner = THIS_MODULE,
331 + .of_match_table = of_match_ptr(ath5k_eeprom_ids),
335 +static int __init of_ath5k_eeprom_init(void)
337 + return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
339 +device_initcall(of_ath5k_eeprom_init);
340 Index: linux-3.10.49/arch/mips/lantiq/xway/eth_mac.c
341 ===================================================================
342 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
343 +++ linux-3.10.49/arch/mips/lantiq/xway/eth_mac.c 2014-07-28 15:42:11.008968725 +0100
346 + * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
348 + * This program is free software; you can redistribute it and/or modify it
349 + * under the terms of the GNU General Public License version 2 as published
350 + * by the Free Software Foundation.
353 +#include <linux/init.h>
354 +#include <linux/module.h>
355 +#include <linux/of_platform.h>
356 +#include <linux/if_ether.h>
358 +static u8 eth_mac[6];
359 +static int eth_mac_set;
361 +const u8* ltq_get_eth_mac(void)
366 +static int __init setup_ethaddr(char *str)
368 + eth_mac_set = mac_pton(str, eth_mac);
369 + return !eth_mac_set;
371 +__setup("ethaddr=", setup_ethaddr);
373 +int __init of_eth_mac_probe(struct platform_device *pdev)
375 + struct device_node *np = pdev->dev.of_node;
376 + struct resource *mac_res;
381 + dev_err(&pdev->dev, "mac was already set by bootloader\n");
384 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
387 + dev_err(&pdev->dev, "failed to load mac\n");
390 + if (resource_size(mac_res) != 6) {
391 + dev_err(&pdev->dev, "mac has an invalid size\n");
394 + mac = ioremap(mac_res->start, resource_size(mac_res));
395 + memcpy_fromio(eth_mac, mac, 6);
397 + if (!of_property_read_u32(np, "mac-increment", &mac_inc))
398 + eth_mac[5] += mac_inc;
403 +static struct of_device_id eth_mac_ids[] = {
404 + { .compatible = "lantiq,eth-mac" },
408 +static struct platform_driver eth_mac_driver = {
410 + .name = "lantiq,eth-mac",
411 + .owner = THIS_MODULE,
412 + .of_match_table = of_match_ptr(eth_mac_ids),
416 +static int __init of_eth_mac_init(void)
418 + return platform_driver_probe(ð_mac_driver, of_eth_mac_probe);
420 +device_initcall(of_eth_mac_init);
421 Index: linux-3.10.49/arch/mips/lantiq/xway/pci-ath-fixup.c
422 ===================================================================
423 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
424 +++ linux-3.10.49/arch/mips/lantiq/xway/pci-ath-fixup.c 2014-07-28 15:42:11.008968725 +0100
427 + * Atheros AP94 reference board PCI initialization
429 + * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
431 + * This program is free software; you can redistribute it and/or modify it
432 + * under the terms of the GNU General Public License version 2 as published
433 + * by the Free Software Foundation.
436 +#include <linux/pci.h>
437 +#include <linux/init.h>
438 +#include <linux/delay.h>
439 +#include <lantiq_soc.h>
441 +#define LTQ_PCI_MEM_BASE 0x18000000
448 +static int ath_num_fixups;
449 +static struct ath_fixup ath_fixups[2];
451 +static void ath_pci_fixup(struct pci_dev *dev)
454 + u16 *cal_data = NULL;
460 + for (i = 0; i < ath_num_fixups; i++) {
461 + if (ath_fixups[i].cal_data == NULL)
464 + if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
467 + cal_data = ath_fixups[i].cal_data;
471 + if (cal_data == NULL)
474 + if (*cal_data != 0xa55a) {
475 + pr_err("pci %s: invalid calibration data\n", pci_name(dev));
479 + pr_info("pci %s: fixup device configuration\n", pci_name(dev));
481 + mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
483 + pr_err("pci %s: ioremap error\n", pci_name(dev));
487 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
488 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
489 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
490 + cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
491 + pci_write_config_word(dev, PCI_COMMAND, cmd);
493 + /* set pointer to first reg address */
495 + while (*cal_data != 0xffff) {
499 + val |= (*cal_data++) << 16;
501 + ltq_w32(swab32(val), mem + reg);
505 + pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
506 + dev->vendor = val & 0xffff;
507 + dev->device = (val >> 16) & 0xffff;
509 + pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
510 + dev->revision = val & 0xff;
511 + dev->class = val >> 8; /* upper 3 bytes */
513 + pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
514 + pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
516 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
517 + cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
518 + pci_write_config_word(dev, PCI_COMMAND, cmd);
520 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
524 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
526 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
528 + if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
531 + ath_fixups[ath_num_fixups].slot = slot;
532 + ath_fixups[ath_num_fixups].cal_data = cal_data;
535 Index: linux-3.10.49/arch/mips/lantiq/xway/rt_eep.c
536 ===================================================================
537 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
538 +++ linux-3.10.49/arch/mips/lantiq/xway/rt_eep.c 2014-07-28 15:42:11.008968725 +0100
541 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
543 + * This program is free software; you can redistribute it and/or modify it
544 + * under the terms of the GNU General Public License version 2 as published
545 + * by the Free Software Foundation.
548 +#include <linux/init.h>
549 +#include <linux/module.h>
550 +#include <linux/pci.h>
551 +#include <linux/platform_device.h>
552 +#include <linux/rt2x00_platform.h>
554 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
555 +static struct rt2x00_platform_data rt2x00_pdata;
557 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
559 + dev->dev.platform_data = &rt2x00_pdata;
563 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
565 + struct device_node *np = pdev->dev.of_node;
566 + const char *eeprom;
568 + if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
569 + dev_err(&pdev->dev, "failed to load eeprom filename\n");
573 + rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
574 +// rt2x00_pdata.mac_address = mac;
575 + ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
577 + dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
582 +static struct of_device_id ralink_eeprom_ids[] = {
583 + { .compatible = "ralink,eeprom" },
587 +static struct platform_driver ralink_eeprom_driver = {
589 + .name = "ralink,eeprom",
590 + .owner = THIS_MODULE,
591 + .of_match_table = of_match_ptr(ralink_eeprom_ids),
595 +static int __init of_ralink_eeprom_init(void)
597 + return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
599 +device_initcall(of_ralink_eeprom_init);