7e3e6cc3da57786fd04ce346760a991c5777b743
[openwrt/staging/yousong.git] / target / linux / lantiq / patches-3.8 / 0037-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
1 From 0c9b05716ac0e597ae0f81a96ff68e54716decc9 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 13 Mar 2013 10:02:58 +0100
4 Subject: [PATCH 37/40] owrt: lantiq: wifi and ethernet eeprom handling
5
6 ---
7 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h | 6 +
8 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 +
9 arch/mips/lantiq/xway/Makefile | 3 +
10 arch/mips/lantiq/xway/ath_eep.c | 206 ++++++++++++++++++++
11 arch/mips/lantiq/xway/eth_mac.c | 76 ++++++++
12 arch/mips/lantiq/xway/pci-ath-fixup.c | 109 +++++++++++
13 arch/mips/lantiq/xway/rt_eep.c | 60 ++++++
14 drivers/net/ethernet/lantiq_etop.c | 10 +-
15 8 files changed, 469 insertions(+), 4 deletions(-)
16 create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
17 create mode 100644 arch/mips/lantiq/xway/ath_eep.c
18 create mode 100644 arch/mips/lantiq/xway/eth_mac.c
19 create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
20 create mode 100644 arch/mips/lantiq/xway/rt_eep.c
21
22 --- /dev/null
23 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
24 @@ -0,0 +1,6 @@
25 +#ifndef _PCI_ATH_FIXUP
26 +#define _PCI_ATH_FIXUP
27 +
28 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
29 +
30 +#endif /* _PCI_ATH_FIXUP */
31 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
32 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
33 @@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev,
34 extern void ltq_pmu_enable(unsigned int module);
35 extern void ltq_pmu_disable(unsigned int module);
36
37 +/* allow the ethernet driver to load a flash mapped mac addr */
38 +const u8* ltq_get_eth_mac(void);
39 +
40 #endif /* CONFIG_SOC_TYPE_XWAY */
41 #endif /* _LTQ_XWAY_H__ */
42 --- a/arch/mips/lantiq/xway/Makefile
43 +++ b/arch/mips/lantiq/xway/Makefile
44 @@ -1,3 +1,6 @@
45 obj-y := prom.o sysctrl.o clk.o reset.o dma.o gptu.o dcdc.o
46
47 +obj-y += eth_mac.o
48 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
49 +
50 obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
51 --- /dev/null
52 +++ b/arch/mips/lantiq/xway/ath_eep.c
53 @@ -0,0 +1,206 @@
54 +/*
55 + * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
56 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
57 + * Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
58 + * Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
59 + *
60 + * This program is free software; you can redistribute it and/or modify it
61 + * under the terms of the GNU General Public License version 2 as published
62 + * by the Free Software Foundation.
63 + */
64 +
65 +#include <linux/init.h>
66 +#include <linux/module.h>
67 +#include <linux/platform_device.h>
68 +#include <linux/etherdevice.h>
69 +#include <linux/ath5k_platform.h>
70 +#include <linux/ath9k_platform.h>
71 +#include <linux/pci.h>
72 +#include <pci-ath-fixup.h>
73 +
74 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
75 +struct ath5k_platform_data ath5k_pdata;
76 +struct ath9k_platform_data ath9k_pdata = {
77 + .led_pin = -1,
78 +};
79 +static u16 ath5k_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS];
80 +static u8 athxk_eeprom_mac[6];
81 +
82 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
83 +{
84 + dev->dev.platform_data = &ath9k_pdata;
85 + return 0;
86 +}
87 +
88 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
89 +{
90 + struct device_node *np = pdev->dev.of_node;
91 + struct resource *eep_res, *mac_res;
92 + void __iomem *eep, *mac;
93 + int mac_offset;
94 + u32 mac_inc = 0, pci_slot = 0;
95 + int i;
96 + u16 *eepdata, sum, el;
97 +
98 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
99 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
100 +
101 + if (!eep_res) {
102 + dev_err(&pdev->dev, "failed to load eeprom address\n");
103 + return -ENODEV;
104 + }
105 + if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS) {
106 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
107 + return -EINVAL;
108 + }
109 +
110 + eep = ioremap(eep_res->start, resource_size(eep_res));
111 + memcpy_fromio(ath9k_pdata.eeprom_data, eep, ATH9K_PLAT_EEP_MAX_WORDS);
112 +
113 + if (of_find_property(np, "ath,eep-swap", NULL)) {
114 + ath9k_pdata.endian_check = true;
115 +
116 + dev_info(&pdev->dev, "endian check enabled.\n");
117 + }
118 +
119 + if (of_find_property(np, "ath,eep-csum", NULL)) {
120 + sum = ath9k_pdata.eeprom_data[0x200>>1];
121 + el = sum / sizeof(u16) - 2; /* skip length and (old) checksum */
122 + eepdata = (u16 *) (&ath9k_pdata.eeprom_data[0x204>>1]); /* after checksum */
123 + for (i = 0; i < el; i++)
124 + sum ^= *eepdata++;
125 + sum ^= 0xffff;
126 + ath9k_pdata.eeprom_data[0x202>>1] = sum;
127 +
128 + dev_info(&pdev->dev, "checksum fixed.\n");
129 + }
130 +
131 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
132 + memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data, 6);
133 + } else if (mac_res) {
134 + if (resource_size(mac_res) != 6) {
135 + dev_err(&pdev->dev, "mac has an invalid size\n");
136 + return -EINVAL;
137 + }
138 + mac = ioremap(mac_res->start, resource_size(mac_res));
139 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
140 + } else {
141 + dev_warn(&pdev->dev, "using random mac\n");
142 + random_ether_addr(athxk_eeprom_mac);
143 + }
144 +
145 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
146 + athxk_eeprom_mac[5] += mac_inc;
147 +
148 + ath9k_pdata.macaddr = athxk_eeprom_mac;
149 + ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
150 +
151 + if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
152 + ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
153 +
154 + dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
155 + }
156 +
157 + dev_info(&pdev->dev, "loaded ath9k eeprom\n");
158 +
159 + return 0;
160 +}
161 +
162 +static struct of_device_id ath9k_eeprom_ids[] = {
163 + { .compatible = "ath9k,eeprom" },
164 + { }
165 +};
166 +
167 +static struct platform_driver ath9k_eeprom_driver = {
168 + .driver = {
169 + .name = "ath9k,eeprom",
170 + .owner = THIS_MODULE,
171 + .of_match_table = of_match_ptr(ath9k_eeprom_ids),
172 + },
173 +};
174 +
175 +static int __init of_ath9k_eeprom_init(void)
176 +{
177 + return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
178 +}
179 +arch_initcall(of_ath9k_eeprom_init);
180 +
181 +
182 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
183 +{
184 + dev->dev.platform_data = &ath5k_pdata;
185 + return 0;
186 +}
187 +
188 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
189 +{
190 + struct device_node *np = pdev->dev.of_node;
191 + struct resource *eep_res, *mac_res;
192 + void __iomem *eep, *mac;
193 + int mac_offset;
194 + u32 mac_inc = 0;
195 + int i;
196 +
197 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
198 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
199 +
200 + if (!eep_res) {
201 + dev_err(&pdev->dev, "failed to load eeprom address\n");
202 + return -ENODEV;
203 + }
204 + if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS) {
205 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
206 + return -EINVAL;
207 + }
208 +
209 + eep = ioremap(eep_res->start, resource_size(eep_res));
210 + memcpy_fromio(ath5k_eeprom_data, eep, ATH5K_PLAT_EEP_MAX_WORDS);
211 +
212 + if (of_find_property(np, "ath,eep-swap", NULL))
213 + for (i = 0; i < (ATH5K_PLAT_EEP_MAX_WORDS >> 1); i++)
214 + ath5k_eeprom_data[i] = swab16(ath5k_eeprom_data[i]);
215 +
216 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
217 + memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_eeprom_data, 6);
218 + } else if (mac_res) {
219 + if (resource_size(mac_res) != 6) {
220 + dev_err(&pdev->dev, "mac has an invalid size\n");
221 + return -EINVAL;
222 + }
223 + mac = ioremap(mac_res->start, resource_size(mac_res));
224 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
225 + } else {
226 + dev_warn(&pdev->dev, "using random mac\n");
227 + random_ether_addr(athxk_eeprom_mac);
228 + }
229 +
230 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
231 + athxk_eeprom_mac[5] += mac_inc;
232 +
233 + ath5k_pdata.eeprom_data = ath5k_eeprom_data;
234 + ath5k_pdata.macaddr = athxk_eeprom_mac;
235 + ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
236 +
237 + dev_info(&pdev->dev, "loaded ath5k eeprom\n");
238 +
239 + return 0;
240 +}
241 +
242 +static struct of_device_id ath5k_eeprom_ids[] = {
243 + { .compatible = "ath5k,eeprom" },
244 + { }
245 +};
246 +
247 +static struct platform_driver ath5k_eeprom_driver = {
248 + .driver = {
249 + .name = "ath5k,eeprom",
250 + .owner = THIS_MODULE,
251 + .of_match_table = of_match_ptr(ath5k_eeprom_ids),
252 + },
253 +};
254 +
255 +static int __init of_ath5k_eeprom_init(void)
256 +{
257 + return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
258 +}
259 +device_initcall(of_ath5k_eeprom_init);
260 --- /dev/null
261 +++ b/arch/mips/lantiq/xway/eth_mac.c
262 @@ -0,0 +1,76 @@
263 +/*
264 + * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
265 + *
266 + * This program is free software; you can redistribute it and/or modify it
267 + * under the terms of the GNU General Public License version 2 as published
268 + * by the Free Software Foundation.
269 + */
270 +
271 +#include <linux/init.h>
272 +#include <linux/module.h>
273 +#include <linux/of_platform.h>
274 +#include <linux/if_ether.h>
275 +
276 +static u8 eth_mac[6];
277 +static int eth_mac_set;
278 +
279 +const u8* ltq_get_eth_mac(void)
280 +{
281 + return eth_mac;
282 +}
283 +
284 +static int __init setup_ethaddr(char *str)
285 +{
286 + eth_mac_set = mac_pton(str, eth_mac);
287 + return !eth_mac_set;
288 +}
289 +__setup("ethaddr=", setup_ethaddr);
290 +
291 +int __init of_eth_mac_probe(struct platform_device *pdev)
292 +{
293 + struct device_node *np = pdev->dev.of_node;
294 + struct resource *mac_res;
295 + void __iomem *mac;
296 + u32 mac_inc = 0;
297 +
298 + if (eth_mac_set) {
299 + dev_err(&pdev->dev, "mac was already set by bootloader\n");
300 + return -EINVAL;
301 + }
302 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
303 +
304 + if (!mac_res) {
305 + dev_err(&pdev->dev, "failed to load mac\n");
306 + return -EINVAL;
307 + }
308 + if (resource_size(mac_res) != 6) {
309 + dev_err(&pdev->dev, "mac has an invalid size\n");
310 + return -EINVAL;
311 + }
312 + mac = ioremap(mac_res->start, resource_size(mac_res));
313 + memcpy_fromio(eth_mac, mac, 6);
314 +
315 + if (!of_property_read_u32(np, "mac-increment", &mac_inc))
316 + eth_mac[5] += mac_inc;
317 +
318 + return 0;
319 +}
320 +
321 +static struct of_device_id eth_mac_ids[] = {
322 + { .compatible = "lantiq,eth-mac" },
323 + { /* sentinel */ }
324 +};
325 +
326 +static struct platform_driver eth_mac_driver = {
327 + .driver = {
328 + .name = "lantiq,eth-mac",
329 + .owner = THIS_MODULE,
330 + .of_match_table = of_match_ptr(eth_mac_ids),
331 + },
332 +};
333 +
334 +static int __init of_eth_mac_init(void)
335 +{
336 + return platform_driver_probe(&eth_mac_driver, of_eth_mac_probe);
337 +}
338 +device_initcall(of_eth_mac_init);
339 --- /dev/null
340 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
341 @@ -0,0 +1,109 @@
342 +/*
343 + * Atheros AP94 reference board PCI initialization
344 + *
345 + * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
346 + *
347 + * This program is free software; you can redistribute it and/or modify it
348 + * under the terms of the GNU General Public License version 2 as published
349 + * by the Free Software Foundation.
350 + */
351 +
352 +#include <linux/pci.h>
353 +#include <linux/init.h>
354 +#include <linux/delay.h>
355 +#include <lantiq_soc.h>
356 +
357 +#define LTQ_PCI_MEM_BASE 0x18000000
358 +
359 +struct ath_fixup {
360 + u16 *cal_data;
361 + unsigned slot;
362 +};
363 +
364 +static int ath_num_fixups;
365 +static struct ath_fixup ath_fixups[2];
366 +
367 +static void ath_pci_fixup(struct pci_dev *dev)
368 +{
369 + void __iomem *mem;
370 + u16 *cal_data = NULL;
371 + u16 cmd;
372 + u32 bar0;
373 + u32 val;
374 + unsigned i;
375 +
376 + for (i = 0; i < ath_num_fixups; i++) {
377 + if (ath_fixups[i].cal_data == NULL)
378 + continue;
379 +
380 + if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
381 + continue;
382 +
383 + cal_data = ath_fixups[i].cal_data;
384 + break;
385 + }
386 +
387 + if (cal_data == NULL)
388 + return;
389 +
390 + if (*cal_data != 0xa55a) {
391 + pr_err("pci %s: invalid calibration data\n", pci_name(dev));
392 + return;
393 + }
394 +
395 + pr_info("pci %s: fixup device configuration\n", pci_name(dev));
396 +
397 + mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
398 + if (!mem) {
399 + pr_err("pci %s: ioremap error\n", pci_name(dev));
400 + return;
401 + }
402 +
403 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
404 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
405 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
406 + cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
407 + pci_write_config_word(dev, PCI_COMMAND, cmd);
408 +
409 + /* set pointer to first reg address */
410 + cal_data += 3;
411 + while (*cal_data != 0xffff) {
412 + u32 reg;
413 + reg = *cal_data++;
414 + val = *cal_data++;
415 + val |= (*cal_data++) << 16;
416 +
417 + ltq_w32(swab32(val), mem + reg);
418 + udelay(100);
419 + }
420 +
421 + pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
422 + dev->vendor = val & 0xffff;
423 + dev->device = (val >> 16) & 0xffff;
424 +
425 + pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
426 + dev->revision = val & 0xff;
427 + dev->class = val >> 8; /* upper 3 bytes */
428 +
429 + pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
430 + pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
431 +
432 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
433 + cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
434 + pci_write_config_word(dev, PCI_COMMAND, cmd);
435 +
436 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
437 +
438 + iounmap(mem);
439 +}
440 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
441 +
442 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
443 +{
444 + if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
445 + return;
446 +
447 + ath_fixups[ath_num_fixups].slot = slot;
448 + ath_fixups[ath_num_fixups].cal_data = cal_data;
449 + ath_num_fixups++;
450 +}
451 --- /dev/null
452 +++ b/arch/mips/lantiq/xway/rt_eep.c
453 @@ -0,0 +1,60 @@
454 +/*
455 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
456 + *
457 + * This program is free software; you can redistribute it and/or modify it
458 + * under the terms of the GNU General Public License version 2 as published
459 + * by the Free Software Foundation.
460 + */
461 +
462 +#include <linux/init.h>
463 +#include <linux/module.h>
464 +#include <linux/pci.h>
465 +#include <linux/platform_device.h>
466 +#include <linux/rt2x00_platform.h>
467 +
468 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
469 +static struct rt2x00_platform_data rt2x00_pdata;
470 +
471 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
472 +{
473 + dev->dev.platform_data = &rt2x00_pdata;
474 + return 0;
475 +}
476 +
477 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
478 +{
479 + struct device_node *np = pdev->dev.of_node;
480 + const char *eeprom;
481 +
482 + if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
483 + dev_err(&pdev->dev, "failed to load eeprom filename\n");
484 + return 0;
485 + }
486 +
487 + rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
488 +// rt2x00_pdata.mac_address = mac;
489 + ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
490 +
491 + dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
492 +
493 + return 0;
494 +}
495 +
496 +static struct of_device_id ralink_eeprom_ids[] = {
497 + { .compatible = "ralink,eeprom" },
498 + { }
499 +};
500 +
501 +static struct platform_driver ralink_eeprom_driver = {
502 + .driver = {
503 + .name = "ralink,eeprom",
504 + .owner = THIS_MODULE,
505 + .of_match_table = of_match_ptr(ralink_eeprom_ids),
506 + },
507 +};
508 +
509 +static int __init of_ralink_eeprom_init(void)
510 +{
511 + return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
512 +}
513 +device_initcall(of_ralink_eeprom_init);
514 --- a/drivers/net/ethernet/lantiq_etop.c
515 +++ b/drivers/net/ethernet/lantiq_etop.c
516 @@ -826,7 +826,8 @@ ltq_etop_init(struct net_device *dev)
517
518 ltq_etop_change_mtu(dev, 1500);
519
520 - memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
521 + if (priv->mac)
522 + memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
523 if (!is_valid_ether_addr(mac.sa_data)) {
524 pr_warn("etop: invalid MAC, using random\n");
525 random_ether_addr(mac.sa_data);
526 @@ -885,8 +886,7 @@ static const struct net_device_ops ltq_e
527 .ndo_tx_timeout = ltq_etop_tx_timeout,
528 };
529
530 -static int __devinit
531 -ltq_etop_probe(struct platform_device *pdev)
532 +static int ltq_etop_probe(struct platform_device *pdev)
533 {
534 struct net_device *dev;
535 struct ltq_etop_priv *priv;
536 @@ -950,7 +950,9 @@ ltq_etop_probe(struct platform_device *p
537 priv->tx_irq = irqres[0].start;
538 priv->rx_irq = irqres[1].start;
539 priv->mii_mode = of_get_phy_mode(pdev->dev.of_node);
540 - priv->mac = of_get_mac_address(pdev->dev.of_node);
541 + priv->mac = ltq_get_eth_mac();
542 + if (!priv->mac)
543 + priv->mac = of_get_mac_address(pdev->dev.of_node);
544
545 priv->clk_ppe = clk_get(&pdev->dev, NULL);
546 if (IS_ERR(priv->clk_ppe))