sunxi: refresh clock framework
[openwrt/staging/yousong.git] / target / linux / sunxi / patches-3.12 / 114-dt-unify-apb1.patch
1 From f3443f6d43a69a520ae1e636d69a71c4a6bee21e Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
3 Date: Sun, 8 Sep 2013 18:12:28 -0300
4 Subject: [PATCH] ARM: sunxi: dt: unify APB1 clock
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 With the new factors infrastructure in place, we can unify apb1 and
10 apb1_mux as a single clock now.
11
12 Signed-off-by: Emilio López <emilio@elopez.com.ar>
13 ---
14 arch/arm/boot/dts/sun4i-a10.dtsi | 9 +--------
15 arch/arm/boot/dts/sun5i-a10s.dtsi | 9 +--------
16 arch/arm/boot/dts/sun5i-a13.dtsi | 9 +--------
17 arch/arm/boot/dts/sun7i-a20.dtsi | 9 +--------
18 4 files changed, 4 insertions(+), 32 deletions(-)
19
20 diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
21 index 2828427e..4dccdb0 100644
22 --- a/arch/arm/boot/dts/sun4i-a10.dtsi
23 +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
24 @@ -158,18 +158,11 @@
25 "apb0_ir1", "apb0_keypad";
26 };
27
28 - apb1_mux: apb1_mux@01c20058 {
29 - #clock-cells = <0>;
30 - compatible = "allwinner,sun4i-apb1-mux-clk";
31 - reg = <0x01c20058 0x4>;
32 - clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
33 - };
34 -
35 apb1: apb1@01c20058 {
36 #clock-cells = <0>;
37 compatible = "allwinner,sun4i-apb1-clk";
38 reg = <0x01c20058 0x4>;
39 - clocks = <&apb1_mux>;
40 + clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
41 };
42
43 apb1_gates: apb1_gates@01c2006c {
44 diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
45 index 60bd3f7..9cb1b14 100644
46 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi
47 +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
48 @@ -150,18 +150,11 @@
49 "apb0_ir", "apb0_keypad";
50 };
51
52 - apb1_mux: apb1_mux@01c20058 {
53 - #clock-cells = <0>;
54 - compatible = "allwinner,sun4i-apb1-mux-clk";
55 - reg = <0x01c20058 0x4>;
56 - clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
57 - };
58 -
59 apb1: apb1@01c20058 {
60 #clock-cells = <0>;
61 compatible = "allwinner,sun4i-apb1-clk";
62 reg = <0x01c20058 0x4>;
63 - clocks = <&apb1_mux>;
64 + clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
65 };
66
67 apb1_gates: apb1_gates@01c2006c {
68 diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
69 index 3e616a0..6b74dd0 100644
70 --- a/arch/arm/boot/dts/sun5i-a13.dtsi
71 +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
72 @@ -148,18 +148,11 @@
73 clock-output-names = "apb0_codec", "apb0_pio", "apb0_ir";
74 };
75
76 - apb1_mux: apb1_mux@01c20058 {
77 - #clock-cells = <0>;
78 - compatible = "allwinner,sun4i-apb1-mux-clk";
79 - reg = <0x01c20058 0x4>;
80 - clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
81 - };
82 -
83 apb1: apb1@01c20058 {
84 #clock-cells = <0>;
85 compatible = "allwinner,sun4i-apb1-clk";
86 reg = <0x01c20058 0x4>;
87 - clocks = <&apb1_mux>;
88 + clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
89 };
90
91 apb1_gates: apb1_gates@01c2006c {
92 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
93 index 0bf5d07..55d3e14 100644
94 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
95 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
96 @@ -148,18 +148,11 @@
97 "apb0_iis2", "apb0_keypad";
98 };
99
100 - apb1_mux: apb1_mux@01c20058 {
101 - #clock-cells = <0>;
102 - compatible = "allwinner,sun4i-apb1-mux-clk";
103 - reg = <0x01c20058 0x4>;
104 - clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
105 - };
106 -
107 apb1: apb1@01c20058 {
108 #clock-cells = <0>;
109 compatible = "allwinner,sun4i-apb1-clk";
110 reg = <0x01c20058 0x4>;
111 - clocks = <&apb1_mux>;
112 + clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
113 };
114
115 apb1_gates: apb1_gates@01c2006c {
116 --
117 1.8.5.1
118