adm5120: drop 3.8 and 3.14 support
[openwrt/staging/yousong.git] / target / linux / sunxi / patches-3.14 / 203-dt-sun7i-add-mmc-nodes.patch
1 From 33654facee61ebbd88684c9cf482ec2ea41f575e Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?David=20Lanzend=C3=B6rfer?= <david.lanzendoerfer@o2s.ch>
3 Date: Sat, 15 Feb 2014 14:02:01 +0100
4 Subject: [PATCH] ARM: dts: sun7i: Add support for mmc
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
10 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
11 ---
12 arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 8 +++
13 arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 8 +++
14 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 23 +++++++++
15 arch/arm/boot/dts/sun7i-a20.dtsi | 65 +++++++++++++++++++++++++
16 4 files changed, 104 insertions(+)
17
18 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
19 +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
20 @@ -20,6 +20,14 @@
21 compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20";
22
23 soc@01c00000 {
24 + mmc0: mmc@01c0f000 {
25 + pinctrl-names = "default", "default";
26 + pinctrl-0 = <&mmc0_pins_a>;
27 + pinctrl-1 = <&mmc0_cd_pin_reference_design>;
28 + cd-gpios = <&pio 7 1 0>; /* PH1 */
29 + status = "okay";
30 + };
31 +
32 usbphy: phy@01c13400 {
33 usb1_vbus-supply = <&reg_usb1_vbus>;
34 usb2_vbus-supply = <&reg_usb2_vbus>;
35 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
36 +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
37 @@ -20,6 +20,14 @@
38 compatible = "cubietech,cubietruck", "allwinner,sun7i-a20";
39
40 soc@01c00000 {
41 + mmc0: mmc@01c0f000 {
42 + pinctrl-names = "default", "default";
43 + pinctrl-0 = <&mmc0_pins_a>;
44 + pinctrl-1 = <&mmc0_cd_pin_reference_design>;
45 + cd-gpios = <&pio 7 1 0>; /* PH1 */
46 + status = "okay";
47 + };
48 +
49 usbphy: phy@01c13400 {
50 usb1_vbus-supply = <&reg_usb1_vbus>;
51 usb2_vbus-supply = <&reg_usb2_vbus>;
52 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
53 +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
54 @@ -32,6 +32,22 @@
55 status = "okay";
56 };
57
58 + mmc0: mmc@01c0f000 {
59 + pinctrl-names = "default", "default";
60 + pinctrl-0 = <&mmc0_pins_a>;
61 + pinctrl-1 = <&mmc0_cd_pin_reference_design>;
62 + cd-gpios = <&pio 7 1 0>; /* PH1 */
63 + status = "okay";
64 + };
65 +
66 + mmc3: mmc@01c12000 {
67 + pinctrl-names = "default", "default";
68 + pinctrl-0 = <&mmc3_pins_a>;
69 + pinctrl-1 = <&mmc3_cd_pin_olinuxinom>;
70 + cd-gpios = <&pio 7 11 0>; /* PH11 */
71 + status = "okay";
72 + };
73 +
74 usbphy: phy@01c13400 {
75 usb1_vbus-supply = <&reg_usb1_vbus>;
76 usb2_vbus-supply = <&reg_usb2_vbus>;
77 @@ -66,6 +82,13 @@
78 };
79
80 pinctrl@01c20800 {
81 + mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {
82 + allwinner,pins = "PH11";
83 + allwinner,function = "gpio_in";
84 + allwinner,drive = <0>;
85 + allwinner,pull = <1>;
86 + };
87 +
88 led_pins_olinuxino: led_pins@0 {
89 allwinner,pins = "PH2";
90 allwinner,function = "gpio_out";
91 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
92 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
93 @@ -439,6 +439,50 @@
94 #size-cells = <0>;
95 };
96
97 + mmc0: mmc@01c0f000 {
98 + compatible = "allwinner,sun5i-a13-mmc";
99 + reg = <0x01c0f000 0x1000>;
100 + clocks = <&ahb_gates 8>, <&mmc0_clk>;
101 + clock-names = "ahb", "mod";
102 + interrupts = <0 32 4>;
103 + bus-width = <4>;
104 + cd-inverted;
105 + status = "disabled";
106 + };
107 +
108 + mmc1: mmc@01c10000 {
109 + compatible = "allwinner,sun5i-a13-mmc";
110 + reg = <0x01c10000 0x1000>;
111 + clocks = <&ahb_gates 9>, <&mmc1_clk>;
112 + clock-names = "ahb", "mod";
113 + interrupts = <0 33 4>;
114 + bus-width = <4>;
115 + cd-inverted;
116 + status = "disabled";
117 + };
118 +
119 + mmc2: mmc@01c11000 {
120 + compatible = "allwinner,sun5i-a13-mmc";
121 + reg = <0x01c11000 0x1000>;
122 + clocks = <&ahb_gates 10>, <&mmc2_clk>;
123 + clock-names = "ahb", "mod";
124 + interrupts = <0 34 4>;
125 + bus-width = <4>;
126 + cd-inverted;
127 + status = "disabled";
128 + };
129 +
130 + mmc3: mmc@01c12000 {
131 + compatible = "allwinner,sun5i-a13-mmc";
132 + reg = <0x01c12000 0x1000>;
133 + clocks = <&ahb_gates 11>, <&mmc3_clk>;
134 + clock-names = "ahb", "mod";
135 + interrupts = <0 35 4>;
136 + bus-width = <4>;
137 + cd-inverted;
138 + status = "disabled";
139 + };
140 +
141 usbphy: phy@01c13400 {
142 #phy-cells = <1>;
143 compatible = "allwinner,sun7i-a20-usb-phy";
144 @@ -645,6 +689,27 @@
145 allwinner,drive = <0>;
146 allwinner,pull = <0>;
147 };
148 +
149 + mmc0_pins_a: mmc0@0 {
150 + allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
151 + allwinner,function = "mmc0";
152 + allwinner,drive = <2>;
153 + allwinner,pull = <0>;
154 + };
155 +
156 + mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
157 + allwinner,pins = "PH1";
158 + allwinner,function = "gpio_in";
159 + allwinner,drive = <0>;
160 + allwinner,pull = <1>;
161 + };
162 +
163 + mmc3_pins_a: mmc3@0 {
164 + allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9";
165 + allwinner,function = "mmc3";
166 + allwinner,drive = <2>;
167 + allwinner,pull = <0>;
168 + };
169 };
170
171 timer@01c20c00 {