uboot-lantiq: update to v2013.10
[openwrt/svn-archive/archive.git] / package / boot / uboot-lantiq / patches / 0006-sf-add-support-for-4-byte-addressing.patch
1 From 3af3addee645bd81537be1ddee49969f8dfc64ee Mon Sep 17 00:00:00 2001
2 From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 Date: Sun, 13 Oct 2013 15:24:56 +0200
4 Subject: sf: add support for 4-byte addressing
5
6 Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
7
8 diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
9 index 732ddf8..c5e8eb1 100644
10 --- a/drivers/mtd/spi/sf_internal.h
11 +++ b/drivers/mtd/spi/sf_internal.h
12 @@ -38,12 +38,14 @@
13 #define CMD_READ_ID 0x9f
14
15 /* Bank addr access commands */
16 -#ifdef CONFIG_SPI_FLASH_BAR
17 -# define CMD_BANKADDR_BRWR 0x17
18 -# define CMD_BANKADDR_BRRD 0x16
19 -# define CMD_EXTNADDR_WREAR 0xC5
20 -# define CMD_EXTNADDR_RDEAR 0xC8
21 -#endif
22 +#define CMD_BANKADDR_BRWR 0x17
23 +#define CMD_BANKADDR_BRRD 0x16
24 +#define CMD_EXTNADDR_WREAR 0xC5
25 +#define CMD_EXTNADDR_RDEAR 0xC8
26 +
27 +/* Macronix style 4-byte addressing */
28 +#define CMD_EN4B 0xb7
29 +#define CMD_EX4B 0xe9
30
31 /* Common status */
32 #define STATUS_WIP 0x01
33 diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
34 index 207adf5..1d072f8 100644
35 --- a/drivers/mtd/spi/sf_ops.c
36 +++ b/drivers/mtd/spi/sf_ops.c
37 @@ -21,6 +21,7 @@ static void spi_flash_addr(const struct spi_flash *flash, u32 addr, u8 *cmd)
38 cmd[1] = addr >> (flash->addr_width * 8 - 8);
39 cmd[2] = addr >> (flash->addr_width * 8 - 16);
40 cmd[3] = addr >> (flash->addr_width * 8 - 24);
41 + cmd[4] = addr >> (flash->addr_width * 8 - 32);
42 }
43
44 static int spi_flash_cmdsz(const struct spi_flash *flash)
45 @@ -163,7 +164,7 @@ int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
46 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
47 {
48 u32 erase_size;
49 - u8 cmd[4], cmd_len;
50 + u8 cmd[5], cmd_len;
51 int ret = -1;
52
53 erase_size = flash->erase_size;
54 @@ -188,8 +189,8 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
55 spi_flash_addr(flash, offset, cmd);
56 cmd_len = spi_flash_cmdsz(flash);
57
58 - debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
59 - cmd[2], cmd[3], offset);
60 + debug("SF: erase %2x %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
61 + cmd[2], cmd[3], cmd[4], offset);
62
63 ret = spi_flash_write_common(flash, cmd, cmd_len, NULL, 0);
64 if (ret < 0) {
65 @@ -212,7 +213,7 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
66 {
67 unsigned long byte_addr, page_size;
68 size_t chunk_len, actual;
69 - u8 cmd[4], cmd_len;
70 + u8 cmd[5], cmd_len;
71 int ret = -1;
72
73 ret = spi_claim_bus(flash->spi);
74 @@ -239,8 +240,8 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
75 spi_flash_addr(flash, offset, cmd);
76 cmd_len = spi_flash_cmdsz(flash);
77
78 - debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
79 - buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
80 + debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x%02x } chunk_len = %zu\n",
81 + buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4], chunk_len);
82
83 ret = spi_flash_write_common(flash, cmd, cmd_len,
84 buf + actual, chunk_len);
85 @@ -276,9 +277,13 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
86 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
87 size_t len, void *data)
88 {
89 - u8 cmd[5], cmd_len, bank_sel = 0;
90 - u32 remain_len, read_len;
91 + u8 cmd[6], cmd_len;
92 + u32 read_len;
93 int ret = -1;
94 +#ifdef CONFIG_SPI_FLASH_BAR
95 + u8 bank_sel = 0;
96 + u32 remain_len;
97 +#endif
98
99 ret = spi_claim_bus(flash->spi);
100 if (ret) {
101 @@ -305,12 +310,15 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
102 debug("SF: fail to set bank%d\n", bank_sel);
103 goto done;
104 }
105 -#endif
106 +
107 remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1)) - offset;
108 if (len < remain_len)
109 read_len = len;
110 else
111 read_len = remain_len;
112 +#else
113 + read_len = len;
114 +#endif
115
116 spi_flash_addr(flash, offset, cmd);
117 cmd_len = spi_flash_cmdsz(flash);
118 diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
119 index 84289db..ac44287 100644
120 --- a/drivers/mtd/spi/sf_probe.c
121 +++ b/drivers/mtd/spi/sf_probe.c
122 @@ -153,6 +153,25 @@ static const struct spi_flash_params spi_flash_params_table[] = {
123 */
124 };
125
126 +int spi_flash_4byte_set(struct spi_flash *flash, u8 idcode0, int enable)
127 +{
128 + u8 cmd, bankaddr;
129 +
130 + switch (idcode0) {
131 + case 0xc2:
132 + case 0xef:
133 + case 0x1c:
134 + /* Macronix style */
135 + cmd = enable ? CMD_EN4B : CMD_EX4B;
136 + return spi_flash_cmd(flash->spi, cmd, NULL, 0);
137 + default:
138 + /* Spansion style */
139 + cmd = CMD_BANKADDR_BRWR;
140 + bankaddr = enable << 7;
141 + return spi_flash_cmd_write(flash->spi, &cmd, 1, &bankaddr, 1);
142 + }
143 +}
144 +
145 static int spi_flash_validate_params(struct spi_flash *flash,
146 u8 *idcode)
147 {
148 @@ -218,8 +237,18 @@ static int spi_flash_validate_params(struct spi_flash *flash,
149 flash->poll_cmd = CMD_FLAG_STATUS;
150 #endif
151
152 +#ifndef CONFIG_SPI_FLASH_BAR
153 + /* enable 4-byte addressing if the device exceeds 16MiB */
154 + if (flash->size > SPI_FLASH_16MB_BOUN) {
155 + flash->addr_width = 4;
156 + spi_flash_4byte_set(flash, idcode[0], 1);
157 + } else {
158 + flash->addr_width = 3;
159 + }
160 +#else
161 /* Configure default 3-byte addressing */
162 flash->addr_width = 3;
163 +#endif
164
165 /* Configure the BAR - discover bank cmds and read current bank */
166 #ifdef CONFIG_SPI_FLASH_BAR
167 --
168 1.8.3.2
169