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33f6737c19d0b7329aeb47aa328a5b022638a3bc
[openwrt/svn-archive/archive.git] / package / mac80211 / patches / 300-pending_work.patch
1 --- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
2 +++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
3 @@ -622,7 +622,7 @@ ath5k_conf_tx(struct ieee80211_hw *hw, s
4 qi.tqi_aifs = params->aifs;
5 qi.tqi_cw_min = params->cw_min;
6 qi.tqi_cw_max = params->cw_max;
7 - qi.tqi_burst_time = params->txop;
8 + qi.tqi_burst_time = params->txop * 32;
9
10 ATH5K_DBG(ah, ATH5K_DEBUG_ANY,
11 "Configure tx [queue %d], "
12 --- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
13 +++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
14 @@ -26,106 +26,74 @@
15 static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
16 {
17 if (AR_SREV_9271(ah)) {
18 - INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271,
19 - ARRAY_SIZE(ar9271Modes_9271), 5);
20 - INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271,
21 - ARRAY_SIZE(ar9271Common_9271), 2);
22 - INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg,
23 - ARRAY_SIZE(ar9271Modes_9271_ANI_reg), 5);
24 + INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
25 + INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
26 + INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
27 return;
28 }
29
30 if (ah->config.pcie_clock_req)
31 INIT_INI_ARRAY(&ah->iniPcieSerdes,
32 - ar9280PciePhy_clkreq_off_L1_9280,
33 - ARRAY_SIZE(ar9280PciePhy_clkreq_off_L1_9280), 2);
34 + ar9280PciePhy_clkreq_off_L1_9280);
35 else
36 INIT_INI_ARRAY(&ah->iniPcieSerdes,
37 - ar9280PciePhy_clkreq_always_on_L1_9280,
38 - ARRAY_SIZE(ar9280PciePhy_clkreq_always_on_L1_9280), 2);
39 + ar9280PciePhy_clkreq_always_on_L1_9280);
40 #ifdef CONFIG_PM_SLEEP
41 INIT_INI_ARRAY(&ah->iniPcieSerdesWow,
42 - ar9280PciePhy_awow,
43 - ARRAY_SIZE(ar9280PciePhy_awow), 2);
44 + ar9280PciePhy_awow);
45 #endif
46
47 if (AR_SREV_9287_11_OR_LATER(ah)) {
48 - INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1,
49 - ARRAY_SIZE(ar9287Modes_9287_1_1), 5);
50 - INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1,
51 - ARRAY_SIZE(ar9287Common_9287_1_1), 2);
52 + INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1);
53 + INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1);
54 } else if (AR_SREV_9285_12_OR_LATER(ah)) {
55 - INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2,
56 - ARRAY_SIZE(ar9285Modes_9285_1_2), 5);
57 - INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2,
58 - ARRAY_SIZE(ar9285Common_9285_1_2), 2);
59 + INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2);
60 + INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2);
61 } else if (AR_SREV_9280_20_OR_LATER(ah)) {
62 - INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2,
63 - ARRAY_SIZE(ar9280Modes_9280_2), 5);
64 - INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2,
65 - ARRAY_SIZE(ar9280Common_9280_2), 2);
66 + INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2);
67 + INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2);
68
69 INIT_INI_ARRAY(&ah->iniModesFastClock,
70 - ar9280Modes_fast_clock_9280_2,
71 - ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3);
72 + ar9280Modes_fast_clock_9280_2);
73 } else if (AR_SREV_9160_10_OR_LATER(ah)) {
74 - INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160,
75 - ARRAY_SIZE(ar5416Modes_9160), 5);
76 - INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160,
77 - ARRAY_SIZE(ar5416Common_9160), 2);
78 + INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160);
79 + INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160);
80 if (AR_SREV_9160_11(ah)) {
81 INIT_INI_ARRAY(&ah->iniAddac,
82 - ar5416Addac_9160_1_1,
83 - ARRAY_SIZE(ar5416Addac_9160_1_1), 2);
84 + ar5416Addac_9160_1_1);
85 } else {
86 - INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9160,
87 - ARRAY_SIZE(ar5416Addac_9160), 2);
88 + INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9160);
89 }
90 } else if (AR_SREV_9100_OR_LATER(ah)) {
91 - INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100,
92 - ARRAY_SIZE(ar5416Modes_9100), 5);
93 - INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100,
94 - ARRAY_SIZE(ar5416Common_9100), 2);
95 - INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100,
96 - ARRAY_SIZE(ar5416Bank6_9100), 3);
97 - INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100,
98 - ARRAY_SIZE(ar5416Addac_9100), 2);
99 + INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100);
100 + INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100);
101 + INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100);
102 + INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100);
103 } else {
104 - INIT_INI_ARRAY(&ah->iniModes, ar5416Modes,
105 - ARRAY_SIZE(ar5416Modes), 5);
106 - INIT_INI_ARRAY(&ah->iniCommon, ar5416Common,
107 - ARRAY_SIZE(ar5416Common), 2);
108 - INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC,
109 - ARRAY_SIZE(ar5416Bank6TPC), 3);
110 - INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac,
111 - ARRAY_SIZE(ar5416Addac), 2);
112 + INIT_INI_ARRAY(&ah->iniModes, ar5416Modes);
113 + INIT_INI_ARRAY(&ah->iniCommon, ar5416Common);
114 + INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC);
115 + INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac);
116 }
117
118 if (!AR_SREV_9280_20_OR_LATER(ah)) {
119 /* Common for AR5416, AR913x, AR9160 */
120 - INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain,
121 - ARRAY_SIZE(ar5416BB_RfGain), 3);
122 + INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain);
123
124 - INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0,
125 - ARRAY_SIZE(ar5416Bank0), 2);
126 - INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1,
127 - ARRAY_SIZE(ar5416Bank1), 2);
128 - INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2,
129 - ARRAY_SIZE(ar5416Bank2), 2);
130 - INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3,
131 - ARRAY_SIZE(ar5416Bank3), 3);
132 - INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7,
133 - ARRAY_SIZE(ar5416Bank7), 2);
134 + INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0);
135 + INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1);
136 + INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2);
137 + INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3);
138 + INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7);
139
140 /* Common for AR5416, AR9160 */
141 if (!AR_SREV_9100(ah))
142 - INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6,
143 - ARRAY_SIZE(ar5416Bank6), 3);
144 + INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6);
145
146 /* Common for AR913x, AR9160 */
147 if (!AR_SREV_5416(ah))
148 - INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC_9100,
149 - ARRAY_SIZE(ar5416Bank6TPC_9100), 3);
150 + INIT_INI_ARRAY(&ah->iniBank6TPC,
151 + ar5416Bank6TPC_9100);
152 }
153
154 /* iniAddac needs to be modified for these chips */
155 @@ -148,13 +116,9 @@ static void ar9002_hw_init_mode_regs(str
156 }
157 if (AR_SREV_9287_11_OR_LATER(ah)) {
158 INIT_INI_ARRAY(&ah->iniCckfirNormal,
159 - ar9287Common_normal_cck_fir_coeff_9287_1_1,
160 - ARRAY_SIZE(ar9287Common_normal_cck_fir_coeff_9287_1_1),
161 - 2);
162 + ar9287Common_normal_cck_fir_coeff_9287_1_1);
163 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
164 - ar9287Common_japan_2484_cck_fir_coeff_9287_1_1,
165 - ARRAY_SIZE(ar9287Common_japan_2484_cck_fir_coeff_9287_1_1),
166 - 2);
167 + ar9287Common_japan_2484_cck_fir_coeff_9287_1_1);
168 }
169 }
170
171 @@ -168,20 +132,16 @@ static void ar9280_20_hw_init_rxgain_ini
172
173 if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF)
174 INIT_INI_ARRAY(&ah->iniModesRxGain,
175 - ar9280Modes_backoff_13db_rxgain_9280_2,
176 - ARRAY_SIZE(ar9280Modes_backoff_13db_rxgain_9280_2), 5);
177 + ar9280Modes_backoff_13db_rxgain_9280_2);
178 else if (rxgain_type == AR5416_EEP_RXGAIN_23DB_BACKOFF)
179 INIT_INI_ARRAY(&ah->iniModesRxGain,
180 - ar9280Modes_backoff_23db_rxgain_9280_2,
181 - ARRAY_SIZE(ar9280Modes_backoff_23db_rxgain_9280_2), 5);
182 + ar9280Modes_backoff_23db_rxgain_9280_2);
183 else
184 INIT_INI_ARRAY(&ah->iniModesRxGain,
185 - ar9280Modes_original_rxgain_9280_2,
186 - ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
187 + ar9280Modes_original_rxgain_9280_2);
188 } else {
189 INIT_INI_ARRAY(&ah->iniModesRxGain,
190 - ar9280Modes_original_rxgain_9280_2,
191 - ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
192 + ar9280Modes_original_rxgain_9280_2);
193 }
194 }
195
196 @@ -191,16 +151,13 @@ static void ar9280_20_hw_init_txgain_ini
197 AR5416_EEP_MINOR_VER_19) {
198 if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
199 INIT_INI_ARRAY(&ah->iniModesTxGain,
200 - ar9280Modes_high_power_tx_gain_9280_2,
201 - ARRAY_SIZE(ar9280Modes_high_power_tx_gain_9280_2), 5);
202 + ar9280Modes_high_power_tx_gain_9280_2);
203 else
204 INIT_INI_ARRAY(&ah->iniModesTxGain,
205 - ar9280Modes_original_tx_gain_9280_2,
206 - ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
207 + ar9280Modes_original_tx_gain_9280_2);
208 } else {
209 INIT_INI_ARRAY(&ah->iniModesTxGain,
210 - ar9280Modes_original_tx_gain_9280_2,
211 - ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
212 + ar9280Modes_original_tx_gain_9280_2);
213 }
214 }
215
216 @@ -208,12 +165,10 @@ static void ar9271_hw_init_txgain_ini(st
217 {
218 if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
219 INIT_INI_ARRAY(&ah->iniModesTxGain,
220 - ar9271Modes_high_power_tx_gain_9271,
221 - ARRAY_SIZE(ar9271Modes_high_power_tx_gain_9271), 5);
222 + ar9271Modes_high_power_tx_gain_9271);
223 else
224 INIT_INI_ARRAY(&ah->iniModesTxGain,
225 - ar9271Modes_normal_power_tx_gain_9271,
226 - ARRAY_SIZE(ar9271Modes_normal_power_tx_gain_9271), 5);
227 + ar9271Modes_normal_power_tx_gain_9271);
228 }
229
230 static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah)
231 @@ -222,8 +177,7 @@ static void ar9002_hw_init_mode_gain_reg
232
233 if (AR_SREV_9287_11_OR_LATER(ah))
234 INIT_INI_ARRAY(&ah->iniModesRxGain,
235 - ar9287Modes_rx_gain_9287_1_1,
236 - ARRAY_SIZE(ar9287Modes_rx_gain_9287_1_1), 5);
237 + ar9287Modes_rx_gain_9287_1_1);
238 else if (AR_SREV_9280_20(ah))
239 ar9280_20_hw_init_rxgain_ini(ah);
240
241 @@ -231,8 +185,7 @@ static void ar9002_hw_init_mode_gain_reg
242 ar9271_hw_init_txgain_ini(ah, txgain_type);
243 } else if (AR_SREV_9287_11_OR_LATER(ah)) {
244 INIT_INI_ARRAY(&ah->iniModesTxGain,
245 - ar9287Modes_tx_gain_9287_1_1,
246 - ARRAY_SIZE(ar9287Modes_tx_gain_9287_1_1), 5);
247 + ar9287Modes_tx_gain_9287_1_1);
248 } else if (AR_SREV_9280_20(ah)) {
249 ar9280_20_hw_init_txgain_ini(ah, txgain_type);
250 } else if (AR_SREV_9285_12_OR_LATER(ah)) {
251 @@ -240,26 +193,18 @@ static void ar9002_hw_init_mode_gain_reg
252 if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER) {
253 if (AR_SREV_9285E_20(ah)) {
254 INIT_INI_ARRAY(&ah->iniModesTxGain,
255 - ar9285Modes_XE2_0_high_power,
256 - ARRAY_SIZE(
257 - ar9285Modes_XE2_0_high_power), 5);
258 + ar9285Modes_XE2_0_high_power);
259 } else {
260 INIT_INI_ARRAY(&ah->iniModesTxGain,
261 - ar9285Modes_high_power_tx_gain_9285_1_2,
262 - ARRAY_SIZE(
263 - ar9285Modes_high_power_tx_gain_9285_1_2), 5);
264 + ar9285Modes_high_power_tx_gain_9285_1_2);
265 }
266 } else {
267 if (AR_SREV_9285E_20(ah)) {
268 INIT_INI_ARRAY(&ah->iniModesTxGain,
269 - ar9285Modes_XE2_0_normal_power,
270 - ARRAY_SIZE(
271 - ar9285Modes_XE2_0_normal_power), 5);
272 + ar9285Modes_XE2_0_normal_power);
273 } else {
274 INIT_INI_ARRAY(&ah->iniModesTxGain,
275 - ar9285Modes_original_tx_gain_9285_1_2,
276 - ARRAY_SIZE(
277 - ar9285Modes_original_tx_gain_9285_1_2), 5);
278 + ar9285Modes_original_tx_gain_9285_1_2);
279 }
280 }
281 }
282 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
283 +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
284 @@ -131,8 +131,9 @@ static const struct ar9300_eeprom ar9300
285 .thresh62 = 28,
286 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
287 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
288 + .xlna_bias_strength = 0,
289 .futureModal = {
290 - 0, 0, 0, 0, 0, 0, 0, 0,
291 + 0, 0, 0, 0, 0, 0, 0,
292 },
293 },
294 .base_ext1 = {
295 @@ -331,8 +332,9 @@ static const struct ar9300_eeprom ar9300
296 .thresh62 = 28,
297 .papdRateMaskHt20 = LE32(0x0c80c080),
298 .papdRateMaskHt40 = LE32(0x0080c080),
299 + .xlna_bias_strength = 0,
300 .futureModal = {
301 - 0, 0, 0, 0, 0, 0, 0, 0,
302 + 0, 0, 0, 0, 0, 0, 0,
303 },
304 },
305 .base_ext2 = {
306 @@ -704,8 +706,9 @@ static const struct ar9300_eeprom ar9300
307 .thresh62 = 28,
308 .papdRateMaskHt20 = LE32(0x0c80c080),
309 .papdRateMaskHt40 = LE32(0x0080c080),
310 + .xlna_bias_strength = 0,
311 .futureModal = {
312 - 0, 0, 0, 0, 0, 0, 0, 0,
313 + 0, 0, 0, 0, 0, 0, 0,
314 },
315 },
316 .base_ext1 = {
317 @@ -904,8 +907,9 @@ static const struct ar9300_eeprom ar9300
318 .thresh62 = 28,
319 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
320 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
321 + .xlna_bias_strength = 0,
322 .futureModal = {
323 - 0, 0, 0, 0, 0, 0, 0, 0,
324 + 0, 0, 0, 0, 0, 0, 0,
325 },
326 },
327 .base_ext2 = {
328 @@ -1278,8 +1282,9 @@ static const struct ar9300_eeprom ar9300
329 .thresh62 = 28,
330 .papdRateMaskHt20 = LE32(0x0c80c080),
331 .papdRateMaskHt40 = LE32(0x0080c080),
332 + .xlna_bias_strength = 0,
333 .futureModal = {
334 - 0, 0, 0, 0, 0, 0, 0, 0,
335 + 0, 0, 0, 0, 0, 0, 0,
336 },
337 },
338 .base_ext1 = {
339 @@ -1478,8 +1483,9 @@ static const struct ar9300_eeprom ar9300
340 .thresh62 = 28,
341 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
342 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
343 + .xlna_bias_strength = 0,
344 .futureModal = {
345 - 0, 0, 0, 0, 0, 0, 0, 0,
346 + 0, 0, 0, 0, 0, 0, 0,
347 },
348 },
349 .base_ext2 = {
350 @@ -1852,8 +1858,9 @@ static const struct ar9300_eeprom ar9300
351 .thresh62 = 28,
352 .papdRateMaskHt20 = LE32(0x0c80c080),
353 .papdRateMaskHt40 = LE32(0x0080c080),
354 + .xlna_bias_strength = 0,
355 .futureModal = {
356 - 0, 0, 0, 0, 0, 0, 0, 0,
357 + 0, 0, 0, 0, 0, 0, 0,
358 },
359 },
360 .base_ext1 = {
361 @@ -2052,8 +2059,9 @@ static const struct ar9300_eeprom ar9300
362 .thresh62 = 28,
363 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
364 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
365 + .xlna_bias_strength = 0,
366 .futureModal = {
367 - 0, 0, 0, 0, 0, 0, 0, 0,
368 + 0, 0, 0, 0, 0, 0, 0,
369 },
370 },
371 .base_ext2 = {
372 @@ -2425,8 +2433,9 @@ static const struct ar9300_eeprom ar9300
373 .thresh62 = 28,
374 .papdRateMaskHt20 = LE32(0x0c80C080),
375 .papdRateMaskHt40 = LE32(0x0080C080),
376 + .xlna_bias_strength = 0,
377 .futureModal = {
378 - 0, 0, 0, 0, 0, 0, 0, 0,
379 + 0, 0, 0, 0, 0, 0, 0,
380 },
381 },
382 .base_ext1 = {
383 @@ -2625,8 +2634,9 @@ static const struct ar9300_eeprom ar9300
384 .thresh62 = 28,
385 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
386 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
387 + .xlna_bias_strength = 0,
388 .futureModal = {
389 - 0, 0, 0, 0, 0, 0, 0, 0,
390 + 0, 0, 0, 0, 0, 0, 0,
391 },
392 },
393 .base_ext2 = {
394 @@ -2971,14 +2981,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
395 return (pBase->txrxMask >> 4) & 0xf;
396 case EEP_RX_MASK:
397 return pBase->txrxMask & 0xf;
398 - case EEP_DRIVE_STRENGTH:
399 -#define AR9300_EEP_BASE_DRIV_STRENGTH 0x1
400 - return pBase->miscConfiguration & AR9300_EEP_BASE_DRIV_STRENGTH;
401 - case EEP_INTERNAL_REGULATOR:
402 - /* Bit 4 is internal regulator flag */
403 - return (pBase->featureEnable & 0x10) >> 4;
404 - case EEP_SWREG:
405 - return le32_to_cpu(pBase->swreg);
406 case EEP_PAPRD:
407 return !!(pBase->featureEnable & BIT(5));
408 case EEP_CHAIN_MASK_REDUCE:
409 @@ -2989,8 +2991,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
410 return eep->modalHeader5G.antennaGain;
411 case EEP_ANTENNA_GAIN_2G:
412 return eep->modalHeader2G.antennaGain;
413 - case EEP_QUICK_DROP:
414 - return pBase->miscConfiguration & BIT(1);
415 default:
416 return 0;
417 }
418 @@ -3260,10 +3260,20 @@ static int ar9300_eeprom_restore_interna
419 int it;
420 u16 checksum, mchecksum;
421 struct ath_common *common = ath9k_hw_common(ah);
422 + struct ar9300_eeprom *eep;
423 eeprom_read_op read;
424
425 - if (ath9k_hw_use_flash(ah))
426 - return ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
427 + if (ath9k_hw_use_flash(ah)) {
428 + u8 txrx;
429 +
430 + ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
431 +
432 + /* check if eeprom contains valid data */
433 + eep = (struct ar9300_eeprom *) mptr;
434 + txrx = eep->baseEepHeader.txrxMask;
435 + if (txrx != 0 && txrx != 0xff)
436 + return 0;
437 + }
438
439 word = kzalloc(2048, GFP_KERNEL);
440 if (!word)
441 @@ -3493,19 +3503,20 @@ static int ath9k_hw_ar9300_get_eeprom_re
442 return 0;
443 }
444
445 -static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
446 +static struct ar9300_modal_eep_header *ar9003_modal_header(struct ath_hw *ah,
447 + bool is2ghz)
448 {
449 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
450
451 if (is2ghz)
452 - return eep->modalHeader2G.xpaBiasLvl;
453 + return &eep->modalHeader2G;
454 else
455 - return eep->modalHeader5G.xpaBiasLvl;
456 + return &eep->modalHeader5G;
457 }
458
459 static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
460 {
461 - int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz);
462 + int bias = ar9003_modal_header(ah, is2ghz)->xpaBiasLvl;
463
464 if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
465 REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
466 @@ -3521,57 +3532,26 @@ static void ar9003_hw_xpa_bias_level_app
467 }
468 }
469
470 -static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is_2ghz)
471 +static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is2ghz)
472 {
473 - struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
474 - __le16 val;
475 -
476 - if (is_2ghz)
477 - val = eep->modalHeader2G.switchcomspdt;
478 - else
479 - val = eep->modalHeader5G.switchcomspdt;
480 - return le16_to_cpu(val);
481 + return le16_to_cpu(ar9003_modal_header(ah, is2ghz)->switchcomspdt);
482 }
483
484
485 static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
486 {
487 - struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
488 - __le32 val;
489 -
490 - if (is2ghz)
491 - val = eep->modalHeader2G.antCtrlCommon;
492 - else
493 - val = eep->modalHeader5G.antCtrlCommon;
494 - return le32_to_cpu(val);
495 + return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon);
496 }
497
498 static u32 ar9003_hw_ant_ctrl_common_2_get(struct ath_hw *ah, bool is2ghz)
499 {
500 - struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
501 - __le32 val;
502 -
503 - if (is2ghz)
504 - val = eep->modalHeader2G.antCtrlCommon2;
505 - else
506 - val = eep->modalHeader5G.antCtrlCommon2;
507 - return le32_to_cpu(val);
508 + return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon2);
509 }
510
511 -static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah,
512 - int chain,
513 +static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah, int chain,
514 bool is2ghz)
515 {
516 - struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
517 - __le16 val = 0;
518 -
519 - if (chain >= 0 && chain < AR9300_MAX_CHAINS) {
520 - if (is2ghz)
521 - val = eep->modalHeader2G.antCtrlChain[chain];
522 - else
523 - val = eep->modalHeader5G.antCtrlChain[chain];
524 - }
525 -
526 + __le16 val = ar9003_modal_header(ah, is2ghz)->antCtrlChain[chain];
527 return le16_to_cpu(val);
528 }
529
530 @@ -3681,11 +3661,12 @@ static void ar9003_hw_ant_ctrl_apply(str
531
532 static void ar9003_hw_drive_strength_apply(struct ath_hw *ah)
533 {
534 + struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
535 + struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
536 int drive_strength;
537 unsigned long reg;
538
539 - drive_strength = ath9k_hw_ar9300_get_eeprom(ah, EEP_DRIVE_STRENGTH);
540 -
541 + drive_strength = pBase->miscConfiguration & BIT(0);
542 if (!drive_strength)
543 return;
544
545 @@ -3815,11 +3796,11 @@ static bool is_pmu_set(struct ath_hw *ah
546
547 void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
548 {
549 - int internal_regulator =
550 - ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR);
551 + struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
552 + struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
553 u32 reg_val;
554
555 - if (internal_regulator) {
556 + if (pBase->featureEnable & BIT(4)) {
557 if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
558 int reg_pmu_set;
559
560 @@ -3863,11 +3844,11 @@ void ar9003_hw_internal_regulator_apply(
561 if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))
562 return;
563 } else if (AR_SREV_9462(ah)) {
564 - reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
565 + reg_val = le32_to_cpu(pBase->swreg);
566 REG_WRITE(ah, AR_PHY_PMU1, reg_val);
567 } else {
568 /* Internal regulator is ON. Write swreg register. */
569 - reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
570 + reg_val = le32_to_cpu(pBase->swreg);
571 REG_WRITE(ah, AR_RTC_REG_CONTROL1,
572 REG_READ(ah, AR_RTC_REG_CONTROL1) &
573 (~AR_RTC_REG_CONTROL1_SWREG_PROGRAM));
574 @@ -3909,6 +3890,9 @@ static void ar9003_hw_apply_tuning_caps(
575 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
576 u8 tuning_caps_param = eep->baseEepHeader.params_for_tuning_caps[0];
577
578 + if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
579 + return;
580 +
581 if (eep->baseEepHeader.featureEnable & 0x40) {
582 tuning_caps_param &= 0x7f;
583 REG_RMW_FIELD(ah, AR_CH0_XTAL, AR_CH0_XTAL_CAPINDAC,
584 @@ -3921,10 +3905,11 @@ static void ar9003_hw_apply_tuning_caps(
585 static void ar9003_hw_quick_drop_apply(struct ath_hw *ah, u16 freq)
586 {
587 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
588 - int quick_drop = ath9k_hw_ar9300_get_eeprom(ah, EEP_QUICK_DROP);
589 + struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
590 + int quick_drop;
591 s32 t[3], f[3] = {5180, 5500, 5785};
592
593 - if (!quick_drop)
594 + if (!(pBase->miscConfiguration & BIT(1)))
595 return;
596
597 if (freq < 4000)
598 @@ -3938,13 +3923,11 @@ static void ar9003_hw_quick_drop_apply(s
599 REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
600 }
601
602 -static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, u16 freq)
603 +static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, bool is2ghz)
604 {
605 - struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
606 u32 value;
607
608 - value = (freq < 4000) ? eep->modalHeader2G.txEndToXpaOff :
609 - eep->modalHeader5G.txEndToXpaOff;
610 + value = ar9003_modal_header(ah, is2ghz)->txEndToXpaOff;
611
612 REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
613 AR_PHY_XPA_TIMING_CTL_TX_END_XPAB_OFF, value);
614 @@ -3952,19 +3935,63 @@ static void ar9003_hw_txend_to_xpa_off_a
615 AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value);
616 }
617
618 +static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is2ghz)
619 +{
620 + struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
621 + u8 xpa_ctl;
622 +
623 + if (!(eep->baseEepHeader.featureEnable & 0x80))
624 + return;
625 +
626 + if (!AR_SREV_9300(ah) && !AR_SREV_9340(ah) && !AR_SREV_9580(ah))
627 + return;
628 +
629 + xpa_ctl = ar9003_modal_header(ah, is2ghz)->txFrameToXpaOn;
630 + if (is2ghz)
631 + REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
632 + AR_PHY_XPA_TIMING_CTL_FRAME_XPAB_ON, xpa_ctl);
633 + else
634 + REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
635 + AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
636 +}
637 +
638 +static void ar9003_hw_xlna_bias_strength_apply(struct ath_hw *ah, bool is2ghz)
639 +{
640 + struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
641 + u8 bias;
642 +
643 + if (!(eep->baseEepHeader.featureEnable & 0x40))
644 + return;
645 +
646 + if (!AR_SREV_9300(ah))
647 + return;
648 +
649 + bias = ar9003_modal_header(ah, is2ghz)->xlna_bias_strength;
650 + REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
651 + bias & 0x3);
652 + bias >>= 2;
653 + REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
654 + bias & 0x3);
655 + bias >>= 2;
656 + REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
657 + bias & 0x3);
658 +}
659 +
660 static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
661 struct ath9k_channel *chan)
662 {
663 - ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
664 - ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
665 + bool is2ghz = IS_CHAN_2GHZ(chan);
666 + ar9003_hw_xpa_timing_control_apply(ah, is2ghz);
667 + ar9003_hw_xpa_bias_level_apply(ah, is2ghz);
668 + ar9003_hw_ant_ctrl_apply(ah, is2ghz);
669 ar9003_hw_drive_strength_apply(ah);
670 + ar9003_hw_xlna_bias_strength_apply(ah, is2ghz);
671 ar9003_hw_atten_apply(ah, chan);
672 ar9003_hw_quick_drop_apply(ah, chan->channel);
673 if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah) && !AR_SREV_9550(ah))
674 ar9003_hw_internal_regulator_apply(ah);
675 - if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
676 - ar9003_hw_apply_tuning_caps(ah);
677 - ar9003_hw_txend_to_xpa_off_apply(ah, chan->channel);
678 + ar9003_hw_apply_tuning_caps(ah);
679 + ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);
680 }
681
682 static void ath9k_hw_ar9300_set_addac(struct ath_hw *ah,
683 @@ -5100,14 +5127,9 @@ s32 ar9003_hw_get_rx_gain_idx(struct ath
684 return (eep->baseEepHeader.txrxgain) & 0xf; /* bits 3:0 */
685 }
686
687 -u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is_2ghz)
688 +u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is2ghz)
689 {
690 - struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
691 -
692 - if (is_2ghz)
693 - return eep->modalHeader2G.spurChans;
694 - else
695 - return eep->modalHeader5G.spurChans;
696 + return ar9003_modal_header(ah, is2ghz)->spurChans;
697 }
698
699 unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah,
700 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
701 +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
702 @@ -231,7 +231,8 @@ struct ar9300_modal_eep_header {
703 __le32 papdRateMaskHt20;
704 __le32 papdRateMaskHt40;
705 __le16 switchcomspdt;
706 - u8 futureModal[8];
707 + u8 xlna_bias_strength;
708 + u8 futureModal[7];
709 } __packed;
710
711 struct ar9300_cal_data_per_freq_op_loop {
712 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
713 +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
714 @@ -44,462 +44,310 @@ static void ar9003_hw_init_mode_regs(str
715 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
716 if (AR_SREV_9330_11(ah)) {
717 /* mac */
718 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
719 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
720 - ar9331_1p1_mac_core,
721 - ARRAY_SIZE(ar9331_1p1_mac_core), 2);
722 + ar9331_1p1_mac_core);
723 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
724 - ar9331_1p1_mac_postamble,
725 - ARRAY_SIZE(ar9331_1p1_mac_postamble), 5);
726 + ar9331_1p1_mac_postamble);
727
728 /* bb */
729 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
730 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
731 - ar9331_1p1_baseband_core,
732 - ARRAY_SIZE(ar9331_1p1_baseband_core), 2);
733 + ar9331_1p1_baseband_core);
734 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
735 - ar9331_1p1_baseband_postamble,
736 - ARRAY_SIZE(ar9331_1p1_baseband_postamble), 5);
737 + ar9331_1p1_baseband_postamble);
738
739 /* radio */
740 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
741 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
742 - ar9331_1p1_radio_core,
743 - ARRAY_SIZE(ar9331_1p1_radio_core), 2);
744 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
745 + ar9331_1p1_radio_core);
746
747 /* soc */
748 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
749 - ar9331_1p1_soc_preamble,
750 - ARRAY_SIZE(ar9331_1p1_soc_preamble), 2);
751 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
752 + ar9331_1p1_soc_preamble);
753 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
754 - ar9331_1p1_soc_postamble,
755 - ARRAY_SIZE(ar9331_1p1_soc_postamble), 2);
756 + ar9331_1p1_soc_postamble);
757
758 /* rx/tx gain */
759 INIT_INI_ARRAY(&ah->iniModesRxGain,
760 - ar9331_common_rx_gain_1p1,
761 - ARRAY_SIZE(ar9331_common_rx_gain_1p1), 2);
762 + ar9331_common_rx_gain_1p1);
763 INIT_INI_ARRAY(&ah->iniModesTxGain,
764 - ar9331_modes_lowest_ob_db_tx_gain_1p1,
765 - ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
766 - 5);
767 + ar9331_modes_lowest_ob_db_tx_gain_1p1);
768
769 /* additional clock settings */
770 if (ah->is_clk_25mhz)
771 INIT_INI_ARRAY(&ah->iniAdditional,
772 - ar9331_1p1_xtal_25M,
773 - ARRAY_SIZE(ar9331_1p1_xtal_25M), 2);
774 + ar9331_1p1_xtal_25M);
775 else
776 INIT_INI_ARRAY(&ah->iniAdditional,
777 - ar9331_1p1_xtal_40M,
778 - ARRAY_SIZE(ar9331_1p1_xtal_40M), 2);
779 + ar9331_1p1_xtal_40M);
780 } else if (AR_SREV_9330_12(ah)) {
781 /* mac */
782 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
783 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
784 - ar9331_1p2_mac_core,
785 - ARRAY_SIZE(ar9331_1p2_mac_core), 2);
786 + ar9331_1p2_mac_core);
787 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
788 - ar9331_1p2_mac_postamble,
789 - ARRAY_SIZE(ar9331_1p2_mac_postamble), 5);
790 + ar9331_1p2_mac_postamble);
791
792 /* bb */
793 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
794 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
795 - ar9331_1p2_baseband_core,
796 - ARRAY_SIZE(ar9331_1p2_baseband_core), 2);
797 + ar9331_1p2_baseband_core);
798 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
799 - ar9331_1p2_baseband_postamble,
800 - ARRAY_SIZE(ar9331_1p2_baseband_postamble), 5);
801 + ar9331_1p2_baseband_postamble);
802
803 /* radio */
804 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
805 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
806 - ar9331_1p2_radio_core,
807 - ARRAY_SIZE(ar9331_1p2_radio_core), 2);
808 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
809 + ar9331_1p2_radio_core);
810
811 /* soc */
812 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
813 - ar9331_1p2_soc_preamble,
814 - ARRAY_SIZE(ar9331_1p2_soc_preamble), 2);
815 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
816 + ar9331_1p2_soc_preamble);
817 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
818 - ar9331_1p2_soc_postamble,
819 - ARRAY_SIZE(ar9331_1p2_soc_postamble), 2);
820 + ar9331_1p2_soc_postamble);
821
822 /* rx/tx gain */
823 INIT_INI_ARRAY(&ah->iniModesRxGain,
824 - ar9331_common_rx_gain_1p2,
825 - ARRAY_SIZE(ar9331_common_rx_gain_1p2), 2);
826 + ar9331_common_rx_gain_1p2);
827 INIT_INI_ARRAY(&ah->iniModesTxGain,
828 - ar9331_modes_lowest_ob_db_tx_gain_1p2,
829 - ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
830 - 5);
831 + ar9331_modes_lowest_ob_db_tx_gain_1p2);
832
833 /* additional clock settings */
834 if (ah->is_clk_25mhz)
835 INIT_INI_ARRAY(&ah->iniAdditional,
836 - ar9331_1p2_xtal_25M,
837 - ARRAY_SIZE(ar9331_1p2_xtal_25M), 2);
838 + ar9331_1p2_xtal_25M);
839 else
840 INIT_INI_ARRAY(&ah->iniAdditional,
841 - ar9331_1p2_xtal_40M,
842 - ARRAY_SIZE(ar9331_1p2_xtal_40M), 2);
843 + ar9331_1p2_xtal_40M);
844 } else if (AR_SREV_9340(ah)) {
845 /* mac */
846 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
847 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
848 - ar9340_1p0_mac_core,
849 - ARRAY_SIZE(ar9340_1p0_mac_core), 2);
850 + ar9340_1p0_mac_core);
851 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
852 - ar9340_1p0_mac_postamble,
853 - ARRAY_SIZE(ar9340_1p0_mac_postamble), 5);
854 + ar9340_1p0_mac_postamble);
855
856 /* bb */
857 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
858 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
859 - ar9340_1p0_baseband_core,
860 - ARRAY_SIZE(ar9340_1p0_baseband_core), 2);
861 + ar9340_1p0_baseband_core);
862 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
863 - ar9340_1p0_baseband_postamble,
864 - ARRAY_SIZE(ar9340_1p0_baseband_postamble), 5);
865 + ar9340_1p0_baseband_postamble);
866
867 /* radio */
868 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
869 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
870 - ar9340_1p0_radio_core,
871 - ARRAY_SIZE(ar9340_1p0_radio_core), 2);
872 + ar9340_1p0_radio_core);
873 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
874 - ar9340_1p0_radio_postamble,
875 - ARRAY_SIZE(ar9340_1p0_radio_postamble), 5);
876 + ar9340_1p0_radio_postamble);
877
878 /* soc */
879 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
880 - ar9340_1p0_soc_preamble,
881 - ARRAY_SIZE(ar9340_1p0_soc_preamble), 2);
882 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
883 + ar9340_1p0_soc_preamble);
884 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
885 - ar9340_1p0_soc_postamble,
886 - ARRAY_SIZE(ar9340_1p0_soc_postamble), 5);
887 + ar9340_1p0_soc_postamble);
888
889 /* rx/tx gain */
890 INIT_INI_ARRAY(&ah->iniModesRxGain,
891 - ar9340Common_wo_xlna_rx_gain_table_1p0,
892 - ARRAY_SIZE(ar9340Common_wo_xlna_rx_gain_table_1p0),
893 - 5);
894 - INIT_INI_ARRAY(&ah->iniModesTxGain,
895 - ar9340Modes_high_ob_db_tx_gain_table_1p0,
896 - ARRAY_SIZE(ar9340Modes_high_ob_db_tx_gain_table_1p0),
897 - 5);
898 + ar9340Common_wo_xlna_rx_gain_table_1p0);
899 + INIT_INI_ARRAY(&ah->iniModesTxGain,
900 + ar9340Modes_high_ob_db_tx_gain_table_1p0);
901
902 INIT_INI_ARRAY(&ah->iniModesFastClock,
903 - ar9340Modes_fast_clock_1p0,
904 - ARRAY_SIZE(ar9340Modes_fast_clock_1p0),
905 - 3);
906 + ar9340Modes_fast_clock_1p0);
907
908 if (!ah->is_clk_25mhz)
909 INIT_INI_ARRAY(&ah->iniAdditional,
910 - ar9340_1p0_radio_core_40M,
911 - ARRAY_SIZE(ar9340_1p0_radio_core_40M),
912 - 2);
913 + ar9340_1p0_radio_core_40M);
914 } else if (AR_SREV_9485_11(ah)) {
915 /* mac */
916 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
917 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
918 - ar9485_1_1_mac_core,
919 - ARRAY_SIZE(ar9485_1_1_mac_core), 2);
920 + ar9485_1_1_mac_core);
921 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
922 - ar9485_1_1_mac_postamble,
923 - ARRAY_SIZE(ar9485_1_1_mac_postamble), 5);
924 + ar9485_1_1_mac_postamble);
925
926 /* bb */
927 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1,
928 - ARRAY_SIZE(ar9485_1_1), 2);
929 + INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1);
930 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
931 - ar9485_1_1_baseband_core,
932 - ARRAY_SIZE(ar9485_1_1_baseband_core), 2);
933 + ar9485_1_1_baseband_core);
934 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
935 - ar9485_1_1_baseband_postamble,
936 - ARRAY_SIZE(ar9485_1_1_baseband_postamble), 5);
937 + ar9485_1_1_baseband_postamble);
938
939 /* radio */
940 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
941 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
942 - ar9485_1_1_radio_core,
943 - ARRAY_SIZE(ar9485_1_1_radio_core), 2);
944 + ar9485_1_1_radio_core);
945 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
946 - ar9485_1_1_radio_postamble,
947 - ARRAY_SIZE(ar9485_1_1_radio_postamble), 2);
948 + ar9485_1_1_radio_postamble);
949
950 /* soc */
951 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
952 - ar9485_1_1_soc_preamble,
953 - ARRAY_SIZE(ar9485_1_1_soc_preamble), 2);
954 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
955 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], NULL, 0, 0);
956 + ar9485_1_1_soc_preamble);
957
958 /* rx/tx gain */
959 INIT_INI_ARRAY(&ah->iniModesRxGain,
960 - ar9485Common_wo_xlna_rx_gain_1_1,
961 - ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1), 2);
962 + ar9485Common_wo_xlna_rx_gain_1_1);
963 INIT_INI_ARRAY(&ah->iniModesTxGain,
964 - ar9485_modes_lowest_ob_db_tx_gain_1_1,
965 - ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
966 - 5);
967 + ar9485_modes_lowest_ob_db_tx_gain_1_1);
968
969 /* Load PCIE SERDES settings from INI */
970
971 /* Awake Setting */
972
973 INIT_INI_ARRAY(&ah->iniPcieSerdes,
974 - ar9485_1_1_pcie_phy_clkreq_disable_L1,
975 - ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1),
976 - 2);
977 + ar9485_1_1_pcie_phy_clkreq_disable_L1);
978
979 /* Sleep Setting */
980
981 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
982 - ar9485_1_1_pcie_phy_clkreq_disable_L1,
983 - ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1),
984 - 2);
985 + ar9485_1_1_pcie_phy_clkreq_disable_L1);
986 } else if (AR_SREV_9462_20(ah)) {
987
988 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
989 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core,
990 - ARRAY_SIZE(ar9462_2p0_mac_core), 2);
991 + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core);
992 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
993 - ar9462_2p0_mac_postamble,
994 - ARRAY_SIZE(ar9462_2p0_mac_postamble), 5);
995 + ar9462_2p0_mac_postamble);
996
997 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
998 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
999 - ar9462_2p0_baseband_core,
1000 - ARRAY_SIZE(ar9462_2p0_baseband_core), 2);
1001 + ar9462_2p0_baseband_core);
1002 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
1003 - ar9462_2p0_baseband_postamble,
1004 - ARRAY_SIZE(ar9462_2p0_baseband_postamble), 5);
1005 + ar9462_2p0_baseband_postamble);
1006
1007 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
1008 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
1009 - ar9462_2p0_radio_core,
1010 - ARRAY_SIZE(ar9462_2p0_radio_core), 2);
1011 + ar9462_2p0_radio_core);
1012 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
1013 - ar9462_2p0_radio_postamble,
1014 - ARRAY_SIZE(ar9462_2p0_radio_postamble), 5);
1015 + ar9462_2p0_radio_postamble);
1016 INIT_INI_ARRAY(&ah->ini_radio_post_sys2ant,
1017 - ar9462_2p0_radio_postamble_sys2ant,
1018 - ARRAY_SIZE(ar9462_2p0_radio_postamble_sys2ant),
1019 - 5);
1020 + ar9462_2p0_radio_postamble_sys2ant);
1021
1022 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
1023 - ar9462_2p0_soc_preamble,
1024 - ARRAY_SIZE(ar9462_2p0_soc_preamble), 2);
1025 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
1026 + ar9462_2p0_soc_preamble);
1027 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
1028 - ar9462_2p0_soc_postamble,
1029 - ARRAY_SIZE(ar9462_2p0_soc_postamble), 5);
1030 + ar9462_2p0_soc_postamble);
1031
1032 INIT_INI_ARRAY(&ah->iniModesRxGain,
1033 - ar9462_common_rx_gain_table_2p0,
1034 - ARRAY_SIZE(ar9462_common_rx_gain_table_2p0), 2);
1035 + ar9462_common_rx_gain_table_2p0);
1036
1037 /* Awake -> Sleep Setting */
1038 INIT_INI_ARRAY(&ah->iniPcieSerdes,
1039 - PCIE_PLL_ON_CREQ_DIS_L1_2P0,
1040 - ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
1041 - 2);
1042 + PCIE_PLL_ON_CREQ_DIS_L1_2P0);
1043 /* Sleep -> Awake Setting */
1044 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
1045 - PCIE_PLL_ON_CREQ_DIS_L1_2P0,
1046 - ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
1047 - 2);
1048 + PCIE_PLL_ON_CREQ_DIS_L1_2P0);
1049
1050 /* Fast clock modal settings */
1051 INIT_INI_ARRAY(&ah->iniModesFastClock,
1052 - ar9462_modes_fast_clock_2p0,
1053 - ARRAY_SIZE(ar9462_modes_fast_clock_2p0), 3);
1054 + ar9462_modes_fast_clock_2p0);
1055
1056 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
1057 - AR9462_BB_CTX_COEFJ(2p0),
1058 - ARRAY_SIZE(AR9462_BB_CTX_COEFJ(2p0)), 2);
1059 + AR9462_BB_CTX_COEFJ(2p0));
1060
1061 - INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ,
1062 - ARRAY_SIZE(AR9462_BBC_TXIFR_COEFFJ), 2);
1063 + INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ);
1064 } else if (AR_SREV_9550(ah)) {
1065 /* mac */
1066 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
1067 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
1068 - ar955x_1p0_mac_core,
1069 - ARRAY_SIZE(ar955x_1p0_mac_core), 2);
1070 + ar955x_1p0_mac_core);
1071 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
1072 - ar955x_1p0_mac_postamble,
1073 - ARRAY_SIZE(ar955x_1p0_mac_postamble), 5);
1074 + ar955x_1p0_mac_postamble);
1075
1076 /* bb */
1077 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
1078 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
1079 - ar955x_1p0_baseband_core,
1080 - ARRAY_SIZE(ar955x_1p0_baseband_core), 2);
1081 + ar955x_1p0_baseband_core);
1082 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
1083 - ar955x_1p0_baseband_postamble,
1084 - ARRAY_SIZE(ar955x_1p0_baseband_postamble), 5);
1085 + ar955x_1p0_baseband_postamble);
1086
1087 /* radio */
1088 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
1089 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
1090 - ar955x_1p0_radio_core,
1091 - ARRAY_SIZE(ar955x_1p0_radio_core), 2);
1092 + ar955x_1p0_radio_core);
1093 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
1094 - ar955x_1p0_radio_postamble,
1095 - ARRAY_SIZE(ar955x_1p0_radio_postamble), 5);
1096 + ar955x_1p0_radio_postamble);
1097
1098 /* soc */
1099 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
1100 - ar955x_1p0_soc_preamble,
1101 - ARRAY_SIZE(ar955x_1p0_soc_preamble), 2);
1102 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
1103 + ar955x_1p0_soc_preamble);
1104 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
1105 - ar955x_1p0_soc_postamble,
1106 - ARRAY_SIZE(ar955x_1p0_soc_postamble), 5);
1107 + ar955x_1p0_soc_postamble);
1108
1109 /* rx/tx gain */
1110 INIT_INI_ARRAY(&ah->iniModesRxGain,
1111 - ar955x_1p0_common_wo_xlna_rx_gain_table,
1112 - ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_table),
1113 - 2);
1114 + ar955x_1p0_common_wo_xlna_rx_gain_table);
1115 INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
1116 - ar955x_1p0_common_wo_xlna_rx_gain_bounds,
1117 - ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_bounds),
1118 - 5);
1119 - INIT_INI_ARRAY(&ah->iniModesTxGain,
1120 - ar955x_1p0_modes_xpa_tx_gain_table,
1121 - ARRAY_SIZE(ar955x_1p0_modes_xpa_tx_gain_table),
1122 - 9);
1123 + ar955x_1p0_common_wo_xlna_rx_gain_bounds);
1124 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1125 + ar955x_1p0_modes_xpa_tx_gain_table);
1126
1127 /* Fast clock modal settings */
1128 INIT_INI_ARRAY(&ah->iniModesFastClock,
1129 - ar955x_1p0_modes_fast_clock,
1130 - ARRAY_SIZE(ar955x_1p0_modes_fast_clock), 3);
1131 + ar955x_1p0_modes_fast_clock);
1132 } else if (AR_SREV_9580(ah)) {
1133 /* mac */
1134 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
1135 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
1136 - ar9580_1p0_mac_core,
1137 - ARRAY_SIZE(ar9580_1p0_mac_core), 2);
1138 + ar9580_1p0_mac_core);
1139 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
1140 - ar9580_1p0_mac_postamble,
1141 - ARRAY_SIZE(ar9580_1p0_mac_postamble), 5);
1142 + ar9580_1p0_mac_postamble);
1143
1144 /* bb */
1145 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
1146 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
1147 - ar9580_1p0_baseband_core,
1148 - ARRAY_SIZE(ar9580_1p0_baseband_core), 2);
1149 + ar9580_1p0_baseband_core);
1150 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
1151 - ar9580_1p0_baseband_postamble,
1152 - ARRAY_SIZE(ar9580_1p0_baseband_postamble), 5);
1153 + ar9580_1p0_baseband_postamble);
1154
1155 /* radio */
1156 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
1157 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
1158 - ar9580_1p0_radio_core,
1159 - ARRAY_SIZE(ar9580_1p0_radio_core), 2);
1160 + ar9580_1p0_radio_core);
1161 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
1162 - ar9580_1p0_radio_postamble,
1163 - ARRAY_SIZE(ar9580_1p0_radio_postamble), 5);
1164 + ar9580_1p0_radio_postamble);
1165
1166 /* soc */
1167 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
1168 - ar9580_1p0_soc_preamble,
1169 - ARRAY_SIZE(ar9580_1p0_soc_preamble), 2);
1170 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
1171 + ar9580_1p0_soc_preamble);
1172 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
1173 - ar9580_1p0_soc_postamble,
1174 - ARRAY_SIZE(ar9580_1p0_soc_postamble), 5);
1175 + ar9580_1p0_soc_postamble);
1176
1177 /* rx/tx gain */
1178 INIT_INI_ARRAY(&ah->iniModesRxGain,
1179 - ar9580_1p0_rx_gain_table,
1180 - ARRAY_SIZE(ar9580_1p0_rx_gain_table), 2);
1181 + ar9580_1p0_rx_gain_table);
1182 INIT_INI_ARRAY(&ah->iniModesTxGain,
1183 - ar9580_1p0_low_ob_db_tx_gain_table,
1184 - ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
1185 - 5);
1186 + ar9580_1p0_low_ob_db_tx_gain_table);
1187
1188 INIT_INI_ARRAY(&ah->iniModesFastClock,
1189 - ar9580_1p0_modes_fast_clock,
1190 - ARRAY_SIZE(ar9580_1p0_modes_fast_clock),
1191 - 3);
1192 + ar9580_1p0_modes_fast_clock);
1193 } else {
1194 /* mac */
1195 - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
1196 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
1197 - ar9300_2p2_mac_core,
1198 - ARRAY_SIZE(ar9300_2p2_mac_core), 2);
1199 + ar9300_2p2_mac_core);
1200 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
1201 - ar9300_2p2_mac_postamble,
1202 - ARRAY_SIZE(ar9300_2p2_mac_postamble), 5);
1203 + ar9300_2p2_mac_postamble);
1204
1205 /* bb */
1206 - INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
1207 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
1208 - ar9300_2p2_baseband_core,
1209 - ARRAY_SIZE(ar9300_2p2_baseband_core), 2);
1210 + ar9300_2p2_baseband_core);
1211 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
1212 - ar9300_2p2_baseband_postamble,
1213 - ARRAY_SIZE(ar9300_2p2_baseband_postamble), 5);
1214 + ar9300_2p2_baseband_postamble);
1215
1216 /* radio */
1217 - INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
1218 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
1219 - ar9300_2p2_radio_core,
1220 - ARRAY_SIZE(ar9300_2p2_radio_core), 2);
1221 + ar9300_2p2_radio_core);
1222 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
1223 - ar9300_2p2_radio_postamble,
1224 - ARRAY_SIZE(ar9300_2p2_radio_postamble), 5);
1225 + ar9300_2p2_radio_postamble);
1226
1227 /* soc */
1228 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
1229 - ar9300_2p2_soc_preamble,
1230 - ARRAY_SIZE(ar9300_2p2_soc_preamble), 2);
1231 - INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
1232 + ar9300_2p2_soc_preamble);
1233 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
1234 - ar9300_2p2_soc_postamble,
1235 - ARRAY_SIZE(ar9300_2p2_soc_postamble), 5);
1236 + ar9300_2p2_soc_postamble);
1237
1238 /* rx/tx gain */
1239 INIT_INI_ARRAY(&ah->iniModesRxGain,
1240 - ar9300Common_rx_gain_table_2p2,
1241 - ARRAY_SIZE(ar9300Common_rx_gain_table_2p2), 2);
1242 + ar9300Common_rx_gain_table_2p2);
1243 INIT_INI_ARRAY(&ah->iniModesTxGain,
1244 - ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
1245 - ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
1246 - 5);
1247 + ar9300Modes_lowest_ob_db_tx_gain_table_2p2);
1248
1249 /* Load PCIE SERDES settings from INI */
1250
1251 /* Awake Setting */
1252
1253 INIT_INI_ARRAY(&ah->iniPcieSerdes,
1254 - ar9300PciePhy_pll_on_clkreq_disable_L1_2p2,
1255 - ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2),
1256 - 2);
1257 + ar9300PciePhy_pll_on_clkreq_disable_L1_2p2);
1258
1259 /* Sleep Setting */
1260
1261 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
1262 - ar9300PciePhy_pll_on_clkreq_disable_L1_2p2,
1263 - ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2),
1264 - 2);
1265 + ar9300PciePhy_pll_on_clkreq_disable_L1_2p2);
1266
1267 /* Fast clock modal settings */
1268 INIT_INI_ARRAY(&ah->iniModesFastClock,
1269 - ar9300Modes_fast_clock_2p2,
1270 - ARRAY_SIZE(ar9300Modes_fast_clock_2p2),
1271 - 3);
1272 + ar9300Modes_fast_clock_2p2);
1273 }
1274 }
1275
1276 @@ -507,156 +355,110 @@ static void ar9003_tx_gain_table_mode0(s
1277 {
1278 if (AR_SREV_9330_12(ah))
1279 INIT_INI_ARRAY(&ah->iniModesTxGain,
1280 - ar9331_modes_lowest_ob_db_tx_gain_1p2,
1281 - ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
1282 - 5);
1283 + ar9331_modes_lowest_ob_db_tx_gain_1p2);
1284 else if (AR_SREV_9330_11(ah))
1285 INIT_INI_ARRAY(&ah->iniModesTxGain,
1286 - ar9331_modes_lowest_ob_db_tx_gain_1p1,
1287 - ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
1288 - 5);
1289 + ar9331_modes_lowest_ob_db_tx_gain_1p1);
1290 else if (AR_SREV_9340(ah))
1291 INIT_INI_ARRAY(&ah->iniModesTxGain,
1292 - ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
1293 - ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
1294 - 5);
1295 + ar9340Modes_lowest_ob_db_tx_gain_table_1p0);
1296 else if (AR_SREV_9485_11(ah))
1297 INIT_INI_ARRAY(&ah->iniModesTxGain,
1298 - ar9485_modes_lowest_ob_db_tx_gain_1_1,
1299 - ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
1300 - 5);
1301 + ar9485_modes_lowest_ob_db_tx_gain_1_1);
1302 else if (AR_SREV_9550(ah))
1303 INIT_INI_ARRAY(&ah->iniModesTxGain,
1304 - ar955x_1p0_modes_xpa_tx_gain_table,
1305 - ARRAY_SIZE(ar955x_1p0_modes_xpa_tx_gain_table),
1306 - 9);
1307 + ar955x_1p0_modes_xpa_tx_gain_table);
1308 else if (AR_SREV_9580(ah))
1309 INIT_INI_ARRAY(&ah->iniModesTxGain,
1310 - ar9580_1p0_lowest_ob_db_tx_gain_table,
1311 - ARRAY_SIZE(ar9580_1p0_lowest_ob_db_tx_gain_table),
1312 - 5);
1313 + ar9580_1p0_lowest_ob_db_tx_gain_table);
1314 else if (AR_SREV_9462_20(ah))
1315 INIT_INI_ARRAY(&ah->iniModesTxGain,
1316 - ar9462_modes_low_ob_db_tx_gain_table_2p0,
1317 - ARRAY_SIZE(ar9462_modes_low_ob_db_tx_gain_table_2p0),
1318 - 5);
1319 + ar9462_modes_low_ob_db_tx_gain_table_2p0);
1320 else
1321 INIT_INI_ARRAY(&ah->iniModesTxGain,
1322 - ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
1323 - ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
1324 - 5);
1325 + ar9300Modes_lowest_ob_db_tx_gain_table_2p2);
1326 }
1327
1328 static void ar9003_tx_gain_table_mode1(struct ath_hw *ah)
1329 {
1330 if (AR_SREV_9330_12(ah))
1331 INIT_INI_ARRAY(&ah->iniModesTxGain,
1332 - ar9331_modes_high_ob_db_tx_gain_1p2,
1333 - ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p2),
1334 - 5);
1335 + ar9331_modes_high_ob_db_tx_gain_1p2);
1336 else if (AR_SREV_9330_11(ah))
1337 INIT_INI_ARRAY(&ah->iniModesTxGain,
1338 - ar9331_modes_high_ob_db_tx_gain_1p1,
1339 - ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p1),
1340 - 5);
1341 + ar9331_modes_high_ob_db_tx_gain_1p1);
1342 else if (AR_SREV_9340(ah))
1343 INIT_INI_ARRAY(&ah->iniModesTxGain,
1344 - ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
1345 - ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
1346 - 5);
1347 + ar9340Modes_high_ob_db_tx_gain_table_1p0);
1348 else if (AR_SREV_9485_11(ah))
1349 INIT_INI_ARRAY(&ah->iniModesTxGain,
1350 - ar9485Modes_high_ob_db_tx_gain_1_1,
1351 - ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_1),
1352 - 5);
1353 + ar9485Modes_high_ob_db_tx_gain_1_1);
1354 else if (AR_SREV_9580(ah))
1355 INIT_INI_ARRAY(&ah->iniModesTxGain,
1356 - ar9580_1p0_high_ob_db_tx_gain_table,
1357 - ARRAY_SIZE(ar9580_1p0_high_ob_db_tx_gain_table),
1358 - 5);
1359 + ar9580_1p0_high_ob_db_tx_gain_table);
1360 else if (AR_SREV_9550(ah))
1361 INIT_INI_ARRAY(&ah->iniModesTxGain,
1362 - ar955x_1p0_modes_no_xpa_tx_gain_table,
1363 - ARRAY_SIZE(ar955x_1p0_modes_no_xpa_tx_gain_table),
1364 - 9);
1365 + ar955x_1p0_modes_no_xpa_tx_gain_table);
1366 else if (AR_SREV_9462_20(ah))
1367 INIT_INI_ARRAY(&ah->iniModesTxGain,
1368 - ar9462_modes_high_ob_db_tx_gain_table_2p0,
1369 - ARRAY_SIZE(ar9462_modes_high_ob_db_tx_gain_table_2p0),
1370 - 5);
1371 + ar9462_modes_high_ob_db_tx_gain_table_2p0);
1372 else
1373 INIT_INI_ARRAY(&ah->iniModesTxGain,
1374 - ar9300Modes_high_ob_db_tx_gain_table_2p2,
1375 - ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p2),
1376 - 5);
1377 + ar9300Modes_high_ob_db_tx_gain_table_2p2);
1378 }
1379
1380 static void ar9003_tx_gain_table_mode2(struct ath_hw *ah)
1381 {
1382 if (AR_SREV_9330_12(ah))
1383 INIT_INI_ARRAY(&ah->iniModesTxGain,
1384 - ar9331_modes_low_ob_db_tx_gain_1p2,
1385 - ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p2),
1386 - 5);
1387 + ar9331_modes_low_ob_db_tx_gain_1p2);
1388 else if (AR_SREV_9330_11(ah))
1389 INIT_INI_ARRAY(&ah->iniModesTxGain,
1390 - ar9331_modes_low_ob_db_tx_gain_1p1,
1391 - ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p1),
1392 - 5);
1393 + ar9331_modes_low_ob_db_tx_gain_1p1);
1394 else if (AR_SREV_9340(ah))
1395 INIT_INI_ARRAY(&ah->iniModesTxGain,
1396 - ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
1397 - ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
1398 - 5);
1399 + ar9340Modes_low_ob_db_tx_gain_table_1p0);
1400 else if (AR_SREV_9485_11(ah))
1401 INIT_INI_ARRAY(&ah->iniModesTxGain,
1402 - ar9485Modes_low_ob_db_tx_gain_1_1,
1403 - ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_1),
1404 - 5);
1405 + ar9485Modes_low_ob_db_tx_gain_1_1);
1406 else if (AR_SREV_9580(ah))
1407 INIT_INI_ARRAY(&ah->iniModesTxGain,
1408 - ar9580_1p0_low_ob_db_tx_gain_table,
1409 - ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
1410 - 5);
1411 + ar9580_1p0_low_ob_db_tx_gain_table);
1412 else
1413 INIT_INI_ARRAY(&ah->iniModesTxGain,
1414 - ar9300Modes_low_ob_db_tx_gain_table_2p2,
1415 - ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p2),
1416 - 5);
1417 + ar9300Modes_low_ob_db_tx_gain_table_2p2);
1418 }
1419
1420 static void ar9003_tx_gain_table_mode3(struct ath_hw *ah)
1421 {
1422 if (AR_SREV_9330_12(ah))
1423 INIT_INI_ARRAY(&ah->iniModesTxGain,
1424 - ar9331_modes_high_power_tx_gain_1p2,
1425 - ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p2),
1426 - 5);
1427 + ar9331_modes_high_power_tx_gain_1p2);
1428 else if (AR_SREV_9330_11(ah))
1429 INIT_INI_ARRAY(&ah->iniModesTxGain,
1430 - ar9331_modes_high_power_tx_gain_1p1,
1431 - ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p1),
1432 - 5);
1433 + ar9331_modes_high_power_tx_gain_1p1);
1434 else if (AR_SREV_9340(ah))
1435 INIT_INI_ARRAY(&ah->iniModesTxGain,
1436 - ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
1437 - ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
1438 - 5);
1439 + ar9340Modes_high_power_tx_gain_table_1p0);
1440 else if (AR_SREV_9485_11(ah))
1441 INIT_INI_ARRAY(&ah->iniModesTxGain,
1442 - ar9485Modes_high_power_tx_gain_1_1,
1443 - ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_1),
1444 - 5);
1445 + ar9485Modes_high_power_tx_gain_1_1);
1446 else if (AR_SREV_9580(ah))
1447 INIT_INI_ARRAY(&ah->iniModesTxGain,
1448 - ar9580_1p0_high_power_tx_gain_table,
1449 - ARRAY_SIZE(ar9580_1p0_high_power_tx_gain_table),
1450 - 5);
1451 + ar9580_1p0_high_power_tx_gain_table);
1452 else
1453 INIT_INI_ARRAY(&ah->iniModesTxGain,
1454 - ar9300Modes_high_power_tx_gain_table_2p2,
1455 - ARRAY_SIZE(ar9300Modes_high_power_tx_gain_table_2p2),
1456 - 5);
1457 + ar9300Modes_high_power_tx_gain_table_2p2);
1458 +}
1459 +
1460 +static void ar9003_tx_gain_table_mode4(struct ath_hw *ah)
1461 +{
1462 + if (AR_SREV_9340(ah))
1463 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1464 + ar9340Modes_mixed_ob_db_tx_gain_table_1p0);
1465 + else if (AR_SREV_9580(ah))
1466 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1467 + ar9580_1p0_mixed_ob_db_tx_gain_table);
1468 }
1469
1470 static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
1471 @@ -675,6 +477,9 @@ static void ar9003_tx_gain_table_apply(s
1472 case 3:
1473 ar9003_tx_gain_table_mode3(ah);
1474 break;
1475 + case 4:
1476 + ar9003_tx_gain_table_mode4(ah);
1477 + break;
1478 }
1479 }
1480
1481 @@ -682,104 +487,67 @@ static void ar9003_rx_gain_table_mode0(s
1482 {
1483 if (AR_SREV_9330_12(ah))
1484 INIT_INI_ARRAY(&ah->iniModesRxGain,
1485 - ar9331_common_rx_gain_1p2,
1486 - ARRAY_SIZE(ar9331_common_rx_gain_1p2),
1487 - 2);
1488 + ar9331_common_rx_gain_1p2);
1489 else if (AR_SREV_9330_11(ah))
1490 INIT_INI_ARRAY(&ah->iniModesRxGain,
1491 - ar9331_common_rx_gain_1p1,
1492 - ARRAY_SIZE(ar9331_common_rx_gain_1p1),
1493 - 2);
1494 + ar9331_common_rx_gain_1p1);
1495 else if (AR_SREV_9340(ah))
1496 INIT_INI_ARRAY(&ah->iniModesRxGain,
1497 - ar9340Common_rx_gain_table_1p0,
1498 - ARRAY_SIZE(ar9340Common_rx_gain_table_1p0),
1499 - 2);
1500 + ar9340Common_rx_gain_table_1p0);
1501 else if (AR_SREV_9485_11(ah))
1502 INIT_INI_ARRAY(&ah->iniModesRxGain,
1503 - ar9485Common_wo_xlna_rx_gain_1_1,
1504 - ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
1505 - 2);
1506 + ar9485Common_wo_xlna_rx_gain_1_1);
1507 else if (AR_SREV_9550(ah)) {
1508 INIT_INI_ARRAY(&ah->iniModesRxGain,
1509 - ar955x_1p0_common_rx_gain_table,
1510 - ARRAY_SIZE(ar955x_1p0_common_rx_gain_table),
1511 - 2);
1512 + ar955x_1p0_common_rx_gain_table);
1513 INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
1514 - ar955x_1p0_common_rx_gain_bounds,
1515 - ARRAY_SIZE(ar955x_1p0_common_rx_gain_bounds),
1516 - 5);
1517 + ar955x_1p0_common_rx_gain_bounds);
1518 } else if (AR_SREV_9580(ah))
1519 INIT_INI_ARRAY(&ah->iniModesRxGain,
1520 - ar9580_1p0_rx_gain_table,
1521 - ARRAY_SIZE(ar9580_1p0_rx_gain_table),
1522 - 2);
1523 + ar9580_1p0_rx_gain_table);
1524 else if (AR_SREV_9462_20(ah))
1525 INIT_INI_ARRAY(&ah->iniModesRxGain,
1526 - ar9462_common_rx_gain_table_2p0,
1527 - ARRAY_SIZE(ar9462_common_rx_gain_table_2p0),
1528 - 2);
1529 + ar9462_common_rx_gain_table_2p0);
1530 else
1531 INIT_INI_ARRAY(&ah->iniModesRxGain,
1532 - ar9300Common_rx_gain_table_2p2,
1533 - ARRAY_SIZE(ar9300Common_rx_gain_table_2p2),
1534 - 2);
1535 + ar9300Common_rx_gain_table_2p2);
1536 }
1537
1538 static void ar9003_rx_gain_table_mode1(struct ath_hw *ah)
1539 {
1540 if (AR_SREV_9330_12(ah))
1541 INIT_INI_ARRAY(&ah->iniModesRxGain,
1542 - ar9331_common_wo_xlna_rx_gain_1p2,
1543 - ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p2),
1544 - 2);
1545 + ar9331_common_wo_xlna_rx_gain_1p2);
1546 else if (AR_SREV_9330_11(ah))
1547 INIT_INI_ARRAY(&ah->iniModesRxGain,
1548 - ar9331_common_wo_xlna_rx_gain_1p1,
1549 - ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p1),
1550 - 2);
1551 + ar9331_common_wo_xlna_rx_gain_1p1);
1552 else if (AR_SREV_9340(ah))
1553 INIT_INI_ARRAY(&ah->iniModesRxGain,
1554 - ar9340Common_wo_xlna_rx_gain_table_1p0,
1555 - ARRAY_SIZE(ar9340Common_wo_xlna_rx_gain_table_1p0),
1556 - 2);
1557 + ar9340Common_wo_xlna_rx_gain_table_1p0);
1558 else if (AR_SREV_9485_11(ah))
1559 INIT_INI_ARRAY(&ah->iniModesRxGain,
1560 - ar9485Common_wo_xlna_rx_gain_1_1,
1561 - ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
1562 - 2);
1563 + ar9485Common_wo_xlna_rx_gain_1_1);
1564 else if (AR_SREV_9462_20(ah))
1565 INIT_INI_ARRAY(&ah->iniModesRxGain,
1566 - ar9462_common_wo_xlna_rx_gain_table_2p0,
1567 - ARRAY_SIZE(ar9462_common_wo_xlna_rx_gain_table_2p0),
1568 - 2);
1569 + ar9462_common_wo_xlna_rx_gain_table_2p0);
1570 else if (AR_SREV_9550(ah)) {
1571 INIT_INI_ARRAY(&ah->iniModesRxGain,
1572 - ar955x_1p0_common_wo_xlna_rx_gain_table,
1573 - ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_table),
1574 - 2);
1575 + ar955x_1p0_common_wo_xlna_rx_gain_table);
1576 INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
1577 - ar955x_1p0_common_wo_xlna_rx_gain_bounds,
1578 - ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_bounds),
1579 - 5);
1580 + ar955x_1p0_common_wo_xlna_rx_gain_bounds);
1581 } else if (AR_SREV_9580(ah))
1582 INIT_INI_ARRAY(&ah->iniModesRxGain,
1583 - ar9580_1p0_wo_xlna_rx_gain_table,
1584 - ARRAY_SIZE(ar9580_1p0_wo_xlna_rx_gain_table),
1585 - 2);
1586 + ar9580_1p0_wo_xlna_rx_gain_table);
1587 else
1588 INIT_INI_ARRAY(&ah->iniModesRxGain,
1589 - ar9300Common_wo_xlna_rx_gain_table_2p2,
1590 - ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p2),
1591 - 2);
1592 + ar9300Common_wo_xlna_rx_gain_table_2p2);
1593 }
1594
1595 static void ar9003_rx_gain_table_mode2(struct ath_hw *ah)
1596 {
1597 if (AR_SREV_9462_20(ah))
1598 INIT_INI_ARRAY(&ah->iniModesRxGain,
1599 - ar9462_common_mixed_rx_gain_table_2p0,
1600 - ARRAY_SIZE(ar9462_common_mixed_rx_gain_table_2p0), 2);
1601 + ar9462_common_mixed_rx_gain_table_2p0);
1602 }
1603
1604 static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
1605 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
1606 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
1607 @@ -117,8 +117,8 @@ static int ar9003_hw_set_channel(struct
1608 ah->is_clk_25mhz) {
1609 u32 chan_frac;
1610
1611 - channelSel = (freq * 2) / 75;
1612 - chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
1613 + channelSel = freq / 75;
1614 + chan_frac = ((freq % 75) * 0x20000) / 75;
1615 channelSel = (channelSel << 17) | chan_frac;
1616 } else {
1617 channelSel = CHANSEL_5G(freq);
1618 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
1619 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
1620 @@ -633,6 +633,8 @@
1621 #define AR_PHY_65NM_CH0_BIAS2 0x160c4
1622 #define AR_PHY_65NM_CH0_BIAS4 0x160cc
1623 #define AR_PHY_65NM_CH0_RXTX4 0x1610c
1624 +#define AR_PHY_65NM_CH1_RXTX4 0x1650c
1625 +#define AR_PHY_65NM_CH2_RXTX4 0x1690c
1626
1627 #define AR_CH0_TOP (AR_SREV_9300(ah) ? 0x16288 : \
1628 ((AR_SREV_9462(ah) ? 0x1628c : 0x16280)))
1629 @@ -876,6 +878,9 @@
1630 #define AR_PHY_65NM_CH0_RXTX4_THERM_ON 0x10000000
1631 #define AR_PHY_65NM_CH0_RXTX4_THERM_ON_S 28
1632
1633 +#define AR_PHY_65NM_RXTX4_XLNA_BIAS 0xC0000000
1634 +#define AR_PHY_65NM_RXTX4_XLNA_BIAS_S 30
1635 +
1636 /*
1637 * Channel 1 Register Map
1638 */
1639 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
1640 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
1641 @@ -297,6 +297,8 @@ struct ath_tx {
1642 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
1643 struct ath_descdma txdma;
1644 struct ath_txq *txq_map[WME_NUM_AC];
1645 + u32 txq_max_pending[WME_NUM_AC];
1646 + u16 max_aggr_framelen[WME_NUM_AC][4][32];
1647 };
1648
1649 struct ath_rx_edma {
1650 @@ -341,6 +343,7 @@ int ath_tx_init(struct ath_softc *sc, in
1651 void ath_tx_cleanup(struct ath_softc *sc);
1652 int ath_txq_update(struct ath_softc *sc, int qnum,
1653 struct ath9k_tx_queue_info *q);
1654 +void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
1655 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
1656 struct ath_tx_control *txctl);
1657 void ath_tx_tasklet(struct ath_softc *sc);
1658 @@ -360,7 +363,7 @@ void ath_tx_aggr_sleep(struct ieee80211_
1659
1660 struct ath_vif {
1661 int av_bslot;
1662 - bool is_bslot_active, primary_sta_vif;
1663 + bool primary_sta_vif;
1664 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
1665 struct ath_buf *av_bcbuf;
1666 };
1667 @@ -386,6 +389,7 @@ struct ath_beacon_config {
1668 u16 dtim_period;
1669 u16 bmiss_timeout;
1670 u8 dtim_count;
1671 + bool enable_beacon;
1672 };
1673
1674 struct ath_beacon {
1675 @@ -397,7 +401,6 @@ struct ath_beacon {
1676
1677 u32 beaconq;
1678 u32 bmisscnt;
1679 - u32 ast_be_xmit;
1680 u32 bc_tstamp;
1681 struct ieee80211_vif *bslot[ATH_BCBUF];
1682 int slottime;
1683 @@ -411,12 +414,14 @@ struct ath_beacon {
1684 bool tx_last;
1685 };
1686
1687 -void ath_beacon_tasklet(unsigned long data);
1688 -void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
1689 -int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif);
1690 -void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
1691 -int ath_beaconq_config(struct ath_softc *sc);
1692 -void ath_set_beacon(struct ath_softc *sc);
1693 +void ath9k_beacon_tasklet(unsigned long data);
1694 +bool ath9k_allow_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
1695 +void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
1696 + u32 changed);
1697 +void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
1698 +void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
1699 +void ath9k_set_tsfadjust(struct ath_softc *sc, struct ieee80211_vif *vif);
1700 +void ath9k_set_beacon(struct ath_softc *sc);
1701 void ath9k_set_beaconing_status(struct ath_softc *sc, bool status);
1702
1703 /*******************/
1704 @@ -442,9 +447,12 @@ void ath_rx_poll(unsigned long data);
1705 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon);
1706 void ath_paprd_calibrate(struct work_struct *work);
1707 void ath_ani_calibrate(unsigned long data);
1708 -void ath_start_ani(struct ath_common *common);
1709 +void ath_start_ani(struct ath_softc *sc);
1710 +void ath_stop_ani(struct ath_softc *sc);
1711 +void ath_check_ani(struct ath_softc *sc);
1712 int ath_update_survey_stats(struct ath_softc *sc);
1713 void ath_update_survey_nf(struct ath_softc *sc, int channel);
1714 +void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
1715
1716 /**********/
1717 /* BTCOEX */
1718 @@ -619,7 +627,6 @@ enum sc_op_flags {
1719 SC_OP_INVALID,
1720 SC_OP_BEACONS,
1721 SC_OP_RXFLUSH,
1722 - SC_OP_TSF_RESET,
1723 SC_OP_ANI_RUN,
1724 SC_OP_PRIM_STA_VIF,
1725 SC_OP_HW_RESET,
1726 --- a/drivers/net/wireless/ath/ath9k/beacon.c
1727 +++ b/drivers/net/wireless/ath/ath9k/beacon.c
1728 @@ -30,7 +30,7 @@ static void ath9k_reset_beacon_status(st
1729 * the operating mode of the station (AP or AdHoc). Parameters are AIFS
1730 * settings and channel width min/max
1731 */
1732 -int ath_beaconq_config(struct ath_softc *sc)
1733 +static void ath9k_beaconq_config(struct ath_softc *sc)
1734 {
1735 struct ath_hw *ah = sc->sc_ah;
1736 struct ath_common *common = ath9k_hw_common(ah);
1737 @@ -38,6 +38,7 @@ int ath_beaconq_config(struct ath_softc
1738 struct ath_txq *txq;
1739
1740 ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi);
1741 +
1742 if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) {
1743 /* Always burst out beacon and CAB traffic. */
1744 qi.tqi_aifs = 1;
1745 @@ -56,12 +57,9 @@ int ath_beaconq_config(struct ath_softc
1746 }
1747
1748 if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) {
1749 - ath_err(common,
1750 - "Unable to update h/w beacon queue parameters\n");
1751 - return 0;
1752 + ath_err(common, "Unable to update h/w beacon queue parameters\n");
1753 } else {
1754 ath9k_hw_resettxqueue(ah, sc->beacon.beaconq);
1755 - return 1;
1756 }
1757 }
1758
1759 @@ -70,7 +68,7 @@ int ath_beaconq_config(struct ath_softc
1760 * up rate codes, and channel flags. Beacons are always sent out at the
1761 * lowest rate, and are not retried.
1762 */
1763 -static void ath_beacon_setup(struct ath_softc *sc, struct ieee80211_vif *vif,
1764 +static void ath9k_beacon_setup(struct ath_softc *sc, struct ieee80211_vif *vif,
1765 struct ath_buf *bf, int rateidx)
1766 {
1767 struct sk_buff *skb = bf->bf_mpdu;
1768 @@ -81,8 +79,6 @@ static void ath_beacon_setup(struct ath_
1769 u8 chainmask = ah->txchainmask;
1770 u8 rate = 0;
1771
1772 - ath9k_reset_beacon_status(sc);
1773 -
1774 sband = &sc->sbands[common->hw->conf.channel->band];
1775 rate = sband->bitrates[rateidx].hw_value;
1776 if (vif->bss_conf.use_short_preamble)
1777 @@ -111,7 +107,7 @@ static void ath_beacon_setup(struct ath_
1778 ath9k_hw_set_txdesc(ah, bf->bf_desc, &info);
1779 }
1780
1781 -static void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
1782 +static void ath9k_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
1783 {
1784 struct ath_softc *sc = hw->priv;
1785 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1786 @@ -128,28 +124,22 @@ static void ath_tx_cabq(struct ieee80211
1787 }
1788 }
1789
1790 -static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
1791 - struct ieee80211_vif *vif)
1792 +static struct ath_buf *ath9k_beacon_generate(struct ieee80211_hw *hw,
1793 + struct ieee80211_vif *vif)
1794 {
1795 struct ath_softc *sc = hw->priv;
1796 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1797 struct ath_buf *bf;
1798 - struct ath_vif *avp;
1799 + struct ath_vif *avp = (void *)vif->drv_priv;
1800 struct sk_buff *skb;
1801 - struct ath_txq *cabq;
1802 + struct ath_txq *cabq = sc->beacon.cabq;
1803 struct ieee80211_tx_info *info;
1804 + struct ieee80211_mgmt *mgmt_hdr;
1805 int cabq_depth;
1806
1807 - ath9k_reset_beacon_status(sc);
1808 -
1809 - avp = (void *)vif->drv_priv;
1810 - cabq = sc->beacon.cabq;
1811 -
1812 - if ((avp->av_bcbuf == NULL) || !avp->is_bslot_active)
1813 + if (avp->av_bcbuf == NULL)
1814 return NULL;
1815
1816 - /* Release the old beacon first */
1817 -
1818 bf = avp->av_bcbuf;
1819 skb = bf->bf_mpdu;
1820 if (skb) {
1821 @@ -159,14 +149,14 @@ static struct ath_buf *ath_beacon_genera
1822 bf->bf_buf_addr = 0;
1823 }
1824
1825 - /* Get a new beacon from mac80211 */
1826 -
1827 skb = ieee80211_beacon_get(hw, vif);
1828 - bf->bf_mpdu = skb;
1829 if (skb == NULL)
1830 return NULL;
1831 - ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp =
1832 - avp->tsf_adjust;
1833 +
1834 + bf->bf_mpdu = skb;
1835 +
1836 + mgmt_hdr = (struct ieee80211_mgmt *)skb->data;
1837 + mgmt_hdr->u.beacon.timestamp = avp->tsf_adjust;
1838
1839 info = IEEE80211_SKB_CB(skb);
1840 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1841 @@ -212,61 +202,52 @@ static struct ath_buf *ath_beacon_genera
1842 }
1843 }
1844
1845 - ath_beacon_setup(sc, vif, bf, info->control.rates[0].idx);
1846 + ath9k_beacon_setup(sc, vif, bf, info->control.rates[0].idx);
1847
1848 while (skb) {
1849 - ath_tx_cabq(hw, skb);
1850 + ath9k_tx_cabq(hw, skb);
1851 skb = ieee80211_get_buffered_bc(hw, vif);
1852 }
1853
1854 return bf;
1855 }
1856
1857 -int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif)
1858 +void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif)
1859 {
1860 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1861 - struct ath_vif *avp;
1862 - struct ath_buf *bf;
1863 - struct sk_buff *skb;
1864 - struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
1865 - __le64 tstamp;
1866 + struct ath_vif *avp = (void *)vif->drv_priv;
1867 + int slot;
1868
1869 - avp = (void *)vif->drv_priv;
1870 + avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf, struct ath_buf, list);
1871 + list_del(&avp->av_bcbuf->list);
1872
1873 - /* Allocate a beacon descriptor if we haven't done so. */
1874 - if (!avp->av_bcbuf) {
1875 - /* Allocate beacon state for hostap/ibss. We know
1876 - * a buffer is available. */
1877 - avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf,
1878 - struct ath_buf, list);
1879 - list_del(&avp->av_bcbuf->list);
1880 -
1881 - if (ath9k_uses_beacons(vif->type)) {
1882 - int slot;
1883 - /*
1884 - * Assign the vif to a beacon xmit slot. As
1885 - * above, this cannot fail to find one.
1886 - */
1887 - avp->av_bslot = 0;
1888 - for (slot = 0; slot < ATH_BCBUF; slot++)
1889 - if (sc->beacon.bslot[slot] == NULL) {
1890 - avp->av_bslot = slot;
1891 - avp->is_bslot_active = false;
1892 -
1893 - /* NB: keep looking for a double slot */
1894 - if (slot == 0 || !sc->beacon.bslot[slot-1])
1895 - break;
1896 - }
1897 - BUG_ON(sc->beacon.bslot[avp->av_bslot] != NULL);
1898 - sc->beacon.bslot[avp->av_bslot] = vif;
1899 - sc->nbcnvifs++;
1900 + for (slot = 0; slot < ATH_BCBUF; slot++) {
1901 + if (sc->beacon.bslot[slot] == NULL) {
1902 + avp->av_bslot = slot;
1903 + break;
1904 }
1905 }
1906
1907 - /* release the previous beacon frame, if it already exists. */
1908 - bf = avp->av_bcbuf;
1909 - if (bf->bf_mpdu != NULL) {
1910 - skb = bf->bf_mpdu;
1911 + sc->beacon.bslot[avp->av_bslot] = vif;
1912 + sc->nbcnvifs++;
1913 +
1914 + ath_dbg(common, CONFIG, "Added interface at beacon slot: %d\n",
1915 + avp->av_bslot);
1916 +}
1917 +
1918 +void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif)
1919 +{
1920 + struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1921 + struct ath_vif *avp = (void *)vif->drv_priv;
1922 + struct ath_buf *bf = avp->av_bcbuf;
1923 +
1924 + ath_dbg(common, CONFIG, "Removing interface at beacon slot: %d\n",
1925 + avp->av_bslot);
1926 +
1927 + tasklet_disable(&sc->bcon_tasklet);
1928 +
1929 + if (bf && bf->bf_mpdu) {
1930 + struct sk_buff *skb = bf->bf_mpdu;
1931 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1932 skb->len, DMA_TO_DEVICE);
1933 dev_kfree_skb_any(skb);
1934 @@ -274,99 +255,74 @@ int ath_beacon_alloc(struct ath_softc *s
1935 bf->bf_buf_addr = 0;
1936 }
1937
1938 - /* NB: the beacon data buffer must be 32-bit aligned. */
1939 - skb = ieee80211_beacon_get(sc->hw, vif);
1940 - if (skb == NULL)
1941 - return -ENOMEM;
1942 -
1943 - tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
1944 - sc->beacon.bc_tstamp = (u32) le64_to_cpu(tstamp);
1945 - /* Calculate a TSF adjustment factor required for staggered beacons. */
1946 - if (avp->av_bslot > 0) {
1947 - u64 tsfadjust;
1948 - int intval;
1949 + avp->av_bcbuf = NULL;
1950 + sc->beacon.bslot[avp->av_bslot] = NULL;
1951 + sc->nbcnvifs--;
1952 + list_add_tail(&bf->list, &sc->beacon.bbuf);
1953
1954 - intval = cur_conf->beacon_interval ? : ATH_DEFAULT_BINTVAL;
1955 + tasklet_enable(&sc->bcon_tasklet);
1956 +}
1957
1958 - /*
1959 - * Calculate the TSF offset for this beacon slot, i.e., the
1960 - * number of usecs that need to be added to the timestamp field
1961 - * in Beacon and Probe Response frames. Beacon slot 0 is
1962 - * processed at the correct offset, so it does not require TSF
1963 - * adjustment. Other slots are adjusted to get the timestamp
1964 - * close to the TBTT for the BSS.
1965 - */
1966 - tsfadjust = TU_TO_USEC(intval * avp->av_bslot) / ATH_BCBUF;
1967 - avp->tsf_adjust = cpu_to_le64(tsfadjust);
1968 +static int ath9k_beacon_choose_slot(struct ath_softc *sc)
1969 +{
1970 + struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1971 + struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
1972 + u16 intval;
1973 + u32 tsftu;
1974 + u64 tsf;
1975 + int slot;
1976
1977 - ath_dbg(common, BEACON,
1978 - "stagger beacons, bslot %d intval %u tsfadjust %llu\n",
1979 - avp->av_bslot, intval, (unsigned long long)tsfadjust);
1980 + if (sc->sc_ah->opmode != NL80211_IFTYPE_AP) {
1981 + ath_dbg(common, BEACON, "slot 0, tsf: %llu\n",
1982 + ath9k_hw_gettsf64(sc->sc_ah));
1983 + return 0;
1984 + }
1985
1986 - ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp =
1987 - avp->tsf_adjust;
1988 - } else
1989 - avp->tsf_adjust = cpu_to_le64(0);
1990 + intval = cur_conf->beacon_interval ? : ATH_DEFAULT_BINTVAL;
1991 + tsf = ath9k_hw_gettsf64(sc->sc_ah);
1992 + tsf += TU_TO_USEC(sc->sc_ah->config.sw_beacon_response_time);
1993 + tsftu = TSF_TO_TU((tsf * ATH_BCBUF) >>32, tsf * ATH_BCBUF);
1994 + slot = (tsftu % (intval * ATH_BCBUF)) / intval;
1995
1996 - bf->bf_mpdu = skb;
1997 - bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
1998 - skb->len, DMA_TO_DEVICE);
1999 - if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) {
2000 - dev_kfree_skb_any(skb);
2001 - bf->bf_mpdu = NULL;
2002 - bf->bf_buf_addr = 0;
2003 - ath_err(common, "dma_mapping_error on beacon alloc\n");
2004 - return -ENOMEM;
2005 - }
2006 - avp->is_bslot_active = true;
2007 + ath_dbg(common, BEACON, "slot: %d tsf: %llu tsftu: %u\n",
2008 + slot, tsf, tsftu / ATH_BCBUF);
2009
2010 - return 0;
2011 + return slot;
2012 }
2013
2014 -void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp)
2015 +void ath9k_set_tsfadjust(struct ath_softc *sc, struct ieee80211_vif *vif)
2016 {
2017 - if (avp->av_bcbuf != NULL) {
2018 - struct ath_buf *bf;
2019 + struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2020 + struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2021 + struct ath_vif *avp = (void *)vif->drv_priv;
2022 + u64 tsfadjust;
2023
2024 - avp->is_bslot_active = false;
2025 - if (avp->av_bslot != -1) {
2026 - sc->beacon.bslot[avp->av_bslot] = NULL;
2027 - sc->nbcnvifs--;
2028 - avp->av_bslot = -1;
2029 - }
2030 + if (avp->av_bslot == 0)
2031 + return;
2032
2033 - bf = avp->av_bcbuf;
2034 - if (bf->bf_mpdu != NULL) {
2035 - struct sk_buff *skb = bf->bf_mpdu;
2036 - dma_unmap_single(sc->dev, bf->bf_buf_addr,
2037 - skb->len, DMA_TO_DEVICE);
2038 - dev_kfree_skb_any(skb);
2039 - bf->bf_mpdu = NULL;
2040 - bf->bf_buf_addr = 0;
2041 - }
2042 - list_add_tail(&bf->list, &sc->beacon.bbuf);
2043 + tsfadjust = cur_conf->beacon_interval * avp->av_bslot / ATH_BCBUF;
2044 + avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust));
2045
2046 - avp->av_bcbuf = NULL;
2047 - }
2048 + ath_dbg(common, CONFIG, "tsfadjust is: %llu for bslot: %d\n",
2049 + (unsigned long long)tsfadjust, avp->av_bslot);
2050 }
2051
2052 -void ath_beacon_tasklet(unsigned long data)
2053 +void ath9k_beacon_tasklet(unsigned long data)
2054 {
2055 struct ath_softc *sc = (struct ath_softc *)data;
2056 - struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2057 struct ath_hw *ah = sc->sc_ah;
2058 struct ath_common *common = ath9k_hw_common(ah);
2059 struct ath_buf *bf = NULL;
2060 struct ieee80211_vif *vif;
2061 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2062 int slot;
2063 - u32 bfaddr, bc = 0;
2064
2065 - if (work_pending(&sc->hw_reset_work)) {
2066 + if (test_bit(SC_OP_HW_RESET, &sc->sc_flags)) {
2067 ath_dbg(common, RESET,
2068 "reset work is pending, skip beaconing now\n");
2069 return;
2070 }
2071 +
2072 /*
2073 * Check if the previous beacon has gone out. If
2074 * not don't try to post another, skip this period
2075 @@ -390,55 +346,25 @@ void ath_beacon_tasklet(unsigned long da
2076 } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
2077 ath_dbg(common, BSTUCK, "beacon is officially stuck\n");
2078 sc->beacon.bmisscnt = 0;
2079 - set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
2080 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
2081 + ath9k_queue_reset(sc, RESET_TYPE_BEACON_STUCK);
2082 }
2083
2084 return;
2085 }
2086
2087 - /*
2088 - * Generate beacon frames. we are sending frames
2089 - * staggered so calculate the slot for this frame based
2090 - * on the tsf to safeguard against missing an swba.
2091 - */
2092 -
2093 -
2094 - if (ah->opmode == NL80211_IFTYPE_AP) {
2095 - u16 intval;
2096 - u32 tsftu;
2097 - u64 tsf;
2098 -
2099 - intval = cur_conf->beacon_interval ? : ATH_DEFAULT_BINTVAL;
2100 - tsf = ath9k_hw_gettsf64(ah);
2101 - tsf += TU_TO_USEC(ah->config.sw_beacon_response_time);
2102 - tsftu = TSF_TO_TU((tsf * ATH_BCBUF) >>32, tsf * ATH_BCBUF);
2103 - slot = (tsftu % (intval * ATH_BCBUF)) / intval;
2104 - vif = sc->beacon.bslot[slot];
2105 -
2106 - ath_dbg(common, BEACON,
2107 - "slot %d [tsf %llu tsftu %u intval %u] vif %p\n",
2108 - slot, tsf, tsftu / ATH_BCBUF, intval, vif);
2109 - } else {
2110 - slot = 0;
2111 - vif = sc->beacon.bslot[slot];
2112 - }
2113 + slot = ath9k_beacon_choose_slot(sc);
2114 + vif = sc->beacon.bslot[slot];
2115
2116 + if (!vif || !vif->bss_conf.enable_beacon)
2117 + return;
2118
2119 - bfaddr = 0;
2120 - if (vif) {
2121 - bf = ath_beacon_generate(sc->hw, vif);
2122 - if (bf != NULL) {
2123 - bfaddr = bf->bf_daddr;
2124 - bc = 1;
2125 - }
2126 + bf = ath9k_beacon_generate(sc->hw, vif);
2127 + WARN_ON(!bf);
2128
2129 - if (sc->beacon.bmisscnt != 0) {
2130 - ath_dbg(common, BSTUCK,
2131 - "resume beacon xmit after %u misses\n",
2132 - sc->beacon.bmisscnt);
2133 - sc->beacon.bmisscnt = 0;
2134 - }
2135 + if (sc->beacon.bmisscnt != 0) {
2136 + ath_dbg(common, BSTUCK, "resume beacon xmit after %u misses\n",
2137 + sc->beacon.bmisscnt);
2138 + sc->beacon.bmisscnt = 0;
2139 }
2140
2141 /*
2142 @@ -458,39 +384,37 @@ void ath_beacon_tasklet(unsigned long da
2143 * set to ATH_BCBUF so this check is a noop.
2144 */
2145 if (sc->beacon.updateslot == UPDATE) {
2146 - sc->beacon.updateslot = COMMIT; /* commit next beacon */
2147 + sc->beacon.updateslot = COMMIT;
2148 sc->beacon.slotupdate = slot;
2149 - } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) {
2150 + } else if (sc->beacon.updateslot == COMMIT &&
2151 + sc->beacon.slotupdate == slot) {
2152 ah->slottime = sc->beacon.slottime;
2153 ath9k_hw_init_global_settings(ah);
2154 sc->beacon.updateslot = OK;
2155 }
2156 - if (bfaddr != 0) {
2157 +
2158 + if (bf) {
2159 + ath9k_reset_beacon_status(sc);
2160 +
2161 /* NB: cabq traffic should already be queued and primed */
2162 - ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr);
2163 + ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr);
2164
2165 if (!edma)
2166 ath9k_hw_txstart(ah, sc->beacon.beaconq);
2167 -
2168 - sc->beacon.ast_be_xmit += bc; /* XXX per-vif? */
2169 }
2170 }
2171
2172 -static void ath9k_beacon_init(struct ath_softc *sc,
2173 - u32 next_beacon,
2174 - u32 beacon_period)
2175 +static void ath9k_beacon_init(struct ath_softc *sc, u32 nexttbtt, u32 intval)
2176 {
2177 - if (test_bit(SC_OP_TSF_RESET, &sc->sc_flags)) {
2178 - ath9k_ps_wakeup(sc);
2179 - ath9k_hw_reset_tsf(sc->sc_ah);
2180 - }
2181 -
2182 - ath9k_hw_beaconinit(sc->sc_ah, next_beacon, beacon_period);
2183 + struct ath_hw *ah = sc->sc_ah;
2184
2185 - if (test_bit(SC_OP_TSF_RESET, &sc->sc_flags)) {
2186 - ath9k_ps_restore(sc);
2187 - clear_bit(SC_OP_TSF_RESET, &sc->sc_flags);
2188 - }
2189 + ath9k_hw_disable_interrupts(ah);
2190 + ath9k_hw_reset_tsf(ah);
2191 + ath9k_beaconq_config(sc);
2192 + ath9k_hw_beaconinit(ah, nexttbtt, intval);
2193 + sc->beacon.bmisscnt = 0;
2194 + ath9k_hw_set_interrupts(ah);
2195 + ath9k_hw_enable_interrupts(ah);
2196 }
2197
2198 /*
2199 @@ -498,32 +422,27 @@ static void ath9k_beacon_init(struct ath
2200 * burst together. For the former arrange for the SWBA to be delivered for each
2201 * slot. Slots that are not occupied will generate nothing.
2202 */
2203 -static void ath_beacon_config_ap(struct ath_softc *sc,
2204 - struct ath_beacon_config *conf)
2205 +static void ath9k_beacon_config_ap(struct ath_softc *sc,
2206 + struct ath_beacon_config *conf)
2207 {
2208 struct ath_hw *ah = sc->sc_ah;
2209 + struct ath_common *common = ath9k_hw_common(ah);
2210 u32 nexttbtt, intval;
2211
2212 /* NB: the beacon interval is kept internally in TU's */
2213 intval = TU_TO_USEC(conf->beacon_interval);
2214 - intval /= ATH_BCBUF; /* for staggered beacons */
2215 + intval /= ATH_BCBUF;
2216 nexttbtt = intval;
2217
2218 - /*
2219 - * In AP mode we enable the beacon timers and SWBA interrupts to
2220 - * prepare beacon frames.
2221 - */
2222 - ah->imask |= ATH9K_INT_SWBA;
2223 - ath_beaconq_config(sc);
2224 + if (conf->enable_beacon)
2225 + ah->imask |= ATH9K_INT_SWBA;
2226 + else
2227 + ah->imask &= ~ATH9K_INT_SWBA;
2228
2229 - /* Set the computed AP beacon timers */
2230 + ath_dbg(common, BEACON, "AP nexttbtt: %u intval: %u conf_intval: %u\n",
2231 + nexttbtt, intval, conf->beacon_interval);
2232
2233 - ath9k_hw_disable_interrupts(ah);
2234 - set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
2235 ath9k_beacon_init(sc, nexttbtt, intval);
2236 - sc->beacon.bmisscnt = 0;
2237 - ath9k_hw_set_interrupts(ah);
2238 - ath9k_hw_enable_interrupts(ah);
2239 }
2240
2241 /*
2242 @@ -534,8 +453,8 @@ static void ath_beacon_config_ap(struct
2243 * we'll receive a BMISS interrupt when we stop seeing beacons from the AP
2244 * we've associated with.
2245 */
2246 -static void ath_beacon_config_sta(struct ath_softc *sc,
2247 - struct ath_beacon_config *conf)
2248 +static void ath9k_beacon_config_sta(struct ath_softc *sc,
2249 + struct ath_beacon_config *conf)
2250 {
2251 struct ath_hw *ah = sc->sc_ah;
2252 struct ath_common *common = ath9k_hw_common(ah);
2253 @@ -654,8 +573,8 @@ static void ath_beacon_config_sta(struct
2254 ath9k_hw_enable_interrupts(ah);
2255 }
2256
2257 -static void ath_beacon_config_adhoc(struct ath_softc *sc,
2258 - struct ath_beacon_config *conf)
2259 +static void ath9k_beacon_config_adhoc(struct ath_softc *sc,
2260 + struct ath_beacon_config *conf)
2261 {
2262 struct ath_hw *ah = sc->sc_ah;
2263 struct ath_common *common = ath9k_hw_common(ah);
2264 @@ -669,82 +588,53 @@ static void ath_beacon_config_adhoc(stru
2265 tsf = roundup(ath9k_hw_gettsf32(ah) + TU_TO_USEC(FUDGE), intval);
2266 nexttbtt = tsf + intval;
2267
2268 - ath_dbg(common, BEACON, "IBSS nexttbtt %u intval %u (%u)\n",
2269 - nexttbtt, intval, conf->beacon_interval);
2270 -
2271 - /*
2272 - * In IBSS mode enable the beacon timers but only enable SWBA interrupts
2273 - * if we need to manually prepare beacon frames. Otherwise we use a
2274 - * self-linked tx descriptor and let the hardware deal with things.
2275 - */
2276 - ah->imask |= ATH9K_INT_SWBA;
2277 -
2278 - ath_beaconq_config(sc);
2279 + if (conf->enable_beacon)
2280 + ah->imask |= ATH9K_INT_SWBA;
2281 + else
2282 + ah->imask &= ~ATH9K_INT_SWBA;
2283
2284 - /* Set the computed ADHOC beacon timers */
2285 + ath_dbg(common, BEACON, "IBSS nexttbtt: %u intval: %u conf_intval: %u\n",
2286 + nexttbtt, intval, conf->beacon_interval);
2287
2288 - ath9k_hw_disable_interrupts(ah);
2289 ath9k_beacon_init(sc, nexttbtt, intval);
2290 - sc->beacon.bmisscnt = 0;
2291 -
2292 - ath9k_hw_set_interrupts(ah);
2293 - ath9k_hw_enable_interrupts(ah);
2294 }
2295
2296 -static bool ath9k_allow_beacon_config(struct ath_softc *sc,
2297 - struct ieee80211_vif *vif)
2298 +bool ath9k_allow_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
2299 {
2300 - struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2301 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2302 - struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2303 struct ath_vif *avp = (void *)vif->drv_priv;
2304
2305 - /*
2306 - * Can not have different beacon interval on multiple
2307 - * AP interface case
2308 - */
2309 - if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
2310 - (sc->nbcnvifs > 1) &&
2311 - (vif->type == NL80211_IFTYPE_AP) &&
2312 - (cur_conf->beacon_interval != bss_conf->beacon_int)) {
2313 - ath_dbg(common, CONFIG,
2314 - "Changing beacon interval of multiple AP interfaces !\n");
2315 - return false;
2316 - }
2317 - /*
2318 - * Can not configure station vif's beacon config
2319 - * while on AP opmode
2320 - */
2321 - if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
2322 - (vif->type != NL80211_IFTYPE_AP)) {
2323 - ath_dbg(common, CONFIG,
2324 - "STA vif's beacon not allowed on AP mode\n");
2325 - return false;
2326 + if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) {
2327 + if ((vif->type != NL80211_IFTYPE_AP) ||
2328 + (sc->nbcnvifs > 1)) {
2329 + ath_dbg(common, CONFIG,
2330 + "An AP interface is already present !\n");
2331 + return false;
2332 + }
2333 }
2334 - /*
2335 - * Do not allow beacon config if HW was already configured
2336 - * with another STA vif
2337 - */
2338 - if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
2339 - (vif->type == NL80211_IFTYPE_STATION) &&
2340 - test_bit(SC_OP_BEACONS, &sc->sc_flags) &&
2341 - !avp->primary_sta_vif) {
2342 - ath_dbg(common, CONFIG,
2343 - "Beacon already configured for a station interface\n");
2344 - return false;
2345 +
2346 + if (sc->sc_ah->opmode == NL80211_IFTYPE_STATION) {
2347 + if ((vif->type == NL80211_IFTYPE_STATION) &&
2348 + test_bit(SC_OP_BEACONS, &sc->sc_flags) &&
2349 + !avp->primary_sta_vif) {
2350 + ath_dbg(common, CONFIG,
2351 + "Beacon already configured for a station interface\n");
2352 + return false;
2353 + }
2354 }
2355 +
2356 return true;
2357 }
2358
2359 -void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
2360 +static void ath9k_cache_beacon_config(struct ath_softc *sc,
2361 + struct ieee80211_bss_conf *bss_conf)
2362 {
2363 + struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2364 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2365 - struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2366
2367 - if (!ath9k_allow_beacon_config(sc, vif))
2368 - return;
2369 + ath_dbg(common, BEACON,
2370 + "Caching beacon data for BSS: %pM\n", bss_conf->bssid);
2371
2372 - /* Setup the beacon configuration parameters */
2373 cur_conf->beacon_interval = bss_conf->beacon_int;
2374 cur_conf->dtim_period = bss_conf->dtim_period;
2375 cur_conf->listen_interval = 1;
2376 @@ -769,73 +659,59 @@ void ath_beacon_config(struct ath_softc
2377 if (cur_conf->dtim_period == 0)
2378 cur_conf->dtim_period = 1;
2379
2380 - ath_set_beacon(sc);
2381 }
2382
2383 -static bool ath_has_valid_bslot(struct ath_softc *sc)
2384 +void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
2385 + u32 changed)
2386 {
2387 - struct ath_vif *avp;
2388 - int slot;
2389 - bool found = false;
2390 + struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2391 + struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2392
2393 - for (slot = 0; slot < ATH_BCBUF; slot++) {
2394 - if (sc->beacon.bslot[slot]) {
2395 - avp = (void *)sc->beacon.bslot[slot]->drv_priv;
2396 - if (avp->is_bslot_active) {
2397 - found = true;
2398 - break;
2399 - }
2400 + ath9k_cache_beacon_config(sc, bss_conf);
2401 +
2402 + if (sc->sc_ah->opmode == NL80211_IFTYPE_STATION) {
2403 + ath9k_set_beacon(sc);
2404 + set_bit(SC_OP_BEACONS, &sc->sc_flags);
2405 + } else {
2406 + /*
2407 + * Take care of multiple interfaces when
2408 + * enabling/disabling SWBA.
2409 + */
2410 + if (changed & BSS_CHANGED_BEACON_ENABLED) {
2411 + if (!bss_conf->enable_beacon &&
2412 + (sc->nbcnvifs <= 1))
2413 + cur_conf->enable_beacon = false;
2414 + else if (bss_conf->enable_beacon)
2415 + cur_conf->enable_beacon = true;
2416 }
2417 +
2418 + ath9k_set_beacon(sc);
2419 +
2420 + if (cur_conf->enable_beacon)
2421 + set_bit(SC_OP_BEACONS, &sc->sc_flags);
2422 + else
2423 + clear_bit(SC_OP_BEACONS, &sc->sc_flags);
2424 }
2425 - return found;
2426 }
2427
2428 -
2429 -void ath_set_beacon(struct ath_softc *sc)
2430 +void ath9k_set_beacon(struct ath_softc *sc)
2431 {
2432 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2433 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2434
2435 switch (sc->sc_ah->opmode) {
2436 case NL80211_IFTYPE_AP:
2437 - if (ath_has_valid_bslot(sc))
2438 - ath_beacon_config_ap(sc, cur_conf);
2439 + ath9k_beacon_config_ap(sc, cur_conf);
2440 break;
2441 case NL80211_IFTYPE_ADHOC:
2442 case NL80211_IFTYPE_MESH_POINT:
2443 - ath_beacon_config_adhoc(sc, cur_conf);
2444 + ath9k_beacon_config_adhoc(sc, cur_conf);
2445 break;
2446 case NL80211_IFTYPE_STATION:
2447 - ath_beacon_config_sta(sc, cur_conf);
2448 + ath9k_beacon_config_sta(sc, cur_conf);
2449 break;
2450 default:
2451 ath_dbg(common, CONFIG, "Unsupported beaconing mode\n");
2452 return;
2453 }
2454 -
2455 - set_bit(SC_OP_BEACONS, &sc->sc_flags);
2456 -}
2457 -
2458 -void ath9k_set_beaconing_status(struct ath_softc *sc, bool status)
2459 -{
2460 - struct ath_hw *ah = sc->sc_ah;
2461 -
2462 - if (!ath_has_valid_bslot(sc)) {
2463 - clear_bit(SC_OP_BEACONS, &sc->sc_flags);
2464 - return;
2465 - }
2466 -
2467 - ath9k_ps_wakeup(sc);
2468 - if (status) {
2469 - /* Re-enable beaconing */
2470 - ah->imask |= ATH9K_INT_SWBA;
2471 - ath9k_hw_set_interrupts(ah);
2472 - } else {
2473 - /* Disable SWBA interrupt */
2474 - ah->imask &= ~ATH9K_INT_SWBA;
2475 - ath9k_hw_set_interrupts(ah);
2476 - tasklet_kill(&sc->bcon_tasklet);
2477 - ath9k_hw_stop_dma_queue(ah, sc->beacon.beaconq);
2478 - }
2479 - ath9k_ps_restore(sc);
2480 }
2481 --- a/drivers/net/wireless/ath/ath9k/calib.h
2482 +++ b/drivers/net/wireless/ath/ath9k/calib.h
2483 @@ -30,10 +30,10 @@ struct ar5416IniArray {
2484 u32 ia_columns;
2485 };
2486
2487 -#define INIT_INI_ARRAY(iniarray, array, rows, columns) do { \
2488 +#define INIT_INI_ARRAY(iniarray, array) do { \
2489 (iniarray)->ia_array = (u32 *)(array); \
2490 - (iniarray)->ia_rows = (rows); \
2491 - (iniarray)->ia_columns = (columns); \
2492 + (iniarray)->ia_rows = ARRAY_SIZE(array); \
2493 + (iniarray)->ia_columns = ARRAY_SIZE(array[0]); \
2494 } while (0)
2495
2496 #define INI_RA(iniarray, row, column) \
2497 --- a/drivers/net/wireless/ath/ath9k/debug.c
2498 +++ b/drivers/net/wireless/ath/ath9k/debug.c
2499 @@ -206,10 +206,9 @@ static ssize_t write_file_disable_ani(st
2500
2501 if (disable_ani) {
2502 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
2503 - del_timer_sync(&common->ani.timer);
2504 + ath_stop_ani(sc);
2505 } else {
2506 - set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
2507 - ath_start_ani(common);
2508 + ath_check_ani(sc);
2509 }
2510
2511 return count;
2512 @@ -1556,6 +1555,14 @@ int ath9k_init_debug(struct ath_hw *ah)
2513 &fops_interrupt);
2514 debugfs_create_file("xmit", S_IRUSR, sc->debug.debugfs_phy, sc,
2515 &fops_xmit);
2516 + debugfs_create_u32("qlen_bk", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
2517 + &sc->tx.txq_max_pending[WME_AC_BK]);
2518 + debugfs_create_u32("qlen_be", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
2519 + &sc->tx.txq_max_pending[WME_AC_BE]);
2520 + debugfs_create_u32("qlen_vi", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
2521 + &sc->tx.txq_max_pending[WME_AC_VI]);
2522 + debugfs_create_u32("qlen_vo", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
2523 + &sc->tx.txq_max_pending[WME_AC_VO]);
2524 debugfs_create_file("stations", S_IRUSR, sc->debug.debugfs_phy, sc,
2525 &fops_stations);
2526 debugfs_create_file("misc", S_IRUSR, sc->debug.debugfs_phy, sc,
2527 --- a/drivers/net/wireless/ath/ath9k/debug.h
2528 +++ b/drivers/net/wireless/ath/ath9k/debug.h
2529 @@ -32,6 +32,19 @@ struct ath_buf;
2530 #define RESET_STAT_INC(sc, type) do { } while (0)
2531 #endif
2532
2533 +enum ath_reset_type {
2534 + RESET_TYPE_BB_HANG,
2535 + RESET_TYPE_BB_WATCHDOG,
2536 + RESET_TYPE_FATAL_INT,
2537 + RESET_TYPE_TX_ERROR,
2538 + RESET_TYPE_TX_HANG,
2539 + RESET_TYPE_PLL_HANG,
2540 + RESET_TYPE_MAC_HANG,
2541 + RESET_TYPE_BEACON_STUCK,
2542 + RESET_TYPE_MCI,
2543 + __RESET_TYPE_MAX
2544 +};
2545 +
2546 #ifdef CONFIG_ATH9K_DEBUGFS
2547
2548 /**
2549 @@ -209,17 +222,6 @@ struct ath_rx_stats {
2550 u32 rx_frags;
2551 };
2552
2553 -enum ath_reset_type {
2554 - RESET_TYPE_BB_HANG,
2555 - RESET_TYPE_BB_WATCHDOG,
2556 - RESET_TYPE_FATAL_INT,
2557 - RESET_TYPE_TX_ERROR,
2558 - RESET_TYPE_TX_HANG,
2559 - RESET_TYPE_PLL_HANG,
2560 - RESET_TYPE_MAC_HANG,
2561 - __RESET_TYPE_MAX
2562 -};
2563 -
2564 struct ath_stats {
2565 struct ath_interrupt_stats istats;
2566 struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
2567 --- a/drivers/net/wireless/ath/ath9k/eeprom.h
2568 +++ b/drivers/net/wireless/ath/ath9k/eeprom.h
2569 @@ -241,16 +241,12 @@ enum eeprom_param {
2570 EEP_TEMPSENSE_SLOPE,
2571 EEP_TEMPSENSE_SLOPE_PAL_ON,
2572 EEP_PWR_TABLE_OFFSET,
2573 - EEP_DRIVE_STRENGTH,
2574 - EEP_INTERNAL_REGULATOR,
2575 - EEP_SWREG,
2576 EEP_PAPRD,
2577 EEP_MODAL_VER,
2578 EEP_ANT_DIV_CTL1,
2579 EEP_CHAIN_MASK_REDUCE,
2580 EEP_ANTENNA_GAIN_2G,
2581 EEP_ANTENNA_GAIN_5G,
2582 - EEP_QUICK_DROP
2583 };
2584
2585 enum ar5416_rates {
2586 --- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
2587 +++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
2588 @@ -1111,7 +1111,7 @@ static int ath9k_htc_add_interface(struc
2589
2590 if ((priv->ah->opmode == NL80211_IFTYPE_AP) &&
2591 !test_bit(OP_ANI_RUNNING, &priv->op_flags)) {
2592 - ath9k_hw_set_tsfadjust(priv->ah, 1);
2593 + ath9k_hw_set_tsfadjust(priv->ah, true);
2594 ath9k_htc_start_ani(priv);
2595 }
2596
2597 @@ -1351,7 +1351,7 @@ static int ath9k_htc_conf_tx(struct ieee
2598 qi.tqi_aifs = params->aifs;
2599 qi.tqi_cwmin = params->cw_min;
2600 qi.tqi_cwmax = params->cw_max;
2601 - qi.tqi_burstTime = params->txop;
2602 + qi.tqi_burstTime = params->txop * 32;
2603
2604 qnum = get_hw_qnum(queue, priv->hwq_map);
2605
2606 --- a/drivers/net/wireless/ath/ath9k/hw.c
2607 +++ b/drivers/net/wireless/ath/ath9k/hw.c
2608 @@ -671,10 +671,6 @@ static int __ath9k_hw_init(struct ath_hw
2609 if (!AR_SREV_9300_20_OR_LATER(ah))
2610 ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
2611
2612 - /* disable ANI for 9340 */
2613 - if (AR_SREV_9340(ah))
2614 - ah->config.enable_ani = false;
2615 -
2616 ath9k_hw_init_mode_regs(ah);
2617
2618 if (!ah->is_pciexpress)
2619 @@ -2916,9 +2912,9 @@ void ath9k_hw_reset_tsf(struct ath_hw *a
2620 }
2621 EXPORT_SYMBOL(ath9k_hw_reset_tsf);
2622
2623 -void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting)
2624 +void ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set)
2625 {
2626 - if (setting)
2627 + if (set)
2628 ah->misc_mode |= AR_PCU_TX_ADD_TSF;
2629 else
2630 ah->misc_mode &= ~AR_PCU_TX_ADD_TSF;
2631 --- a/drivers/net/wireless/ath/ath9k/hw.h
2632 +++ b/drivers/net/wireless/ath/ath9k/hw.h
2633 @@ -994,7 +994,7 @@ u32 ath9k_hw_gettsf32(struct ath_hw *ah)
2634 u64 ath9k_hw_gettsf64(struct ath_hw *ah);
2635 void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64);
2636 void ath9k_hw_reset_tsf(struct ath_hw *ah);
2637 -void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting);
2638 +void ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set);
2639 void ath9k_hw_init_global_settings(struct ath_hw *ah);
2640 u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah);
2641 void ath9k_hw_set11nmac2040(struct ath_hw *ah);
2642 --- a/drivers/net/wireless/ath/ath9k/init.c
2643 +++ b/drivers/net/wireless/ath/ath9k/init.c
2644 @@ -436,6 +436,7 @@ static int ath9k_init_queues(struct ath_
2645 for (i = 0; i < WME_NUM_AC; i++) {
2646 sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i);
2647 sc->tx.txq_map[i]->mac80211_qnum = i;
2648 + sc->tx.txq_max_pending[i] = ATH_MAX_QDEPTH;
2649 }
2650 return 0;
2651 }
2652 @@ -560,7 +561,7 @@ static int ath9k_init_softc(u16 devid, s
2653 spin_lock_init(&sc->debug.samp_lock);
2654 #endif
2655 tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
2656 - tasklet_init(&sc->bcon_tasklet, ath_beacon_tasklet,
2657 + tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet,
2658 (unsigned long)sc);
2659
2660 INIT_WORK(&sc->hw_reset_work, ath_reset_work);
2661 --- a/drivers/net/wireless/ath/ath9k/link.c
2662 +++ b/drivers/net/wireless/ath/ath9k/link.c
2663 @@ -50,8 +50,7 @@ void ath_tx_complete_poll_work(struct wo
2664 if (needreset) {
2665 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET,
2666 "tx hung, resetting the chip\n");
2667 - RESET_STAT_INC(sc, RESET_TYPE_TX_HANG);
2668 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
2669 + ath9k_queue_reset(sc, RESET_TYPE_TX_HANG);
2670 return;
2671 }
2672
2673 @@ -69,6 +68,7 @@ void ath_hw_check(struct work_struct *wo
2674 unsigned long flags;
2675 int busy;
2676 u8 is_alive, nbeacon = 1;
2677 + enum ath_reset_type type;
2678
2679 ath9k_ps_wakeup(sc);
2680 is_alive = ath9k_hw_check_alive(sc->sc_ah);
2681 @@ -78,7 +78,7 @@ void ath_hw_check(struct work_struct *wo
2682 else if (!is_alive && AR_SREV_9300(sc->sc_ah)) {
2683 ath_dbg(common, RESET,
2684 "DCU stuck is detected. Schedule chip reset\n");
2685 - RESET_STAT_INC(sc, RESET_TYPE_MAC_HANG);
2686 + type = RESET_TYPE_MAC_HANG;
2687 goto sched_reset;
2688 }
2689
2690 @@ -90,7 +90,7 @@ void ath_hw_check(struct work_struct *wo
2691 busy, sc->hw_busy_count + 1);
2692 if (busy >= 99) {
2693 if (++sc->hw_busy_count >= 3) {
2694 - RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
2695 + type = RESET_TYPE_BB_HANG;
2696 goto sched_reset;
2697 }
2698 } else if (busy >= 0) {
2699 @@ -102,7 +102,7 @@ void ath_hw_check(struct work_struct *wo
2700 goto out;
2701
2702 sched_reset:
2703 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
2704 + ath9k_queue_reset(sc, type);
2705 out:
2706 ath9k_ps_restore(sc);
2707 }
2708 @@ -119,8 +119,7 @@ static bool ath_hw_pll_rx_hang_check(str
2709 count++;
2710 if (count == 3) {
2711 ath_dbg(common, RESET, "PLL WAR, resetting the chip\n");
2712 - RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
2713 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
2714 + ath9k_queue_reset(sc, RESET_TYPE_PLL_HANG);
2715 count = 0;
2716 return true;
2717 }
2718 @@ -432,26 +431,69 @@ set_timer:
2719 }
2720 }
2721
2722 -void ath_start_ani(struct ath_common *common)
2723 +void ath_start_ani(struct ath_softc *sc)
2724 {
2725 - struct ath_hw *ah = common->ah;
2726 + struct ath_hw *ah = sc->sc_ah;
2727 + struct ath_common *common = ath9k_hw_common(ah);
2728 unsigned long timestamp = jiffies_to_msecs(jiffies);
2729 - struct ath_softc *sc = (struct ath_softc *) common->priv;
2730
2731 - if (!test_bit(SC_OP_ANI_RUN, &sc->sc_flags))
2732 - return;
2733 -
2734 - if (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
2735 + if (common->disable_ani ||
2736 + !test_bit(SC_OP_ANI_RUN, &sc->sc_flags) ||
2737 + (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
2738 return;
2739
2740 common->ani.longcal_timer = timestamp;
2741 common->ani.shortcal_timer = timestamp;
2742 common->ani.checkani_timer = timestamp;
2743
2744 + ath_dbg(common, ANI, "Starting ANI\n");
2745 mod_timer(&common->ani.timer,
2746 jiffies + msecs_to_jiffies((u32)ah->config.ani_poll_interval));
2747 }
2748
2749 +void ath_stop_ani(struct ath_softc *sc)
2750 +{
2751 + struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2752 +
2753 + ath_dbg(common, ANI, "Stopping ANI\n");
2754 + del_timer_sync(&common->ani.timer);
2755 +}
2756 +
2757 +void ath_check_ani(struct ath_softc *sc)
2758 +{
2759 + struct ath_hw *ah = sc->sc_ah;
2760 + struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
2761 +
2762 + /*
2763 + * Check for the various conditions in which ANI has to
2764 + * be stopped.
2765 + */
2766 + if (ah->opmode == NL80211_IFTYPE_ADHOC) {
2767 + if (!cur_conf->enable_beacon)
2768 + goto stop_ani;
2769 + } else if (ah->opmode == NL80211_IFTYPE_AP) {
2770 + if (!cur_conf->enable_beacon) {
2771 + /*
2772 + * Disable ANI only when there are no
2773 + * associated stations.
2774 + */
2775 + if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
2776 + goto stop_ani;
2777 + }
2778 + } else if (ah->opmode == NL80211_IFTYPE_STATION) {
2779 + if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
2780 + goto stop_ani;
2781 + }
2782 +
2783 + set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
2784 + ath_start_ani(sc);
2785 + return;
2786 +
2787 +stop_ani:
2788 + clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
2789 + ath_stop_ani(sc);
2790 +}
2791 +
2792 void ath_update_survey_nf(struct ath_softc *sc, int channel)
2793 {
2794 struct ath_hw *ah = sc->sc_ah;
2795 --- a/drivers/net/wireless/ath/ath9k/main.c
2796 +++ b/drivers/net/wireless/ath/ath9k/main.c
2797 @@ -167,8 +167,6 @@ static void ath_cancel_work(struct ath_s
2798
2799 static void ath_restart_work(struct ath_softc *sc)
2800 {
2801 - struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2802 -
2803 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2804
2805 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9485(sc->sc_ah) ||
2806 @@ -177,21 +175,18 @@ static void ath_restart_work(struct ath_
2807 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
2808
2809 ath_start_rx_poll(sc, 3);
2810 -
2811 - if (!common->disable_ani)
2812 - ath_start_ani(common);
2813 + ath_start_ani(sc);
2814 }
2815
2816 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
2817 {
2818 struct ath_hw *ah = sc->sc_ah;
2819 - struct ath_common *common = ath9k_hw_common(ah);
2820 bool ret = true;
2821
2822 ieee80211_stop_queues(sc->hw);
2823
2824 sc->hw_busy_count = 0;
2825 - del_timer_sync(&common->ani.timer);
2826 + ath_stop_ani(sc);
2827 del_timer_sync(&sc->rx_poll_timer);
2828
2829 ath9k_debug_samp_bb_mac(sc);
2830 @@ -236,7 +231,7 @@ static bool ath_complete_reset(struct at
2831 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
2832 goto work;
2833
2834 - ath_set_beacon(sc);
2835 + ath9k_set_beacon(sc);
2836
2837 if (ah->opmode == NL80211_IFTYPE_STATION &&
2838 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
2839 @@ -365,6 +360,7 @@ void ath9k_tasklet(unsigned long data)
2840 struct ath_softc *sc = (struct ath_softc *)data;
2841 struct ath_hw *ah = sc->sc_ah;
2842 struct ath_common *common = ath9k_hw_common(ah);
2843 + enum ath_reset_type type;
2844 unsigned long flags;
2845 u32 status = sc->intrstatus;
2846 u32 rxmask;
2847 @@ -374,18 +370,13 @@ void ath9k_tasklet(unsigned long data)
2848
2849 if ((status & ATH9K_INT_FATAL) ||
2850 (status & ATH9K_INT_BB_WATCHDOG)) {
2851 -#ifdef CONFIG_ATH9K_DEBUGFS
2852 - enum ath_reset_type type;
2853
2854 if (status & ATH9K_INT_FATAL)
2855 type = RESET_TYPE_FATAL_INT;
2856 else
2857 type = RESET_TYPE_BB_WATCHDOG;
2858
2859 - RESET_STAT_INC(sc, type);
2860 -#endif
2861 - set_bit(SC_OP_HW_RESET, &sc->sc_flags);
2862 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
2863 + ath9k_queue_reset(sc, type);
2864 goto out;
2865 }
2866
2867 @@ -586,6 +577,15 @@ static int ath_reset(struct ath_softc *s
2868 return r;
2869 }
2870
2871 +void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
2872 +{
2873 +#ifdef CONFIG_ATH9K_DEBUGFS
2874 + RESET_STAT_INC(sc, type);
2875 +#endif
2876 + set_bit(SC_OP_HW_RESET, &sc->sc_flags);
2877 + ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
2878 +}
2879 +
2880 void ath_reset_work(struct work_struct *work)
2881 {
2882 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
2883 @@ -852,16 +852,6 @@ bool ath9k_uses_beacons(int type)
2884 }
2885 }
2886
2887 -static void ath9k_reclaim_beacon(struct ath_softc *sc,
2888 - struct ieee80211_vif *vif)
2889 -{
2890 - struct ath_vif *avp = (void *)vif->drv_priv;
2891 -
2892 - ath9k_set_beaconing_status(sc, false);
2893 - ath_beacon_return(sc, avp);
2894 - ath9k_set_beaconing_status(sc, true);
2895 -}
2896 -
2897 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
2898 {
2899 struct ath9k_vif_iter_data *iter_data = data;
2900 @@ -929,18 +919,14 @@ static void ath9k_calculate_summary_stat
2901
2902 ath9k_calculate_iter_data(hw, vif, &iter_data);
2903
2904 - /* Set BSSID mask. */
2905 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
2906 ath_hw_setbssidmask(common);
2907
2908 - /* Set op-mode & TSF */
2909 if (iter_data.naps > 0) {
2910 - ath9k_hw_set_tsfadjust(ah, 1);
2911 - set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
2912 + ath9k_hw_set_tsfadjust(ah, true);
2913 ah->opmode = NL80211_IFTYPE_AP;
2914 } else {
2915 - ath9k_hw_set_tsfadjust(ah, 0);
2916 - clear_bit(SC_OP_TSF_RESET, &sc->sc_flags);
2917 + ath9k_hw_set_tsfadjust(ah, false);
2918
2919 if (iter_data.nmeshes)
2920 ah->opmode = NL80211_IFTYPE_MESH_POINT;
2921 @@ -952,45 +938,14 @@ static void ath9k_calculate_summary_stat
2922 ah->opmode = NL80211_IFTYPE_STATION;
2923 }
2924
2925 - /*
2926 - * Enable MIB interrupts when there are hardware phy counters.
2927 - */
2928 + ath9k_hw_setopmode(ah);
2929 +
2930 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
2931 ah->imask |= ATH9K_INT_TSFOOR;
2932 else
2933 ah->imask &= ~ATH9K_INT_TSFOOR;
2934
2935 ath9k_hw_set_interrupts(ah);
2936 -
2937 - /* Set up ANI */
2938 - if (iter_data.naps > 0) {
2939 - sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2940 -
2941 - if (!common->disable_ani) {
2942 - set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
2943 - ath_start_ani(common);
2944 - }
2945 -
2946 - } else {
2947 - clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
2948 - del_timer_sync(&common->ani.timer);
2949 - }
2950 -}
2951 -
2952 -/* Called with sc->mutex held, vif counts set up properly. */
2953 -static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
2954 - struct ieee80211_vif *vif)
2955 -{
2956 - struct ath_softc *sc = hw->priv;
2957 -
2958 - ath9k_calculate_summary_state(hw, vif);
2959 -
2960 - if (ath9k_uses_beacons(vif->type)) {
2961 - /* Reserve a beacon slot for the vif */
2962 - ath9k_set_beaconing_status(sc, false);
2963 - ath_beacon_alloc(sc, vif);
2964 - ath9k_set_beaconing_status(sc, true);
2965 - }
2966 }
2967
2968 static int ath9k_add_interface(struct ieee80211_hw *hw,
2969 @@ -1032,7 +987,10 @@ static int ath9k_add_interface(struct ie
2970
2971 sc->nvifs++;
2972
2973 - ath9k_do_vif_add_setup(hw, vif);
2974 + ath9k_calculate_summary_state(hw, vif);
2975 + if (ath9k_uses_beacons(vif->type))
2976 + ath9k_beacon_assign_slot(sc, vif);
2977 +
2978 out:
2979 mutex_unlock(&sc->mutex);
2980 ath9k_ps_restore(sc);
2981 @@ -1049,6 +1007,7 @@ static int ath9k_change_interface(struct
2982 int ret = 0;
2983
2984 ath_dbg(common, CONFIG, "Change Interface\n");
2985 +
2986 mutex_lock(&sc->mutex);
2987 ath9k_ps_wakeup(sc);
2988
2989 @@ -1061,15 +1020,16 @@ static int ath9k_change_interface(struct
2990 }
2991 }
2992
2993 - /* Clean up old vif stuff */
2994 if (ath9k_uses_beacons(vif->type))
2995 - ath9k_reclaim_beacon(sc, vif);
2996 + ath9k_beacon_remove_slot(sc, vif);
2997
2998 - /* Add new settings */
2999 vif->type = new_type;
3000 vif->p2p = p2p;
3001
3002 - ath9k_do_vif_add_setup(hw, vif);
3003 + ath9k_calculate_summary_state(hw, vif);
3004 + if (ath9k_uses_beacons(vif->type))
3005 + ath9k_beacon_assign_slot(sc, vif);
3006 +
3007 out:
3008 ath9k_ps_restore(sc);
3009 mutex_unlock(&sc->mutex);
3010 @@ -1089,9 +1049,8 @@ static void ath9k_remove_interface(struc
3011
3012 sc->nvifs--;
3013
3014 - /* Reclaim beacon resources */
3015 if (ath9k_uses_beacons(vif->type))
3016 - ath9k_reclaim_beacon(sc, vif);
3017 + ath9k_beacon_remove_slot(sc, vif);
3018
3019 ath9k_calculate_summary_state(hw, NULL);
3020
3021 @@ -1388,21 +1347,18 @@ static int ath9k_conf_tx(struct ieee8021
3022 qi.tqi_aifs = params->aifs;
3023 qi.tqi_cwmin = params->cw_min;
3024 qi.tqi_cwmax = params->cw_max;
3025 - qi.tqi_burstTime = params->txop;
3026 + qi.tqi_burstTime = params->txop * 32;
3027
3028 ath_dbg(common, CONFIG,
3029 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
3030 queue, txq->axq_qnum, params->aifs, params->cw_min,
3031 params->cw_max, params->txop);
3032
3033 + ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
3034 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
3035 if (ret)
3036 ath_err(common, "TXQ Update failed\n");
3037
3038 - if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
3039 - if (queue == WME_AC_BE && !ret)
3040 - ath_beaconq_config(sc);
3041 -
3042 mutex_unlock(&sc->mutex);
3043 ath9k_ps_restore(sc);
3044
3045 @@ -1471,85 +1427,36 @@ static int ath9k_set_key(struct ieee8021
3046
3047 return ret;
3048 }
3049 -static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
3050 +
3051 +static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
3052 {
3053 struct ath_softc *sc = data;
3054 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
3055 - struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
3056 struct ath_vif *avp = (void *)vif->drv_priv;
3057 + struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
3058 unsigned long flags;
3059 - /*
3060 - * Skip iteration if primary station vif's bss info
3061 - * was not changed
3062 - */
3063 +
3064 if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
3065 return;
3066
3067 if (bss_conf->assoc) {
3068 set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
3069 avp->primary_sta_vif = true;
3070 +
3071 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
3072 common->curaid = bss_conf->aid;
3073 ath9k_hw_write_associd(sc->sc_ah);
3074 - ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
3075 - bss_conf->aid, common->curbssid);
3076 - ath_beacon_config(sc, vif);
3077 - /*
3078 - * Request a re-configuration of Beacon related timers
3079 - * on the receipt of the first Beacon frame (i.e.,
3080 - * after time sync with the AP).
3081 - */
3082 - spin_lock_irqsave(&sc->sc_pm_lock, flags);
3083 - sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
3084 - spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
3085
3086 - /* Reset rssi stats */
3087 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
3088 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
3089
3090 - ath_start_rx_poll(sc, 3);
3091 -
3092 - if (!common->disable_ani) {
3093 - set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
3094 - ath_start_ani(common);
3095 - }
3096 -
3097 - }
3098 -}
3099 -
3100 -static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
3101 -{
3102 - struct ath_common *common = ath9k_hw_common(sc->sc_ah);
3103 - struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
3104 - struct ath_vif *avp = (void *)vif->drv_priv;
3105 -
3106 - if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
3107 - return;
3108 -
3109 - /* Reconfigure bss info */
3110 - if (avp->primary_sta_vif && !bss_conf->assoc) {
3111 - ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
3112 - common->curaid, common->curbssid);
3113 - clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
3114 - clear_bit(SC_OP_BEACONS, &sc->sc_flags);
3115 - avp->primary_sta_vif = false;
3116 - memset(common->curbssid, 0, ETH_ALEN);
3117 - common->curaid = 0;
3118 - }
3119 -
3120 - ieee80211_iterate_active_interfaces_atomic(
3121 - sc->hw, ath9k_bss_iter, sc);
3122 + spin_lock_irqsave(&sc->sc_pm_lock, flags);
3123 + sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
3124 + spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
3125
3126 - /*
3127 - * None of station vifs are associated.
3128 - * Clear bssid & aid
3129 - */
3130 - if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
3131 - ath9k_hw_write_associd(sc->sc_ah);
3132 - clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
3133 - del_timer_sync(&common->ani.timer);
3134 - del_timer_sync(&sc->rx_poll_timer);
3135 - memset(&sc->caldata, 0, sizeof(sc->caldata));
3136 + ath_dbg(common, CONFIG,
3137 + "Primary Station interface: %pM, BSSID: %pM\n",
3138 + vif->addr, common->curbssid);
3139 }
3140 }
3141
3142 @@ -1558,6 +1465,11 @@ static void ath9k_bss_info_changed(struc
3143 struct ieee80211_bss_conf *bss_conf,
3144 u32 changed)
3145 {
3146 +#define CHECK_ANI \
3147 + (BSS_CHANGED_ASSOC | \
3148 + BSS_CHANGED_IBSS | \
3149 + BSS_CHANGED_BEACON_ENABLED)
3150 +
3151 struct ath_softc *sc = hw->priv;
3152 struct ath_hw *ah = sc->sc_ah;
3153 struct ath_common *common = ath9k_hw_common(ah);
3154 @@ -1568,53 +1480,43 @@ static void ath9k_bss_info_changed(struc
3155 mutex_lock(&sc->mutex);
3156
3157 if (changed & BSS_CHANGED_ASSOC) {
3158 - ath9k_config_bss(sc, vif);
3159 + ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
3160 + bss_conf->bssid, bss_conf->assoc);
3161
3162 - ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
3163 - common->curbssid, common->curaid);
3164 + /*
3165 + * Do not do anything when the opmode is not STATION.
3166 + */
3167 + if (ah->opmode == NL80211_IFTYPE_STATION) {
3168 + if (avp->primary_sta_vif && !bss_conf->assoc) {
3169 + clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
3170 + clear_bit(SC_OP_BEACONS, &sc->sc_flags);
3171 + avp->primary_sta_vif = false;
3172 + }
3173 +
3174 + ieee80211_iterate_active_interfaces_atomic(sc->hw,
3175 + ath9k_bss_assoc_iter, sc);
3176 +
3177 + if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
3178 + memset(common->curbssid, 0, ETH_ALEN);
3179 + common->curaid = 0;
3180 + ath9k_hw_write_associd(sc->sc_ah);
3181 + }
3182 + }
3183 }
3184
3185 if (changed & BSS_CHANGED_IBSS) {
3186 - /* There can be only one vif available */
3187 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
3188 common->curaid = bss_conf->aid;
3189 ath9k_hw_write_associd(sc->sc_ah);
3190 -
3191 - if (bss_conf->ibss_joined) {
3192 - sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
3193 -
3194 - if (!common->disable_ani) {
3195 - set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
3196 - ath_start_ani(common);
3197 - }
3198 -
3199 - } else {
3200 - clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
3201 - del_timer_sync(&common->ani.timer);
3202 - del_timer_sync(&sc->rx_poll_timer);
3203 - }
3204 }
3205
3206 - /*
3207 - * In case of AP mode, the HW TSF has to be reset
3208 - * when the beacon interval changes.
3209 - */
3210 - if ((changed & BSS_CHANGED_BEACON_INT) &&
3211 - (vif->type == NL80211_IFTYPE_AP))
3212 - set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
3213 -
3214 - /* Configure beaconing (AP, IBSS, MESH) */
3215 - if (ath9k_uses_beacons(vif->type) &&
3216 - ((changed & BSS_CHANGED_BEACON) ||
3217 - (changed & BSS_CHANGED_BEACON_ENABLED) ||
3218 - (changed & BSS_CHANGED_BEACON_INT))) {
3219 - ath9k_set_beaconing_status(sc, false);
3220 - if (bss_conf->enable_beacon)
3221 - ath_beacon_alloc(sc, vif);
3222 - else
3223 - avp->is_bslot_active = false;
3224 - ath_beacon_config(sc, vif);
3225 - ath9k_set_beaconing_status(sc, true);
3226 + if ((changed & BSS_CHANGED_BEACON) ||
3227 + (changed & BSS_CHANGED_BEACON_ENABLED) ||
3228 + (changed & BSS_CHANGED_BEACON_INT)) {
3229 + if (ah->opmode == NL80211_IFTYPE_AP)
3230 + ath9k_set_tsfadjust(sc, vif);
3231 + if (ath9k_allow_beacon_config(sc, vif))
3232 + ath9k_beacon_config(sc, vif, changed);
3233 }
3234
3235 if (changed & BSS_CHANGED_ERP_SLOT) {
3236 @@ -1636,8 +1538,13 @@ static void ath9k_bss_info_changed(struc
3237 }
3238 }
3239
3240 + if (changed & CHECK_ANI)
3241 + ath_check_ani(sc);
3242 +
3243 mutex_unlock(&sc->mutex);
3244 ath9k_ps_restore(sc);
3245 +
3246 +#undef CHECK_ANI
3247 }
3248
3249 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
3250 @@ -1866,10 +1773,11 @@ static int ath9k_tx_last_beacon(struct i
3251 if (!vif)
3252 return 0;
3253
3254 - avp = (void *)vif->drv_priv;
3255 - if (!avp->is_bslot_active)
3256 + if (!vif->bss_conf.enable_beacon)
3257 return 0;
3258
3259 + avp = (void *)vif->drv_priv;
3260 +
3261 if (!sc->beacon.tx_processed && !edma) {
3262 tasklet_disable(&sc->bcon_tasklet);
3263
3264 @@ -1923,12 +1831,29 @@ static u32 fill_chainmask(u32 cap, u32 n
3265 return filled;
3266 }
3267
3268 +static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
3269 +{
3270 + switch (val & 0x7) {
3271 + case 0x1:
3272 + case 0x3:
3273 + case 0x7:
3274 + return true;
3275 + case 0x2:
3276 + return (ah->caps.rx_chainmask == 1);
3277 + default:
3278 + return false;
3279 + }
3280 +}
3281 +
3282 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
3283 {
3284 struct ath_softc *sc = hw->priv;
3285 struct ath_hw *ah = sc->sc_ah;
3286
3287 - if (!rx_ant || !tx_ant)
3288 + if (ah->caps.rx_chainmask != 1)
3289 + rx_ant |= tx_ant;
3290 +
3291 + if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
3292 return -EINVAL;
3293
3294 sc->ant_rx = rx_ant;
3295 --- a/drivers/net/wireless/ath/ath9k/mci.c
3296 +++ b/drivers/net/wireless/ath/ath9k/mci.c
3297 @@ -202,7 +202,7 @@ static void ath_mci_cal_msg(struct ath_s
3298 case MCI_GPM_BT_CAL_REQ:
3299 if (mci_hw->bt_state == MCI_BT_AWAKE) {
3300 ar9003_mci_state(ah, MCI_STATE_SET_BT_CAL_START);
3301 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
3302 + ath9k_queue_reset(sc, RESET_TYPE_MCI);
3303 }
3304 ath_dbg(common, MCI, "MCI State : %d\n", mci_hw->bt_state);
3305 break;
3306 --- a/drivers/net/wireless/ath/ath9k/recv.c
3307 +++ b/drivers/net/wireless/ath/ath9k/recv.c
3308 @@ -553,7 +553,7 @@ static void ath_rx_ps_beacon(struct ath_
3309 sc->ps_flags &= ~PS_BEACON_SYNC;
3310 ath_dbg(common, PS,
3311 "Reconfigure Beacon timers based on timestamp from the AP\n");
3312 - ath_set_beacon(sc);
3313 + ath9k_set_beacon(sc);
3314 }
3315
3316 if (ath_beacon_dtim_pending_cab(skb)) {
3317 --- a/drivers/net/wireless/ath/ath9k/xmit.c
3318 +++ b/drivers/net/wireless/ath/ath9k/xmit.c
3319 @@ -29,6 +29,8 @@
3320 #define HT_LTF(_ns) (4 * (_ns))
3321 #define SYMBOL_TIME(_ns) ((_ns) << 2) /* ns * 4 us */
3322 #define SYMBOL_TIME_HALFGI(_ns) (((_ns) * 18 + 4) / 5) /* ns * 3.6 us */
3323 +#define TIME_SYMBOLS(t) ((t) >> 2)
3324 +#define TIME_SYMBOLS_HALFGI(t) (((t) * 5 - 4) / 18)
3325 #define NUM_SYMBOLS_PER_USEC(_usec) (_usec >> 2)
3326 #define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18)
3327
3328 @@ -74,33 +76,6 @@ enum {
3329 MCS_HT40_SGI,
3330 };
3331
3332 -static int ath_max_4ms_framelen[4][32] = {
3333 - [MCS_HT20] = {
3334 - 3212, 6432, 9648, 12864, 19300, 25736, 28952, 32172,
3335 - 6424, 12852, 19280, 25708, 38568, 51424, 57852, 64280,
3336 - 9628, 19260, 28896, 38528, 57792, 65532, 65532, 65532,
3337 - 12828, 25656, 38488, 51320, 65532, 65532, 65532, 65532,
3338 - },
3339 - [MCS_HT20_SGI] = {
3340 - 3572, 7144, 10720, 14296, 21444, 28596, 32172, 35744,
3341 - 7140, 14284, 21428, 28568, 42856, 57144, 64288, 65532,
3342 - 10700, 21408, 32112, 42816, 64228, 65532, 65532, 65532,
3343 - 14256, 28516, 42780, 57040, 65532, 65532, 65532, 65532,
3344 - },
3345 - [MCS_HT40] = {
3346 - 6680, 13360, 20044, 26724, 40092, 53456, 60140, 65532,
3347 - 13348, 26700, 40052, 53400, 65532, 65532, 65532, 65532,
3348 - 20004, 40008, 60016, 65532, 65532, 65532, 65532, 65532,
3349 - 26644, 53292, 65532, 65532, 65532, 65532, 65532, 65532,
3350 - },
3351 - [MCS_HT40_SGI] = {
3352 - 7420, 14844, 22272, 29696, 44544, 59396, 65532, 65532,
3353 - 14832, 29668, 44504, 59340, 65532, 65532, 65532, 65532,
3354 - 22232, 44464, 65532, 65532, 65532, 65532, 65532, 65532,
3355 - 29616, 59232, 65532, 65532, 65532, 65532, 65532, 65532,
3356 - }
3357 -};
3358 -
3359 /*********************/
3360 /* Aggregation logic */
3361 /*********************/
3362 @@ -614,10 +589,8 @@ static void ath_tx_complete_aggr(struct
3363
3364 rcu_read_unlock();
3365
3366 - if (needreset) {
3367 - RESET_STAT_INC(sc, RESET_TYPE_TX_ERROR);
3368 - ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
3369 - }
3370 + if (needreset)
3371 + ath9k_queue_reset(sc, RESET_TYPE_TX_ERROR);
3372 }
3373
3374 static bool ath_lookup_legacy(struct ath_buf *bf)
3375 @@ -650,6 +623,7 @@ static u32 ath_lookup_rate(struct ath_so
3376 struct ieee80211_tx_rate *rates;
3377 u32 max_4ms_framelen, frmlen;
3378 u16 aggr_limit, bt_aggr_limit, legacy = 0;
3379 + int q = tid->ac->txq->mac80211_qnum;
3380 int i;
3381
3382 skb = bf->bf_mpdu;
3383 @@ -658,8 +632,7 @@ static u32 ath_lookup_rate(struct ath_so
3384
3385 /*
3386 * Find the lowest frame length among the rate series that will have a
3387 - * 4ms transmit duration.
3388 - * TODO - TXOP limit needs to be considered.
3389 + * 4ms (or TXOP limited) transmit duration.
3390 */
3391 max_4ms_framelen = ATH_AMPDU_LIMIT_MAX;
3392
3393 @@ -682,7 +655,7 @@ static u32 ath_lookup_rate(struct ath_so
3394 if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
3395 modeidx++;
3396
3397 - frmlen = ath_max_4ms_framelen[modeidx][rates[i].idx];
3398 + frmlen = sc->tx.max_aggr_framelen[q][modeidx][rates[i].idx];
3399 max_4ms_framelen = min(max_4ms_framelen, frmlen);
3400 }
3401
3402 @@ -929,6 +902,44 @@ static u32 ath_pkt_duration(struct ath_s
3403 return duration;
3404 }
3405
3406 +static int ath_max_framelen(int usec, int mcs, bool ht40, bool sgi)
3407 +{
3408 + int streams = HT_RC_2_STREAMS(mcs);
3409 + int symbols, bits;
3410 + int bytes = 0;
3411 +
3412 + symbols = sgi ? TIME_SYMBOLS_HALFGI(usec) : TIME_SYMBOLS(usec);
3413 + bits = symbols * bits_per_symbol[mcs % 8][ht40] * streams;
3414 + bits -= OFDM_PLCP_BITS;
3415 + bytes = bits / 8;
3416 + bytes -= L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
3417 + if (bytes > 65532)
3418 + bytes = 65532;
3419 +
3420 + return bytes;
3421 +}
3422 +
3423 +void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop)
3424 +{
3425 + u16 *cur_ht20, *cur_ht20_sgi, *cur_ht40, *cur_ht40_sgi;
3426 + int mcs;
3427 +
3428 + /* 4ms is the default (and maximum) duration */
3429 + if (!txop || txop > 4096)
3430 + txop = 4096;
3431 +
3432 + cur_ht20 = sc->tx.max_aggr_framelen[queue][MCS_HT20];
3433 + cur_ht20_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT20_SGI];
3434 + cur_ht40 = sc->tx.max_aggr_framelen[queue][MCS_HT40];
3435 + cur_ht40_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT40_SGI];
3436 + for (mcs = 0; mcs < 32; mcs++) {
3437 + cur_ht20[mcs] = ath_max_framelen(txop, mcs, false, false);
3438 + cur_ht20_sgi[mcs] = ath_max_framelen(txop, mcs, false, true);
3439 + cur_ht40[mcs] = ath_max_framelen(txop, mcs, true, false);
3440 + cur_ht40_sgi[mcs] = ath_max_framelen(txop, mcs, true, true);
3441 + }
3442 +}
3443 +
3444 static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf,
3445 struct ath_tx_info *info, int len)
3446 {
3447 @@ -1586,7 +1597,8 @@ void ath_txq_schedule(struct ath_softc *
3448 struct ath_atx_ac *ac, *ac_tmp, *last_ac;
3449 struct ath_atx_tid *tid, *last_tid;
3450
3451 - if (work_pending(&sc->hw_reset_work) || list_empty(&txq->axq_acq) ||
3452 + if (test_bit(SC_OP_HW_RESET, &sc->sc_flags) ||
3453 + list_empty(&txq->axq_acq) ||
3454 txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH)
3455 return;
3456
3457 @@ -1988,7 +2000,8 @@ int ath_tx_start(struct ieee80211_hw *hw
3458
3459 ath_txq_lock(sc, txq);
3460 if (txq == sc->tx.txq_map[q] &&
3461 - ++txq->pending_frames > ATH_MAX_QDEPTH && !txq->stopped) {
3462 + ++txq->pending_frames > sc->tx.txq_max_pending[q] &&
3463 + !txq->stopped) {
3464 ieee80211_stop_queue(sc->hw, q);
3465 txq->stopped = true;
3466 }
3467 @@ -2047,7 +2060,8 @@ static void ath_tx_complete(struct ath_s
3468 if (WARN_ON(--txq->pending_frames < 0))
3469 txq->pending_frames = 0;
3470
3471 - if (txq->stopped && txq->pending_frames < ATH_MAX_QDEPTH) {
3472 + if (txq->stopped &&
3473 + txq->pending_frames < sc->tx.txq_max_pending[q]) {
3474 ieee80211_wake_queue(sc->hw, q);
3475 txq->stopped = false;
3476 }
3477 @@ -2191,7 +2205,7 @@ static void ath_tx_processq(struct ath_s
3478
3479 ath_txq_lock(sc, txq);
3480 for (;;) {
3481 - if (work_pending(&sc->hw_reset_work))
3482 + if (test_bit(SC_OP_HW_RESET, &sc->sc_flags))
3483 break;
3484
3485 if (list_empty(&txq->axq_q)) {
3486 @@ -2274,7 +2288,7 @@ void ath_tx_edma_tasklet(struct ath_soft
3487 int status;
3488
3489 for (;;) {
3490 - if (work_pending(&sc->hw_reset_work))
3491 + if (test_bit(SC_OP_HW_RESET, &sc->sc_flags))
3492 break;
3493
3494 status = ath9k_hw_txprocdesc(ah, NULL, (void *)&ts);
3495 --- a/drivers/net/wireless/b43/xmit.c
3496 +++ b/drivers/net/wireless/b43/xmit.c
3497 @@ -663,7 +663,7 @@ void b43_rx(struct b43_wldev *dev, struc
3498 u32 uninitialized_var(macstat);
3499 u16 chanid;
3500 u16 phytype;
3501 - int padding;
3502 + int padding, rate_idx;
3503
3504 memset(&status, 0, sizeof(status));
3505
3506 @@ -766,16 +766,17 @@ void b43_rx(struct b43_wldev *dev, struc
3507 }
3508
3509 if (phystat0 & B43_RX_PHYST0_OFDM)
3510 - status.rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
3511 + rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
3512 phytype == B43_PHYTYPE_A);
3513 else
3514 - status.rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
3515 - if (unlikely(status.rate_idx == -1)) {
3516 + rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
3517 + if (unlikely(rate_idx == -1)) {
3518 /* PLCP seems to be corrupted.
3519 * Drop the frame, if we are not interested in corrupted frames. */
3520 if (!(dev->wl->filter_flags & FIF_PLCPFAIL))
3521 goto drop;
3522 }
3523 + status.rate_idx = rate_idx;
3524 status.antenna = !!(phystat0 & B43_RX_PHYST0_ANT);
3525
3526 /*
3527 --- a/drivers/net/wireless/libertas/cfg.c
3528 +++ b/drivers/net/wireless/libertas/cfg.c
3529 @@ -2182,13 +2182,15 @@ int lbs_reg_notifier(struct wiphy *wiphy
3530 struct regulatory_request *request)
3531 {
3532 struct lbs_private *priv = wiphy_priv(wiphy);
3533 - int ret;
3534 + int ret = 0;
3535
3536 lbs_deb_enter_args(LBS_DEB_CFG80211, "cfg80211 regulatory domain "
3537 "callback for domain %c%c\n", request->alpha2[0],
3538 request->alpha2[1]);
3539
3540 - ret = lbs_set_11d_domain_info(priv, request, wiphy->bands);
3541 + memcpy(priv->country_code, request->alpha2, sizeof(request->alpha2));
3542 + if (lbs_iface_active(priv))
3543 + ret = lbs_set_11d_domain_info(priv);
3544
3545 lbs_deb_leave(LBS_DEB_CFG80211);
3546 return ret;
3547 --- a/drivers/net/wireless/libertas/cmd.c
3548 +++ b/drivers/net/wireless/libertas/cmd.c
3549 @@ -733,15 +733,13 @@ int lbs_get_rssi(struct lbs_private *pri
3550 * to the firmware
3551 *
3552 * @priv: pointer to &struct lbs_private
3553 - * @request: cfg80211 regulatory request structure
3554 - * @bands: the device's supported bands and channels
3555 *
3556 * returns: 0 on success, error code on failure
3557 */
3558 -int lbs_set_11d_domain_info(struct lbs_private *priv,
3559 - struct regulatory_request *request,
3560 - struct ieee80211_supported_band **bands)
3561 +int lbs_set_11d_domain_info(struct lbs_private *priv)
3562 {
3563 + struct wiphy *wiphy = priv->wdev->wiphy;
3564 + struct ieee80211_supported_band **bands = wiphy->bands;
3565 struct cmd_ds_802_11d_domain_info cmd;
3566 struct mrvl_ie_domain_param_set *domain = &cmd.domain;
3567 struct ieee80211_country_ie_triplet *t;
3568 @@ -752,21 +750,23 @@ int lbs_set_11d_domain_info(struct lbs_p
3569 u8 first_channel = 0, next_chan = 0, max_pwr = 0;
3570 u8 i, flag = 0;
3571 size_t triplet_size;
3572 - int ret;
3573 + int ret = 0;
3574
3575 lbs_deb_enter(LBS_DEB_11D);
3576 + if (!priv->country_code[0])
3577 + goto out;
3578
3579 memset(&cmd, 0, sizeof(cmd));
3580 cmd.action = cpu_to_le16(CMD_ACT_SET);
3581
3582 lbs_deb_11d("Setting country code '%c%c'\n",
3583 - request->alpha2[0], request->alpha2[1]);
3584 + priv->country_code[0], priv->country_code[1]);
3585
3586 domain->header.type = cpu_to_le16(TLV_TYPE_DOMAIN);
3587
3588 /* Set country code */
3589 - domain->country_code[0] = request->alpha2[0];
3590 - domain->country_code[1] = request->alpha2[1];
3591 + domain->country_code[0] = priv->country_code[0];
3592 + domain->country_code[1] = priv->country_code[1];
3593 domain->country_code[2] = ' ';
3594
3595 /* Now set up the channel triplets; firmware is somewhat picky here
3596 @@ -848,6 +848,7 @@ int lbs_set_11d_domain_info(struct lbs_p
3597
3598 ret = lbs_cmd_with_response(priv, CMD_802_11D_DOMAIN_INFO, &cmd);
3599
3600 +out:
3601 lbs_deb_leave_args(LBS_DEB_11D, "ret %d", ret);
3602 return ret;
3603 }
3604 @@ -1019,9 +1020,9 @@ static void lbs_submit_command(struct lb
3605 if (ret) {
3606 netdev_info(priv->dev, "DNLD_CMD: hw_host_to_card failed: %d\n",
3607 ret);
3608 - /* Let the timer kick in and retry, and potentially reset
3609 - the whole thing if the condition persists */
3610 - timeo = HZ/4;
3611 + /* Reset dnld state machine, report failure */
3612 + priv->dnld_sent = DNLD_RES_RECEIVED;
3613 + lbs_complete_command(priv, cmdnode, ret);
3614 }
3615
3616 if (command == CMD_802_11_DEEP_SLEEP) {
3617 --- a/drivers/net/wireless/libertas/cmd.h
3618 +++ b/drivers/net/wireless/libertas/cmd.h
3619 @@ -128,9 +128,7 @@ int lbs_set_monitor_mode(struct lbs_priv
3620
3621 int lbs_get_rssi(struct lbs_private *priv, s8 *snr, s8 *nf);
3622
3623 -int lbs_set_11d_domain_info(struct lbs_private *priv,
3624 - struct regulatory_request *request,
3625 - struct ieee80211_supported_band **bands);
3626 +int lbs_set_11d_domain_info(struct lbs_private *priv);
3627
3628 int lbs_get_reg(struct lbs_private *priv, u16 reg, u16 offset, u32 *value);
3629
3630 --- a/drivers/net/wireless/libertas/dev.h
3631 +++ b/drivers/net/wireless/libertas/dev.h
3632 @@ -49,6 +49,7 @@ struct lbs_private {
3633 bool wiphy_registered;
3634 struct cfg80211_scan_request *scan_req;
3635 u8 assoc_bss[ETH_ALEN];
3636 + u8 country_code[IEEE80211_COUNTRY_STRING_LEN];
3637 u8 disassoc_reason;
3638
3639 /* Mesh */
3640 --- a/drivers/net/wireless/libertas/if_usb.c
3641 +++ b/drivers/net/wireless/libertas/if_usb.c
3642 @@ -311,7 +311,6 @@ static void if_usb_disconnect(struct usb
3643 cardp->surprise_removed = 1;
3644
3645 if (priv) {
3646 - priv->surpriseremoved = 1;
3647 lbs_stop_card(priv);
3648 lbs_remove_card(priv);
3649 }
3650 --- a/drivers/net/wireless/libertas/main.c
3651 +++ b/drivers/net/wireless/libertas/main.c
3652 @@ -154,6 +154,12 @@ int lbs_start_iface(struct lbs_private *
3653 goto err;
3654 }
3655
3656 + ret = lbs_set_11d_domain_info(priv);
3657 + if (ret) {
3658 + lbs_deb_net("set 11d domain info failed\n");
3659 + goto err;
3660 + }
3661 +
3662 lbs_update_channel(priv);
3663
3664 priv->iface_running = true;
3665 --- a/include/net/cfg80211.h
3666 +++ b/include/net/cfg80211.h
3667 @@ -1504,8 +1504,6 @@ struct cfg80211_gtk_rekey_data {
3668 * interfaces are active this callback should reject the configuration.
3669 * If no interfaces are active or the device is down, the channel should
3670 * be stored for when a monitor interface becomes active.
3671 - * @set_monitor_enabled: Notify driver that there are only monitor
3672 - * interfaces running.
3673 *
3674 * @scan: Request to do a scan. If returning zero, the scan request is given
3675 * the driver, and will be valid until passed to cfg80211_scan_done().
3676 @@ -1612,6 +1610,10 @@ struct cfg80211_gtk_rekey_data {
3677 * @get_et_strings: Ethtool API to get a set of strings to describe stats
3678 * and perhaps other supported types of ethtool data-sets.
3679 * See @ethtool_ops.get_strings
3680 + *
3681 + * @get_channel: Get the current operating channel for the virtual interface.
3682 + * For monitor interfaces, it should return %NULL unless there's a single
3683 + * current monitoring channel.
3684 */
3685 struct cfg80211_ops {
3686 int (*suspend)(struct wiphy *wiphy, struct cfg80211_wowlan *wow);
3687 @@ -1820,7 +1822,10 @@ struct cfg80211_ops {
3688 void (*get_et_strings)(struct wiphy *wiphy, struct net_device *dev,
3689 u32 sset, u8 *data);
3690
3691 - void (*set_monitor_enabled)(struct wiphy *wiphy, bool enabled);
3692 + struct ieee80211_channel *
3693 + (*get_channel)(struct wiphy *wiphy,
3694 + struct wireless_dev *wdev,
3695 + enum nl80211_channel_type *type);
3696 };
3697
3698 /*
3699 --- a/net/mac80211/agg-rx.c
3700 +++ b/net/mac80211/agg-rx.c
3701 @@ -203,6 +203,8 @@ static void ieee80211_send_addba_resp(st
3702 memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
3703 else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
3704 memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
3705 + else if (sdata->vif.type == NL80211_IFTYPE_WDS)
3706 + memcpy(mgmt->bssid, da, ETH_ALEN);
3707
3708 mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
3709 IEEE80211_STYPE_ACTION);
3710 --- a/net/mac80211/agg-tx.c
3711 +++ b/net/mac80211/agg-tx.c
3712 @@ -81,7 +81,8 @@ static void ieee80211_send_addba_request
3713 memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN);
3714 if (sdata->vif.type == NL80211_IFTYPE_AP ||
3715 sdata->vif.type == NL80211_IFTYPE_AP_VLAN ||
3716 - sdata->vif.type == NL80211_IFTYPE_MESH_POINT)
3717 + sdata->vif.type == NL80211_IFTYPE_MESH_POINT ||
3718 + sdata->vif.type == NL80211_IFTYPE_WDS)
3719 memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
3720 else if (sdata->vif.type == NL80211_IFTYPE_STATION)
3721 memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
3722 @@ -460,6 +461,7 @@ int ieee80211_start_tx_ba_session(struct
3723 sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
3724 sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
3725 sdata->vif.type != NL80211_IFTYPE_AP &&
3726 + sdata->vif.type != NL80211_IFTYPE_WDS &&
3727 sdata->vif.type != NL80211_IFTYPE_ADHOC)
3728 return -EINVAL;
3729
3730 --- a/net/mac80211/cfg.c
3731 +++ b/net/mac80211/cfg.c
3732 @@ -2982,14 +2982,14 @@ static int ieee80211_probe_client(struct
3733 return 0;
3734 }
3735
3736 -static void ieee80211_set_monitor_enabled(struct wiphy *wiphy, bool enabled)
3737 +static struct ieee80211_channel *
3738 +ieee80211_cfg_get_channel(struct wiphy *wiphy, struct wireless_dev *wdev,
3739 + enum nl80211_channel_type *type)
3740 {
3741 struct ieee80211_local *local = wiphy_priv(wiphy);
3742
3743 - if (enabled)
3744 - WARN_ON(ieee80211_add_virtual_monitor(local));
3745 - else
3746 - ieee80211_del_virtual_monitor(local);
3747 + *type = local->_oper_channel_type;
3748 + return local->oper_channel;
3749 }
3750
3751 #ifdef CONFIG_PM
3752 @@ -3066,11 +3066,11 @@ struct cfg80211_ops mac80211_config_ops
3753 .tdls_mgmt = ieee80211_tdls_mgmt,
3754 .probe_client = ieee80211_probe_client,
3755 .set_noack_map = ieee80211_set_noack_map,
3756 - .set_monitor_enabled = ieee80211_set_monitor_enabled,
3757 #ifdef CONFIG_PM
3758 .set_wakeup = ieee80211_set_wakeup,
3759 #endif
3760 .get_et_sset_count = ieee80211_get_et_sset_count,
3761 .get_et_stats = ieee80211_get_et_stats,
3762 .get_et_strings = ieee80211_get_et_strings,
3763 + .get_channel = ieee80211_cfg_get_channel,
3764 };
3765 --- a/net/mac80211/debugfs_sta.c
3766 +++ b/net/mac80211/debugfs_sta.c
3767 @@ -63,11 +63,11 @@ static ssize_t sta_flags_read(struct fil
3768 test_sta_flag(sta, WLAN_STA_##flg) ? #flg "\n" : ""
3769
3770 int res = scnprintf(buf, sizeof(buf),
3771 - "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
3772 + "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
3773 TEST(AUTH), TEST(ASSOC), TEST(PS_STA),
3774 TEST(PS_DRIVER), TEST(AUTHORIZED),
3775 TEST(SHORT_PREAMBLE),
3776 - TEST(WME), TEST(WDS), TEST(CLEAR_PS_FILT),
3777 + TEST(WME), TEST(CLEAR_PS_FILT),
3778 TEST(MFP), TEST(BLOCK_BA), TEST(PSPOLL),
3779 TEST(UAPSD), TEST(SP), TEST(TDLS_PEER),
3780 TEST(TDLS_PEER_AUTH), TEST(4ADDR_EVENT),
3781 --- a/net/mac80211/ieee80211_i.h
3782 +++ b/net/mac80211/ieee80211_i.h
3783 @@ -1496,10 +1496,6 @@ int ieee80211_add_srates_ie(struct ieee8
3784 int ieee80211_add_ext_srates_ie(struct ieee80211_sub_if_data *sdata,
3785 struct sk_buff *skb, bool need_basic);
3786
3787 -/* virtual monitor */
3788 -int ieee80211_add_virtual_monitor(struct ieee80211_local *local);
3789 -void ieee80211_del_virtual_monitor(struct ieee80211_local *local);
3790 -
3791 /* channel management */
3792 enum ieee80211_chan_mode {
3793 CHAN_MODE_UNDEFINED,
3794 --- a/net/mac80211/iface.c
3795 +++ b/net/mac80211/iface.c
3796 @@ -331,7 +331,7 @@ static void ieee80211_set_default_queues
3797 sdata->vif.cab_queue = IEEE80211_INVAL_HW_QUEUE;
3798 }
3799
3800 -int ieee80211_add_virtual_monitor(struct ieee80211_local *local)
3801 +static int ieee80211_add_virtual_monitor(struct ieee80211_local *local)
3802 {
3803 struct ieee80211_sub_if_data *sdata;
3804 int ret = 0;
3805 @@ -377,7 +377,7 @@ int ieee80211_add_virtual_monitor(struct
3806 return ret;
3807 }
3808
3809 -void ieee80211_del_virtual_monitor(struct ieee80211_local *local)
3810 +static void ieee80211_del_virtual_monitor(struct ieee80211_local *local)
3811 {
3812 struct ieee80211_sub_if_data *sdata;
3813
3814 @@ -410,7 +410,6 @@ static int ieee80211_do_open(struct net_
3815 {
3816 struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
3817 struct ieee80211_local *local = sdata->local;
3818 - struct sta_info *sta;
3819 u32 changed = 0;
3820 int res;
3821 u32 hw_reconf_flags = 0;
3822 @@ -497,6 +496,12 @@ static int ieee80211_do_open(struct net_
3823 break;
3824 }
3825
3826 + if (local->monitors == 0 && local->open_count == 0) {
3827 + res = ieee80211_add_virtual_monitor(local);
3828 + if (res)
3829 + goto err_stop;
3830 + }
3831 +
3832 /* must be before the call to ieee80211_configure_filter */
3833 local->monitors++;
3834 if (local->monitors == 1) {
3835 @@ -511,6 +516,8 @@ static int ieee80211_do_open(struct net_
3836 break;
3837 default:
3838 if (coming_up) {
3839 + ieee80211_del_virtual_monitor(local);
3840 +
3841 res = drv_add_interface(local, sdata);
3842 if (res)
3843 goto err_stop;
3844 @@ -548,28 +555,6 @@ static int ieee80211_do_open(struct net_
3845
3846 set_bit(SDATA_STATE_RUNNING, &sdata->state);
3847
3848 - if (sdata->vif.type == NL80211_IFTYPE_WDS) {
3849 - /* Create STA entry for the WDS peer */
3850 - sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
3851 - GFP_KERNEL);
3852 - if (!sta) {
3853 - res = -ENOMEM;
3854 - goto err_del_interface;
3855 - }
3856 -
3857 - sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
3858 - sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
3859 - sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
3860 -
3861 - res = sta_info_insert(sta);
3862 - if (res) {
3863 - /* STA has been freed */
3864 - goto err_del_interface;
3865 - }
3866 -
3867 - rate_control_rate_init(sta);
3868 - }
3869 -
3870 /*
3871 * set_multicast_list will be invoked by the networking core
3872 * which will check whether any increments here were done in
3873 @@ -750,6 +735,7 @@ static void ieee80211_do_stop(struct iee
3874 if (local->monitors == 0) {
3875 local->hw.conf.flags &= ~IEEE80211_CONF_MONITOR;
3876 hw_reconf_flags |= IEEE80211_CONF_CHANGE_MONITOR;
3877 + ieee80211_del_virtual_monitor(local);
3878 }
3879
3880 ieee80211_adjust_monitor_flags(sdata, -1);
3881 @@ -823,6 +809,9 @@ static void ieee80211_do_stop(struct iee
3882 }
3883 }
3884 spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags);
3885 +
3886 + if (local->monitors == local->open_count && local->monitors > 0)
3887 + ieee80211_add_virtual_monitor(local);
3888 }
3889
3890 static int ieee80211_stop(struct net_device *dev)
3891 @@ -959,6 +948,72 @@ static void ieee80211_if_setup(struct ne
3892 dev->destructor = free_netdev;
3893 }
3894
3895 +static void ieee80211_wds_rx_queued_mgmt(struct ieee80211_sub_if_data *sdata,
3896 + struct sk_buff *skb)
3897 +{
3898 + struct ieee80211_local *local = sdata->local;
3899 + struct ieee80211_rx_status *rx_status;
3900 + struct ieee802_11_elems elems;
3901 + struct ieee80211_mgmt *mgmt;
3902 + struct sta_info *sta;
3903 + size_t baselen;
3904 + u32 rates = 0;
3905 + u16 stype;
3906 + bool new = false;
3907 + enum ieee80211_band band = local->hw.conf.channel->band;
3908 + struct ieee80211_supported_band *sband = local->hw.wiphy->bands[band];
3909 +
3910 + rx_status = IEEE80211_SKB_RXCB(skb);
3911 + mgmt = (struct ieee80211_mgmt *) skb->data;
3912 + stype = le16_to_cpu(mgmt->frame_control) & IEEE80211_FCTL_STYPE;
3913 +
3914 + if (stype != IEEE80211_STYPE_BEACON)
3915 + return;
3916 +
3917 + baselen = (u8 *) mgmt->u.probe_resp.variable - (u8 *) mgmt;
3918 + if (baselen > skb->len)
3919 + return;
3920 +
3921 + ieee802_11_parse_elems(mgmt->u.probe_resp.variable,
3922 + skb->len - baselen, &elems);
3923 +
3924 + rates = ieee80211_sta_get_rates(local, &elems, band, NULL);
3925 +
3926 + rcu_read_lock();
3927 +
3928 + sta = sta_info_get(sdata, sdata->u.wds.remote_addr);
3929 +
3930 + if (!sta) {
3931 + rcu_read_unlock();
3932 + sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
3933 + GFP_KERNEL);
3934 + if (!sta)
3935 + return;
3936 +
3937 + new = true;
3938 + }
3939 +
3940 + sta->last_rx = jiffies;
3941 + sta->sta.supp_rates[local->hw.conf.channel->band] = rates;
3942 +
3943 + if (elems.ht_cap_elem)
3944 + ieee80211_ht_cap_ie_to_sta_ht_cap(sdata, sband,
3945 + elems.ht_cap_elem, &sta->sta.ht_cap);
3946 +
3947 + if (elems.wmm_param)
3948 + set_sta_flag(sta, WLAN_STA_WME);
3949 +
3950 + if (new) {
3951 + sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
3952 + sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
3953 + sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
3954 + rate_control_rate_init(sta);
3955 + sta_info_insert_rcu(sta);
3956 + }
3957 +
3958 + rcu_read_unlock();
3959 +}
3960 +
3961 static void ieee80211_iface_work(struct work_struct *work)
3962 {
3963 struct ieee80211_sub_if_data *sdata =
3964 @@ -1063,6 +1118,9 @@ static void ieee80211_iface_work(struct
3965 break;
3966 ieee80211_mesh_rx_queued_mgmt(sdata, skb);
3967 break;
3968 + case NL80211_IFTYPE_WDS:
3969 + ieee80211_wds_rx_queued_mgmt(sdata, skb);
3970 + break;
3971 default:
3972 WARN(1, "frame for unexpected interface type");
3973 break;
3974 --- a/net/mac80211/offchannel.c
3975 +++ b/net/mac80211/offchannel.c
3976 @@ -324,6 +324,7 @@ void ieee80211_sw_roc_work(struct work_s
3977 container_of(work, struct ieee80211_roc_work, work.work);
3978 struct ieee80211_sub_if_data *sdata = roc->sdata;
3979 struct ieee80211_local *local = sdata->local;
3980 + bool started;
3981
3982 mutex_lock(&local->mtx);
3983
3984 @@ -366,9 +367,10 @@ void ieee80211_sw_roc_work(struct work_s
3985 /* finish this ROC */
3986 finish:
3987 list_del(&roc->list);
3988 + started = roc->started;
3989 ieee80211_roc_notify_destroy(roc);
3990
3991 - if (roc->started) {
3992 + if (started) {
3993 drv_flush(local, false);
3994
3995 local->tmp_channel = NULL;
3996 @@ -379,7 +381,7 @@ void ieee80211_sw_roc_work(struct work_s
3997
3998 ieee80211_recalc_idle(local);
3999
4000 - if (roc->started)
4001 + if (started)
4002 ieee80211_start_next_roc(local);
4003 }
4004
4005 --- a/net/mac80211/rx.c
4006 +++ b/net/mac80211/rx.c
4007 @@ -2239,6 +2239,7 @@ ieee80211_rx_h_action(struct ieee80211_r
4008 sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
4009 sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
4010 sdata->vif.type != NL80211_IFTYPE_AP &&
4011 + sdata->vif.type != NL80211_IFTYPE_WDS &&
4012 sdata->vif.type != NL80211_IFTYPE_ADHOC)
4013 break;
4014
4015 @@ -2456,14 +2457,15 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
4016
4017 if (!ieee80211_vif_is_mesh(&sdata->vif) &&
4018 sdata->vif.type != NL80211_IFTYPE_ADHOC &&
4019 - sdata->vif.type != NL80211_IFTYPE_STATION)
4020 + sdata->vif.type != NL80211_IFTYPE_STATION &&
4021 + sdata->vif.type != NL80211_IFTYPE_WDS)
4022 return RX_DROP_MONITOR;
4023
4024 switch (stype) {
4025 case cpu_to_le16(IEEE80211_STYPE_AUTH):
4026 case cpu_to_le16(IEEE80211_STYPE_BEACON):
4027 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
4028 - /* process for all: mesh, mlme, ibss */
4029 + /* process for all: mesh, mlme, ibss, wds */
4030 break;
4031 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
4032 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
4033 @@ -2788,10 +2790,16 @@ static int prepare_for_handlers(struct i
4034 }
4035 break;
4036 case NL80211_IFTYPE_WDS:
4037 - if (bssid || !ieee80211_is_data(hdr->frame_control))
4038 - return 0;
4039 if (!ether_addr_equal(sdata->u.wds.remote_addr, hdr->addr2))
4040 return 0;
4041 +
4042 + if (ieee80211_is_data(hdr->frame_control) ||
4043 + ieee80211_is_action(hdr->frame_control)) {
4044 + if (compare_ether_addr(sdata->vif.addr, hdr->addr1))
4045 + return 0;
4046 + } else if (!ieee80211_is_beacon(hdr->frame_control))
4047 + return 0;
4048 +
4049 break;
4050 default:
4051 /* should never get here */
4052 --- a/net/mac80211/sta_info.h
4053 +++ b/net/mac80211/sta_info.h
4054 @@ -32,7 +32,6 @@
4055 * @WLAN_STA_SHORT_PREAMBLE: Station is capable of receiving short-preamble
4056 * frames.
4057 * @WLAN_STA_WME: Station is a QoS-STA.
4058 - * @WLAN_STA_WDS: Station is one of our WDS peers.
4059 * @WLAN_STA_CLEAR_PS_FILT: Clear PS filter in hardware (using the
4060 * IEEE80211_TX_CTL_CLEAR_PS_FILT control flag) when the next
4061 * frame to this station is transmitted.
4062 @@ -64,7 +63,6 @@ enum ieee80211_sta_info_flags {
4063 WLAN_STA_AUTHORIZED,
4064 WLAN_STA_SHORT_PREAMBLE,
4065 WLAN_STA_WME,
4066 - WLAN_STA_WDS,
4067 WLAN_STA_CLEAR_PS_FILT,
4068 WLAN_STA_MFP,
4069 WLAN_STA_BLOCK_BA,
4070 --- a/net/wireless/chan.c
4071 +++ b/net/wireless/chan.c
4072 @@ -82,7 +82,6 @@ int cfg80211_set_monitor_channel(struct
4073 int freq, enum nl80211_channel_type chantype)
4074 {
4075 struct ieee80211_channel *chan;
4076 - int err;
4077
4078 if (!rdev->ops->set_monitor_channel)
4079 return -EOPNOTSUPP;
4080 @@ -93,13 +92,7 @@ int cfg80211_set_monitor_channel(struct
4081 if (!chan)
4082 return -EINVAL;
4083
4084 - err = rdev->ops->set_monitor_channel(&rdev->wiphy, chan, chantype);
4085 - if (!err) {
4086 - rdev->monitor_channel = chan;
4087 - rdev->monitor_channel_type = chantype;
4088 - }
4089 -
4090 - return err;
4091 + return rdev->ops->set_monitor_channel(&rdev->wiphy, chan, chantype);
4092 }
4093
4094 void
4095 @@ -134,9 +127,16 @@ cfg80211_get_chan_state(struct wireless_
4096 break;
4097 case NL80211_IFTYPE_AP:
4098 case NL80211_IFTYPE_P2P_GO:
4099 + if (wdev->beacon_interval) {
4100 + *chan = wdev->channel;
4101 + *chanmode = CHAN_MODE_SHARED;
4102 + }
4103 + return;
4104 case NL80211_IFTYPE_MESH_POINT:
4105 - *chan = wdev->channel;
4106 - *chanmode = CHAN_MODE_SHARED;
4107 + if (wdev->mesh_id_len) {
4108 + *chan = wdev->channel;
4109 + *chanmode = CHAN_MODE_SHARED;
4110 + }
4111 return;
4112 case NL80211_IFTYPE_MONITOR:
4113 case NL80211_IFTYPE_AP_VLAN:
4114 --- a/net/wireless/core.c
4115 +++ b/net/wireless/core.c
4116 @@ -747,60 +747,14 @@ static struct device_type wiphy_type = {
4117 };
4118 #endif
4119
4120 -static struct ieee80211_channel *
4121 -cfg80211_get_any_chan(struct cfg80211_registered_device *rdev)
4122 -{
4123 - struct ieee80211_supported_band *sband;
4124 - int i;
4125 -
4126 - for (i = 0; i < IEEE80211_NUM_BANDS; i++) {
4127 - sband = rdev->wiphy.bands[i];
4128 - if (sband && sband->n_channels > 0)
4129 - return &sband->channels[0];
4130 - }
4131 -
4132 - return NULL;
4133 -}
4134 -
4135 -static void cfg80211_init_mon_chan(struct cfg80211_registered_device *rdev)
4136 -{
4137 - struct ieee80211_channel *chan;
4138 -
4139 - chan = cfg80211_get_any_chan(rdev);
4140 - if (WARN_ON(!chan))
4141 - return;
4142 -
4143 - mutex_lock(&rdev->devlist_mtx);
4144 - WARN_ON(cfg80211_set_monitor_channel(rdev, chan->center_freq,
4145 - NL80211_CHAN_NO_HT));
4146 - mutex_unlock(&rdev->devlist_mtx);
4147 -}
4148 -
4149 void cfg80211_update_iface_num(struct cfg80211_registered_device *rdev,
4150 enum nl80211_iftype iftype, int num)
4151 {
4152 - bool has_monitors_only_old = cfg80211_has_monitors_only(rdev);
4153 - bool has_monitors_only_new;
4154 -
4155 ASSERT_RTNL();
4156
4157 rdev->num_running_ifaces += num;
4158 if (iftype == NL80211_IFTYPE_MONITOR)
4159 rdev->num_running_monitor_ifaces += num;
4160 -
4161 - has_monitors_only_new = cfg80211_has_monitors_only(rdev);
4162 - if (has_monitors_only_new != has_monitors_only_old) {
4163 - if (rdev->ops->set_monitor_enabled)
4164 - rdev->ops->set_monitor_enabled(&rdev->wiphy,
4165 - has_monitors_only_new);
4166 -
4167 - if (!has_monitors_only_new) {
4168 - rdev->monitor_channel = NULL;
4169 - rdev->monitor_channel_type = NL80211_CHAN_NO_HT;
4170 - } else {
4171 - cfg80211_init_mon_chan(rdev);
4172 - }
4173 - }
4174 }
4175
4176 static int cfg80211_netdev_notifier_call(struct notifier_block *nb,
4177 @@ -932,6 +886,7 @@ static int cfg80211_netdev_notifier_call
4178 mutex_unlock(&rdev->devlist_mtx);
4179 dev_put(dev);
4180 }
4181 + cfg80211_update_iface_num(rdev, wdev->iftype, 1);
4182 cfg80211_lock_rdev(rdev);
4183 mutex_lock(&rdev->devlist_mtx);
4184 wdev_lock(wdev);
4185 @@ -1026,7 +981,6 @@ static int cfg80211_netdev_notifier_call
4186 mutex_unlock(&rdev->devlist_mtx);
4187 if (ret)
4188 return notifier_from_errno(ret);
4189 - cfg80211_update_iface_num(rdev, wdev->iftype, 1);
4190 break;
4191 }
4192
4193 --- a/net/wireless/core.h
4194 +++ b/net/wireless/core.h
4195 @@ -61,9 +61,6 @@ struct cfg80211_registered_device {
4196 int num_running_ifaces;
4197 int num_running_monitor_ifaces;
4198
4199 - struct ieee80211_channel *monitor_channel;
4200 - enum nl80211_channel_type monitor_channel_type;
4201 -
4202 /* BSSes/scanning */
4203 spinlock_t bss_lock;
4204 struct list_head bss_list;
4205 --- a/net/wireless/nl80211.c
4206 +++ b/net/wireless/nl80211.c
4207 @@ -1759,11 +1759,17 @@ static int nl80211_send_iface(struct sk_
4208 (cfg80211_rdev_list_generation << 2)))
4209 goto nla_put_failure;
4210
4211 - if (rdev->monitor_channel) {
4212 - if (nla_put_u32(msg, NL80211_ATTR_WIPHY_FREQ,
4213 - rdev->monitor_channel->center_freq) ||
4214 - nla_put_u32(msg, NL80211_ATTR_WIPHY_CHANNEL_TYPE,
4215 - rdev->monitor_channel_type))
4216 + if (rdev->ops->get_channel) {
4217 + struct ieee80211_channel *chan;
4218 + enum nl80211_channel_type channel_type;
4219 +
4220 + chan = rdev->ops->get_channel(&rdev->wiphy, wdev,
4221 + &channel_type);
4222 + if (chan &&
4223 + (nla_put_u32(msg, NL80211_ATTR_WIPHY_FREQ,
4224 + chan->center_freq) ||
4225 + nla_put_u32(msg, NL80211_ATTR_WIPHY_CHANNEL_TYPE,
4226 + channel_type)))
4227 goto nla_put_failure;
4228 }
4229
4230 --- a/net/wireless/wext-compat.c
4231 +++ b/net/wireless/wext-compat.c
4232 @@ -827,6 +827,8 @@ static int cfg80211_wext_giwfreq(struct
4233 {
4234 struct wireless_dev *wdev = dev->ieee80211_ptr;
4235 struct cfg80211_registered_device *rdev = wiphy_to_dev(wdev->wiphy);
4236 + struct ieee80211_channel *chan;
4237 + enum nl80211_channel_type channel_type;
4238
4239 switch (wdev->iftype) {
4240 case NL80211_IFTYPE_STATION:
4241 @@ -834,10 +836,13 @@ static int cfg80211_wext_giwfreq(struct
4242 case NL80211_IFTYPE_ADHOC:
4243 return cfg80211_ibss_wext_giwfreq(dev, info, freq, extra);
4244 case NL80211_IFTYPE_MONITOR:
4245 - if (!rdev->monitor_channel)
4246 + if (!rdev->ops->get_channel)
4247 return -EINVAL;
4248
4249 - freq->m = rdev->monitor_channel->center_freq;
4250 + chan = rdev->ops->get_channel(wdev->wiphy, wdev, &channel_type);
4251 + if (!chan)
4252 + return -EINVAL;
4253 + freq->m = chan->center_freq;
4254 freq->e = 6;
4255 return 0;
4256 default:
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