package/mac80211/patches/545-ath9k-initialize-mode-registers-for-AR9330.patch

   1 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
   2 +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
   3 @@ -19,6 +19,8 @@
   4  #include "ar9003_2p2_initvals.h"
   5  #include "ar9485_initvals.h"
   6  #include "ar9340_initvals.h"
   7 +#include "ar9330_1p1_initvals.h"
   8 +#include "ar9330_1p2_initvals.h"
   9
  10  /* General hardware code for the AR9003 hadware family */
  11
  12 @@ -29,7 +31,113 @@
  13   */
  14  static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
  15  {
  16 -       if (AR_SREV_9340(ah)) {
  17 +       if (AR_SREV_9330_11(ah)) {
  18 +               /* mac */
  19 +               INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
  20 +               INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
  21 +                               ar9331_1p1_mac_core,
  22 +                               ARRAY_SIZE(ar9331_1p1_mac_core), 2);
  23 +               INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
  24 +                               ar9331_1p1_mac_postamble,
  25 +                               ARRAY_SIZE(ar9331_1p1_mac_postamble), 5);
  26 +
  27 +               /* bb */
  28 +               INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
  29 +               INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
  30 +                               ar9331_1p1_baseband_core,
  31 +                               ARRAY_SIZE(ar9331_1p1_baseband_core), 2);
  32 +               INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
  33 +                               ar9331_1p1_baseband_postamble,
  34 +                               ARRAY_SIZE(ar9331_1p1_baseband_postamble), 5);
  35 +
  36 +               /* radio */
  37 +               INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
  38 +               INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
  39 +                               ar9331_1p1_radio_core,
  40 +                               ARRAY_SIZE(ar9331_1p1_radio_core), 2);
  41 +               INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
  42 +
  43 +               /* soc */
  44 +               INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
  45 +                               ar9331_1p1_soc_preamble,
  46 +                               ARRAY_SIZE(ar9331_1p1_soc_preamble), 2);
  47 +               INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
  48 +               INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
  49 +                               ar9331_1p1_soc_postamble,
  50 +                               ARRAY_SIZE(ar9331_1p1_soc_postamble), 2);
  51 +
  52 +               /* rx/tx gain */
  53 +               INIT_INI_ARRAY(&ah->iniModesRxGain,
  54 +                               ar9331_common_rx_gain_1p1,
  55 +                               ARRAY_SIZE(ar9331_common_rx_gain_1p1), 2);
  56 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
  57 +                       ar9331_modes_lowest_ob_db_tx_gain_1p1,
  58 +                       ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
  59 +                       5);
  60 +
  61 +               /* additional clock settings */
  62 +               if (ah->is_clk_25mhz)
  63 +                       INIT_INI_ARRAY(&ah->iniModesAdditional,
  64 +                                       ar9331_1p1_xtal_25M,
  65 +                                       ARRAY_SIZE(ar9331_1p1_xtal_25M), 2);
  66 +               else
  67 +                       INIT_INI_ARRAY(&ah->iniModesAdditional,
  68 +                                       ar9331_1p1_xtal_40M,
  69 +                                       ARRAY_SIZE(ar9331_1p1_xtal_40M), 2);
  70 +       } else if (AR_SREV_9330_12(ah)) {
  71 +               /* mac */
  72 +               INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
  73 +               INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
  74 +                               ar9331_1p2_mac_core,
  75 +                               ARRAY_SIZE(ar9331_1p2_mac_core), 2);
  76 +               INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
  77 +                               ar9331_1p2_mac_postamble,
  78 +                               ARRAY_SIZE(ar9331_1p2_mac_postamble), 5);
  79 +
  80 +               /* bb */
  81 +               INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
  82 +               INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
  83 +                               ar9331_1p2_baseband_core,
  84 +                               ARRAY_SIZE(ar9331_1p2_baseband_core), 2);
  85 +               INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
  86 +                               ar9331_1p2_baseband_postamble,
  87 +                               ARRAY_SIZE(ar9331_1p2_baseband_postamble), 5);
  88 +
  89 +               /* radio */
  90 +               INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
  91 +               INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
  92 +                               ar9331_1p2_radio_core,
  93 +                               ARRAY_SIZE(ar9331_1p2_radio_core), 2);
  94 +               INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
  95 +
  96 +               /* soc */
  97 +               INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
  98 +                               ar9331_1p2_soc_preamble,
  99 +                               ARRAY_SIZE(ar9331_1p2_soc_preamble), 2);
 100 +               INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
 101 +               INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
 102 +                               ar9331_1p2_soc_postamble,
 103 +                               ARRAY_SIZE(ar9331_1p2_soc_postamble), 2);
 104 +
 105 +               /* rx/tx gain */
 106 +               INIT_INI_ARRAY(&ah->iniModesRxGain,
 107 +                               ar9331_common_rx_gain_1p2,
 108 +                               ARRAY_SIZE(ar9331_common_rx_gain_1p2), 2);
 109 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
 110 +                       ar9331_modes_lowest_ob_db_tx_gain_1p2,
 111 +                       ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
 112 +                       5);
 113 +
 114 +               /* additional clock settings */
 115 +               if (ah->is_clk_25mhz)
 116 +                       INIT_INI_ARRAY(&ah->iniModesAdditional,
 117 +                                       ar9331_1p2_xtal_25M,
 118 +                                       ARRAY_SIZE(ar9331_1p2_xtal_25M), 2);
 119 +               else
 120 +                       INIT_INI_ARRAY(&ah->iniModesAdditional,
 121 +                                       ar9331_1p2_xtal_40M,
 122 +                                       ARRAY_SIZE(ar9331_1p2_xtal_40M), 2);
 123 +       } else if (AR_SREV_9340(ah)) {
 124                 /* mac */
 125                 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
 126                 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
 127 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
 128 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
 129 @@ -659,6 +659,9 @@ static int ar9003_hw_process_ini(struct
 130                 REG_WRITE_ARRAY(&ah->iniModesAdditional,
 131                                 modesIndex, regWrites);
 132
 133 +       if (AR_SREV_9300(ah))
 134 +               REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites);
 135 +
 136         if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
 137                 REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
 138