package/mac80211/patches/550-ath9k_cleanup_regwrite_buffer.patch

   1 --- a/drivers/net/wireless/ath/ath.h
   2 +++ b/drivers/net/wireless/ath/ath.h
   3 @@ -102,14 +102,12 @@ enum ath_cipher {
   4   * @read: Register read
   5   * @write: Register write
   6   * @enable_write_buffer: Enable multiple register writes
   7 - * @disable_write_buffer: Disable multiple register writes
   8 - * @write_flush: Flush buffered register writes
   9 + * @write_flush: flush buffered register writes and disable buffering
  10   */
  11  struct ath_ops {
  12         unsigned int (*read)(void *, u32 reg_offset);
  13         void (*write)(void *, u32 val, u32 reg_offset);
  14         void (*enable_write_buffer)(void *);
  15 -       void (*disable_write_buffer)(void *);
  16         void (*write_flush) (void *);
  17  };
  18
  19 --- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c
  20 +++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
  21 @@ -380,15 +380,6 @@ static void ath9k_enable_regwrite_buffer
  22         atomic_inc(&priv->wmi->mwrite_cnt);
  23  }
  24
  25 -static void ath9k_disable_regwrite_buffer(void *hw_priv)
  26 -{
  27 -       struct ath_hw *ah = (struct ath_hw *) hw_priv;
  28 -       struct ath_common *common = ath9k_hw_common(ah);
  29 -       struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  30 -
  31 -       atomic_dec(&priv->wmi->mwrite_cnt);
  32 -}
  33 -
  34  static void ath9k_regwrite_flush(void *hw_priv)
  35  {
  36         struct ath_hw *ah = (struct ath_hw *) hw_priv;
  37 @@ -397,6 +388,9 @@ static void ath9k_regwrite_flush(void *h
  38         u32 rsp_status;
  39         int r;
  40
  41 +       if (!atomic_dec_and_test(&priv->wmi->mwrite_cnt))
  42 +               return;
  43 +
  44         mutex_lock(&priv->wmi->multi_write_mutex);
  45
  46         if (priv->wmi->multi_write_idx) {
  47 @@ -420,7 +414,6 @@ static const struct ath_ops ath9k_common
  48         .read = ath9k_regread,
  49         .write = ath9k_regwrite,
  50         .enable_write_buffer = ath9k_enable_regwrite_buffer,
  51 -       .disable_write_buffer = ath9k_disable_regwrite_buffer,
  52         .write_flush = ath9k_regwrite_flush,
  53  };
  54
  55 --- a/drivers/net/wireless/ath/ath9k/hw.h
  56 +++ b/drivers/net/wireless/ath/ath9k/hw.h
  57 @@ -70,19 +70,13 @@
  58
  59  #define ENABLE_REGWRITE_BUFFER(_ah)                                    \
  60         do {                                                            \
  61 -               if (AR_SREV_9271(_ah))                                  \
  62 +               if (ath9k_hw_common(_ah)->ops->enable_write_buffer)     \
  63                         ath9k_hw_common(_ah)->ops->enable_write_buffer((_ah)); \
  64         } while (0)
  65
  66 -#define DISABLE_REGWRITE_BUFFER(_ah)                                   \
  67 -       do {                                                            \
  68 -               if (AR_SREV_9271(_ah))                                  \
  69 -                       ath9k_hw_common(_ah)->ops->disable_write_buffer((_ah)); \
  70 -       } while (0)
  71 -
  72  #define REGWRITE_BUFFER_FLUSH(_ah)                                     \
  73         do {                                                            \
  74 -               if (AR_SREV_9271(_ah))                                  \
  75 +               if (ath9k_hw_common(_ah)->ops->write_flush)             \
  76                         ath9k_hw_common(_ah)->ops->write_flush((_ah));  \
  77         } while (0)
  78
  79 --- a/drivers/net/wireless/ath/ath9k/ani.c
  80 +++ b/drivers/net/wireless/ath/ath9k/ani.c
  81 @@ -180,7 +180,6 @@ static void ath9k_ani_restart_old(struct
  82         REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
  83
  84         REGWRITE_BUFFER_FLUSH(ah);
  85 -       DISABLE_REGWRITE_BUFFER(ah);
  86
  87         ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
  88
  89 @@ -215,7 +214,6 @@ static void ath9k_ani_restart_new(struct
  90         REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
  91
  92         REGWRITE_BUFFER_FLUSH(ah);
  93 -       DISABLE_REGWRITE_BUFFER(ah);
  94
  95         ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
  96
  97 @@ -643,7 +641,6 @@ static void ath9k_ani_reset_old(struct a
  98         REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
  99
 100         REGWRITE_BUFFER_FLUSH(ah);
 101 -       DISABLE_REGWRITE_BUFFER(ah);
 102  }
 103
 104  /*
 105 @@ -737,7 +734,6 @@ static void ath9k_ani_reset_new(struct a
 106         REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
 107
 108         REGWRITE_BUFFER_FLUSH(ah);
 109 -       DISABLE_REGWRITE_BUFFER(ah);
 110  }
 111
 112  static void ath9k_hw_ani_monitor_old(struct ath_hw *ah,
 113 @@ -991,7 +987,6 @@ void ath9k_enable_mib_counters(struct at
 114         REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
 115
 116         REGWRITE_BUFFER_FLUSH(ah);
 117 -       DISABLE_REGWRITE_BUFFER(ah);
 118  }
 119
 120  /* Freeze the MIB counters, get the stats and then clear them */
 121 @@ -1261,7 +1256,6 @@ void ath9k_hw_ani_init(struct ath_hw *ah
 122         REG_WRITE(ah, AR_PHY_ERR_2, ah->ani[0].cckPhyErrBase);
 123
 124         REGWRITE_BUFFER_FLUSH(ah);
 125 -       DISABLE_REGWRITE_BUFFER(ah);
 126
 127         ath9k_enable_mib_counters(ah);
 128
 129 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
 130 +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
 131 @@ -615,14 +615,11 @@ static void ar5008_hw_init_chain_masks(s
 132         rx_chainmask = ah->rxchainmask;
 133         tx_chainmask = ah->txchainmask;
 134
 135 -       ENABLE_REGWRITE_BUFFER(ah);
 136
 137         switch (rx_chainmask) {
 138         case 0x5:
 139 -               DISABLE_REGWRITE_BUFFER(ah);
 140                 REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
 141                             AR_PHY_SWAP_ALT_CHAIN);
 142 -               ENABLE_REGWRITE_BUFFER(ah);
 143         case 0x3:
 144                 if (ah->hw_version.macVersion == AR_SREV_REVISION_5416_10) {
 145                         REG_WRITE(ah, AR_PHY_RX_CHAINMASK, 0x7);
 146 @@ -632,17 +629,18 @@ static void ar5008_hw_init_chain_masks(s
 147         case 0x1:
 148         case 0x2:
 149         case 0x7:
 150 +               ENABLE_REGWRITE_BUFFER(ah);
 151                 REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx_chainmask);
 152                 REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx_chainmask);
 153                 break;
 154         default:
 155 +               ENABLE_REGWRITE_BUFFER(ah);
 156                 break;
 157         }
 158
 159         REG_WRITE(ah, AR_SELFGEN_MASK, tx_chainmask);
 160
 161         REGWRITE_BUFFER_FLUSH(ah);
 162 -       DISABLE_REGWRITE_BUFFER(ah);
 163
 164         if (tx_chainmask == 0x5) {
 165                 REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
 166 @@ -728,7 +726,6 @@ static void ar5008_hw_set_channel_regs(s
 167         REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S);
 168
 169         REGWRITE_BUFFER_FLUSH(ah);
 170 -       DISABLE_REGWRITE_BUFFER(ah);
 171  }
 172
 173
 174 @@ -820,7 +817,6 @@ static int ar5008_hw_process_ini(struct
 175         }
 176
 177         REGWRITE_BUFFER_FLUSH(ah);
 178 -       DISABLE_REGWRITE_BUFFER(ah);
 179
 180         if (AR_SREV_9280(ah) || AR_SREV_9287_11_OR_LATER(ah))
 181                 REG_WRITE_ARRAY(&ah->iniModesRxGain, modesIndex, regWrites);
 182 @@ -851,7 +847,6 @@ static int ar5008_hw_process_ini(struct
 183         }
 184
 185         REGWRITE_BUFFER_FLUSH(ah);
 186 -       DISABLE_REGWRITE_BUFFER(ah);
 187
 188         if (AR_SREV_9271(ah)) {
 189                 if (ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE) == 1)
 190 --- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
 191 +++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
 192 @@ -522,7 +522,6 @@ static void ar9271_hw_pa_cal(struct ath_
 193                 REG_WRITE(ah, regList[i][0], regList[i][1]);
 194
 195         REGWRITE_BUFFER_FLUSH(ah);
 196 -       DISABLE_REGWRITE_BUFFER(ah);
 197  }
 198
 199  static inline void ar9285_hw_pa_cal(struct ath_hw *ah, bool is_reset)
 200 --- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
 201 +++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
 202 @@ -371,7 +371,6 @@ static void ar9002_hw_configpcipowersave
 203                         REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
 204
 205                         REGWRITE_BUFFER_FLUSH(ah);
 206 -                       DISABLE_REGWRITE_BUFFER(ah);
 207                 }
 208
 209                 udelay(1000);
 210 @@ -468,7 +467,6 @@ static int ar9002_hw_get_radiorev(struct
 211                 REG_WRITE(ah, AR_PHY(0x20), 0x00010000);
 212
 213         REGWRITE_BUFFER_FLUSH(ah);
 214 -       DISABLE_REGWRITE_BUFFER(ah);
 215
 216         val = (REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
 217         val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
 218 @@ -627,6 +625,4 @@ void ar9002_hw_load_ani_reg(struct ath_h
 219         }
 220
 221         REGWRITE_BUFFER_FLUSH(ah);
 222 -       DISABLE_REGWRITE_BUFFER(ah);
 223 -
 224  }
 225 --- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c
 226 +++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
 227 @@ -415,7 +415,6 @@ static void ar9002_hw_spur_mitigate(stru
 228         REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
 229
 230         REGWRITE_BUFFER_FLUSH(ah);
 231 -       DISABLE_REGWRITE_BUFFER(ah);
 232  }
 233
 234  static void ar9002_olc_init(struct ath_hw *ah)
 235 --- a/drivers/net/wireless/ath/ath9k/calib.c
 236 +++ b/drivers/net/wireless/ath/ath9k/calib.c
 237 @@ -300,7 +300,6 @@ void ath9k_hw_loadnf(struct ath_hw *ah,
 238                 }
 239         }
 240         REGWRITE_BUFFER_FLUSH(ah);
 241 -       DISABLE_REGWRITE_BUFFER(ah);
 242  }
 243
 244
 245 --- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
 246 +++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
 247 @@ -500,7 +500,6 @@ static void ath9k_hw_set_4k_power_cal_ta
 248                         }
 249
 250                         REGWRITE_BUFFER_FLUSH(ah);
 251 -                       DISABLE_REGWRITE_BUFFER(ah);
 252                 }
 253         }
 254
 255 @@ -832,7 +831,6 @@ static void ath9k_hw_4k_set_txpower(stru
 256         }
 257
 258         REGWRITE_BUFFER_FLUSH(ah);
 259 -       DISABLE_REGWRITE_BUFFER(ah);
 260  }
 261
 262  static void ath9k_hw_4k_set_addac(struct ath_hw *ah,
 263 --- a/drivers/net/wireless/ath/ath9k/hw.c
 264 +++ b/drivers/net/wireless/ath/ath9k/hw.c
 265 @@ -302,7 +302,6 @@ static void ath9k_hw_disablepcie(struct
 266         REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
 267
 268         REGWRITE_BUFFER_FLUSH(ah);
 269 -       DISABLE_REGWRITE_BUFFER(ah);
 270  }
 271
 272  /* This should work for all families including legacy */
 273 @@ -688,7 +687,6 @@ static void ath9k_hw_init_qos(struct ath
 274         REG_WRITE(ah, AR_TXOP_12_15, 0xFFFFFFFF);
 275
 276         REGWRITE_BUFFER_FLUSH(ah);
 277 -       DISABLE_REGWRITE_BUFFER(ah);
 278  }
 279
 280  static void ath9k_hw_init_pll(struct ath_hw *ah,
 281 @@ -753,7 +751,6 @@ static void ath9k_hw_init_interrupt_mask
 282         }
 283
 284         REGWRITE_BUFFER_FLUSH(ah);
 285 -       DISABLE_REGWRITE_BUFFER(ah);
 286
 287         if (AR_SREV_9300_20_OR_LATER(ah)) {
 288                 REG_WRITE(ah, AR_INTR_PRIO_ASYNC_ENABLE, 0);
 289 @@ -897,7 +894,6 @@ static inline void ath9k_hw_set_dma(stru
 290         REG_WRITE(ah, AR_TXCFG, regval | AR_TXCFG_DMASZ_128B);
 291
 292         REGWRITE_BUFFER_FLUSH(ah);
 293 -       DISABLE_REGWRITE_BUFFER(ah);
 294
 295         /*
 296          * Restore TX Trigger Level to its pre-reset value.
 297 @@ -945,7 +941,6 @@ static inline void ath9k_hw_set_dma(stru
 298         }
 299
 300         REGWRITE_BUFFER_FLUSH(ah);
 301 -       DISABLE_REGWRITE_BUFFER(ah);
 302
 303         if (AR_SREV_9300_20_OR_LATER(ah))
 304                 ath9k_hw_reset_txstatus_ring(ah);
 305 @@ -1043,7 +1038,6 @@ static bool ath9k_hw_set_reset(struct at
 306         REG_WRITE(ah, AR_RTC_RC, rst_flags);
 307
 308         REGWRITE_BUFFER_FLUSH(ah);
 309 -       DISABLE_REGWRITE_BUFFER(ah);
 310
 311         udelay(50);
 312
 313 @@ -1082,7 +1076,6 @@ static bool ath9k_hw_set_reset_power_on(
 314         udelay(2);
 315
 316         REGWRITE_BUFFER_FLUSH(ah);
 317 -       DISABLE_REGWRITE_BUFFER(ah);
 318
 319         if (!AR_SREV_9300_20_OR_LATER(ah))
 320                 udelay(2);
 321 @@ -1386,7 +1379,6 @@ int ath9k_hw_reset(struct ath_hw *ah, st
 322         REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
 323
 324         REGWRITE_BUFFER_FLUSH(ah);
 325 -       DISABLE_REGWRITE_BUFFER(ah);
 326
 327         r = ath9k_hw_rf_set_freq(ah, chan);
 328         if (r)
 329 @@ -1398,7 +1390,6 @@ int ath9k_hw_reset(struct ath_hw *ah, st
 330                 REG_WRITE(ah, AR_DQCUMASK(i), 1 << i);
 331
 332         REGWRITE_BUFFER_FLUSH(ah);
 333 -       DISABLE_REGWRITE_BUFFER(ah);
 334
 335         ah->intr_txqs = 0;
 336         for (i = 0; i < ah->caps.total_queues; i++)
 337 @@ -1446,7 +1437,6 @@ int ath9k_hw_reset(struct ath_hw *ah, st
 338         REG_WRITE(ah, AR_CFG_LED, saveLedState | AR_CFG_SCLK_32KHZ);
 339
 340         REGWRITE_BUFFER_FLUSH(ah);
 341 -       DISABLE_REGWRITE_BUFFER(ah);
 342
 343         /*
 344          * For big endian systems turn on swapping for descriptors
 345 @@ -1696,7 +1686,6 @@ void ath9k_hw_beaconinit(struct ath_hw *
 346         REG_WRITE(ah, AR_NDP_PERIOD, TU_TO_USEC(beacon_period));
 347
 348         REGWRITE_BUFFER_FLUSH(ah);
 349 -       DISABLE_REGWRITE_BUFFER(ah);
 350
 351         beacon_period &= ~ATH9K_BEACON_ENA;
 352         if (beacon_period & ATH9K_BEACON_RESET_TSF) {
 353 @@ -1724,7 +1713,6 @@ void ath9k_hw_set_sta_beacon_timers(stru
 354                   TU_TO_USEC(bs->bs_intval & ATH9K_BEACON_PERIOD));
 355
 356         REGWRITE_BUFFER_FLUSH(ah);
 357 -       DISABLE_REGWRITE_BUFFER(ah);
 358
 359         REG_RMW_FIELD(ah, AR_RSSI_THR,
 360                       AR_RSSI_THR_BM_THR, bs->bs_bmissthreshold);
 361 @@ -1770,7 +1758,6 @@ void ath9k_hw_set_sta_beacon_timers(stru
 362         REG_WRITE(ah, AR_DTIM_PERIOD, TU_TO_USEC(dtimperiod));
 363
 364         REGWRITE_BUFFER_FLUSH(ah);
 365 -       DISABLE_REGWRITE_BUFFER(ah);
 366
 367         REG_SET_BIT(ah, AR_TIMER_MODE,
 368                     AR_TBTT_TIMER_EN | AR_TIM_TIMER_EN |
 369 @@ -2188,7 +2175,6 @@ void ath9k_hw_setrxfilter(struct ath_hw
 370                           REG_READ(ah, AR_RXCFG) & ~AR_RXCFG_ZLFDMA);
 371
 372         REGWRITE_BUFFER_FLUSH(ah);
 373 -       DISABLE_REGWRITE_BUFFER(ah);
 374  }
 375  EXPORT_SYMBOL(ath9k_hw_setrxfilter);
 376
 377 --- a/drivers/net/wireless/ath/ath9k/mac.c
 378 +++ b/drivers/net/wireless/ath/ath9k/mac.c
 379 @@ -40,7 +40,6 @@ static void ath9k_hw_set_txq_interrupts(
 380         REG_WRITE(ah, AR_IMR_S2, ah->imrs2_reg);
 381
 382         REGWRITE_BUFFER_FLUSH(ah);
 383 -       DISABLE_REGWRITE_BUFFER(ah);
 384  }
 385
 386  u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q)
 387 @@ -530,7 +529,6 @@ bool ath9k_hw_resettxqueue(struct ath_hw
 388         }
 389
 390         REGWRITE_BUFFER_FLUSH(ah);
 391 -       DISABLE_REGWRITE_BUFFER(ah);
 392
 393         if (qi->tqi_qflags & TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE) {
 394                 REG_WRITE(ah, AR_DMISC(q),
 395 @@ -553,7 +551,6 @@ bool ath9k_hw_resettxqueue(struct ath_hw
 396                           | AR_D_MISC_POST_FR_BKOFF_DIS);
 397
 398                 REGWRITE_BUFFER_FLUSH(ah);
 399 -               DISABLE_REGWRITE_BUFFER(ah);
 400
 401                 /*
 402                  * cwmin and cwmax should be 0 for beacon queue
 403 @@ -585,7 +582,6 @@ bool ath9k_hw_resettxqueue(struct ath_hw
 404                              AR_D_MISC_ARB_LOCKOUT_CNTRL_S));
 405
 406                 REGWRITE_BUFFER_FLUSH(ah);
 407 -               DISABLE_REGWRITE_BUFFER(ah);
 408
 409                 break;
 410         case ATH9K_TX_QUEUE_PSPOLL: