package/mac80211/patches/582-ath9k_merge_reset_functions.patch

   1 --- a/drivers/net/wireless/ath/ath9k/main.c
   2 +++ b/drivers/net/wireless/ath/ath9k/main.c
   3 @@ -212,83 +212,57 @@ static int ath_update_survey_stats(struc
   4         return ret;
   5  }
   6
   7 -/*
   8 - * Set/change channels.  If the channel is really being changed, it's done
   9 - * by reseting the chip.  To accomplish this we must first cleanup any pending
  10 - * DMA, then restart stuff.
  11 -*/
  12 -static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  13 -                   struct ath9k_channel *hchan)
  14 +static void __ath_cancel_work(struct ath_softc *sc)
  15  {
  16 -       struct ath_hw *ah = sc->sc_ah;
  17 -       struct ath_common *common = ath9k_hw_common(ah);
  18 -       struct ieee80211_conf *conf = &common->hw->conf;
  19 -       bool fastcc = true, stopped;
  20 -       struct ieee80211_channel *channel = hw->conf.channel;
  21 -       struct ath9k_hw_cal_data *caldata = NULL;
  22 -       int r;
  23 -
  24 -       if (sc->sc_flags & SC_OP_INVALID)
  25 -               return -EIO;
  26 -
  27 -       sc->hw_busy_count = 0;
  28 -
  29 -       del_timer_sync(&common->ani.timer);
  30         cancel_work_sync(&sc->paprd_work);
  31         cancel_work_sync(&sc->hw_check_work);
  32         cancel_delayed_work_sync(&sc->tx_complete_work);
  33         cancel_delayed_work_sync(&sc->hw_pll_work);
  34 +}
  35
  36 -       ath9k_ps_wakeup(sc);
  37 +static void ath_cancel_work(struct ath_softc *sc)
  38 +{
  39 +       __ath_cancel_work(sc);
  40 +       cancel_work_sync(&sc->hw_reset_work);
  41 +}
  42
  43 -       spin_lock_bh(&sc->sc_pcu_lock);
  44 +static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
  45 +{
  46 +       struct ath_hw *ah = sc->sc_ah;
  47 +       struct ath_common *common = ath9k_hw_common(ah);
  48 +       bool ret;
  49
  50 -       /*
  51 -        * This is only performed if the channel settings have
  52 -        * actually changed.
  53 -        *
  54 -        * To switch channels clear any pending DMA operations;
  55 -        * wait long enough for the RX fifo to drain, reset the
  56 -        * hardware at the new frequency, and then re-enable
  57 -        * the relevant bits of the h/w.
  58 -        */
  59 -       ath9k_hw_disable_interrupts(ah);
  60 -       stopped = ath_drain_all_txq(sc, false);
  61 +       ieee80211_stop_queues(sc->hw);
  62
  63 -       if (!ath_stoprecv(sc))
  64 -               stopped = false;
  65 +       sc->hw_busy_count = 0;
  66 +       del_timer_sync(&common->ani.timer);
  67
  68 -       if (!ath9k_hw_check_alive(ah))
  69 -               stopped = false;
  70 +       ath9k_hw_disable_interrupts(ah);
  71
  72 -       /* XXX: do not flush receive queue here. We don't want
  73 -        * to flush data frames already in queue because of
  74 -        * changing channel. */
  75 +       ret = ath_drain_all_txq(sc, retry_tx);
  76
  77 -       if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  78 -               fastcc = false;
  79 +       if (!ath_stoprecv(sc))
  80 +               ret = false;
  81
  82 -       if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  83 -               caldata = &sc->caldata;
  84 +       if (!flush) {
  85 +               if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  86 +                       ath_rx_tasklet(sc, 0, true);
  87 +               ath_rx_tasklet(sc, 0, false);
  88 +       } else {
  89 +               ath_flushrecv(sc);
  90 +       }
  91
  92 -       ath_dbg(common, ATH_DBG_CONFIG,
  93 -               "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  94 -               sc->sc_ah->curchan->channel,
  95 -               channel->center_freq, conf_is_ht40(conf),
  96 -               fastcc);
  97 +       return ret;
  98 +}
  99
 100 -       r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 101 -       if (r) {
 102 -               ath_err(common,
 103 -                       "Unable to reset channel (%u MHz), reset status %d\n",
 104 -                       channel->center_freq, r);
 105 -               goto ps_restore;
 106 -       }
 107 +static bool ath_complete_reset(struct ath_softc *sc, bool start)
 108 +{
 109 +       struct ath_hw *ah = sc->sc_ah;
 110 +       struct ath_common *common = ath9k_hw_common(ah);
 111
 112         if (ath_startrecv(sc) != 0) {
 113                 ath_err(common, "Unable to restart recv logic\n");
 114 -               r = -EIO;
 115 -               goto ps_restore;
 116 +               return false;
 117         }
 118
 119         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 120 @@ -296,21 +270,93 @@ static int ath_set_channel(struct ath_so
 121         ath9k_hw_set_interrupts(ah, ah->imask);
 122         ath9k_hw_enable_interrupts(ah);
 123
 124 -       if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 125 +       if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
 126                 if (sc->sc_flags & SC_OP_BEACONS)
 127                         ath_set_beacon(sc);
 128 +
 129                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 130                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 131                 if (!common->disable_ani)
 132                         ath_start_ani(common);
 133         }
 134
 135 - ps_restore:
 136 -       ieee80211_wake_queues(hw);
 137 +       ieee80211_wake_queues(sc->hw);
 138 +
 139 +       return true;
 140 +}
 141 +
 142 +static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
 143 +                             bool retry_tx)
 144 +{
 145 +       struct ath_hw *ah = sc->sc_ah;
 146 +       struct ath_common *common = ath9k_hw_common(ah);
 147 +       struct ath9k_hw_cal_data *caldata = NULL;
 148 +       bool fastcc = true;
 149 +       bool flush = false;
 150 +       int r;
 151 +
 152 +       __ath_cancel_work(sc);
 153 +
 154 +       spin_lock_bh(&sc->sc_pcu_lock);
 155
 156 +       if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
 157 +               fastcc = false;
 158 +               caldata = &sc->caldata;
 159 +       }
 160 +
 161 +       if (!hchan) {
 162 +               fastcc = false;
 163 +               flush = true;
 164 +               hchan = ah->curchan;
 165 +       }
 166 +
 167 +       if (fastcc && !ath9k_hw_check_alive(ah))
 168 +               fastcc = false;
 169 +
 170 +       if (!ath_prepare_reset(sc, retry_tx, flush))
 171 +               fastcc = false;
 172 +
 173 +       ath_dbg(common, ATH_DBG_CONFIG,
 174 +               "Reset to %u MHz, HT40: %d fastcc: %d\n",
 175 +               hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
 176 +                                                         CHANNEL_HT40PLUS)),
 177 +               fastcc);
 178 +
 179 +       r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 180 +       if (r) {
 181 +               ath_err(common,
 182 +                       "Unable to reset channel, reset status %d\n", r);
 183 +               goto out;
 184 +       }
 185 +
 186 +       if (!ath_complete_reset(sc, true))
 187 +               r = -EIO;
 188 +
 189 +out:
 190         spin_unlock_bh(&sc->sc_pcu_lock);
 191 +       return 0;
 192 +}
 193 +
 194 +
 195 +/*
 196 + * Set/change channels.  If the channel is really being changed, it's done
 197 + * by reseting the chip.  To accomplish this we must first cleanup any pending
 198 + * DMA, then restart stuff.
 199 +*/
 200 +static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 201 +                   struct ath9k_channel *hchan)
 202 +{
 203 +       int r;
 204 +
 205 +       if (sc->sc_flags & SC_OP_INVALID)
 206 +               return -EIO;
 207 +
 208 +       ath9k_ps_wakeup(sc);
 209 +
 210 +       r = ath_reset_internal(sc, hchan, false);
 211
 212         ath9k_ps_restore(sc);
 213 +
 214         return r;
 215  }
 216
 217 @@ -823,28 +869,13 @@ static void ath_radio_enable(struct ath_
 218                         channel->center_freq, r);
 219         }
 220
 221 -       ath9k_cmn_update_txpow(ah, sc->curtxpow,
 222 -                              sc->config.txpowlimit, &sc->curtxpow);
 223 -       if (ath_startrecv(sc) != 0) {
 224 -               ath_err(common, "Unable to restart recv logic\n");
 225 -               goto out;
 226 -       }
 227 -       if (sc->sc_flags & SC_OP_BEACONS)
 228 -               ath_set_beacon(sc);     /* restart beacons */
 229 -
 230 -       /* Re-Enable  interrupts */
 231 -       ath9k_hw_set_interrupts(ah, ah->imask);
 232 -       ath9k_hw_enable_interrupts(ah);
 233 +       ath_complete_reset(sc, true);
 234
 235         /* Enable LED */
 236         ath9k_hw_cfg_output(ah, ah->led_pin,
 237                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 238         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 239
 240 -       ieee80211_wake_queues(hw);
 241 -       ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
 242 -
 243 -out:
 244         spin_unlock_bh(&sc->sc_pcu_lock);
 245
 246         ath9k_ps_restore(sc);
 247 @@ -857,11 +888,10 @@ void ath_radio_disable(struct ath_softc
 248         int r;
 249
 250         ath9k_ps_wakeup(sc);
 251 -       cancel_delayed_work_sync(&sc->hw_pll_work);
 252
 253 -       spin_lock_bh(&sc->sc_pcu_lock);
 254 +       ath_cancel_work(sc);
 255
 256 -       ieee80211_stop_queues(hw);
 257 +       spin_lock_bh(&sc->sc_pcu_lock);
 258
 259         /*
 260          * Keep the LED on when the radio is disabled
 261 @@ -872,13 +902,7 @@ void ath_radio_disable(struct ath_softc
 262                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 263         }
 264
 265 -       /* Disable interrupts */
 266 -       ath9k_hw_disable_interrupts(ah);
 267 -
 268 -       ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 269 -
 270 -       ath_stoprecv(sc);               /* turn off frame recv */
 271 -       ath_flushrecv(sc);              /* flush recv queue */
 272 +       ath_prepare_reset(sc, false, true);
 273
 274         if (!ah->curchan)
 275                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
 276 @@ -900,48 +924,11 @@ void ath_radio_disable(struct ath_softc
 277
 278  static int ath_reset(struct ath_softc *sc, bool retry_tx)
 279  {
 280 -       struct ath_hw *ah = sc->sc_ah;
 281 -       struct ath_common *common = ath9k_hw_common(ah);
 282 -       struct ieee80211_hw *hw = sc->hw;
 283         int r;
 284
 285 -       sc->hw_busy_count = 0;
 286 -
 287 -       /* Stop ANI */
 288 -
 289 -       del_timer_sync(&common->ani.timer);
 290 -
 291         ath9k_ps_wakeup(sc);
 292
 293 -       ieee80211_stop_queues(hw);
 294 -
 295 -       ath9k_hw_disable_interrupts(ah);
 296 -       ath_drain_all_txq(sc, retry_tx);
 297 -
 298 -       ath_stoprecv(sc);
 299 -       ath_flushrecv(sc);
 300 -
 301 -       r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 302 -       if (r)
 303 -               ath_err(common,
 304 -                       "Unable to reset hardware; reset status %d\n", r);
 305 -
 306 -       if (ath_startrecv(sc) != 0)
 307 -               ath_err(common, "Unable to start recv logic\n");
 308 -
 309 -       /*
 310 -        * We may be doing a reset in response to a request
 311 -        * that changes the channel so update any state that
 312 -        * might change as a result.
 313 -        */
 314 -       ath9k_cmn_update_txpow(ah, sc->curtxpow,
 315 -                              sc->config.txpowlimit, &sc->curtxpow);
 316 -
 317 -       if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
 318 -               ath_set_beacon(sc);     /* restart beacons */
 319 -
 320 -       ath9k_hw_set_interrupts(ah, ah->imask);
 321 -       ath9k_hw_enable_interrupts(ah);
 322 +       r = ath_reset_internal(sc, NULL, retry_tx);
 323
 324         if (retry_tx) {
 325                 int i;
 326 @@ -954,12 +941,6 @@ static int ath_reset(struct ath_softc *s
 327                 }
 328         }
 329
 330 -       ieee80211_wake_queues(hw);
 331 -
 332 -       /* Start ANI */
 333 -       if (!common->disable_ani)
 334 -               ath_start_ani(common);
 335 -
 336         ath9k_ps_restore(sc);
 337
 338         return r;
 339 @@ -969,9 +950,7 @@ void ath_reset_work(struct work_struct *
 340  {
 341         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 342
 343 -       spin_lock_bh(&sc->sc_pcu_lock);
 344         ath_reset(sc, true);
 345 -       spin_unlock_bh(&sc->sc_pcu_lock);
 346  }
 347
 348  void ath_hw_check(struct work_struct *work)
 349 @@ -992,11 +971,8 @@ void ath_hw_check(struct work_struct *wo
 350         ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
 351                 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
 352         if (busy >= 99) {
 353 -               if (++sc->hw_busy_count >= 3) {
 354 -                       spin_lock_bh(&sc->sc_pcu_lock);
 355 -                       ath_reset(sc, true);
 356 -                       spin_unlock_bh(&sc->sc_pcu_lock);
 357 -               }
 358 +               if (++sc->hw_busy_count >= 3)
 359 +                       ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 360
 361         } else if (busy >= 0)
 362                 sc->hw_busy_count = 0;
 363 @@ -1016,9 +992,7 @@ static void ath_hw_pll_rx_hang_check(str
 364                         /* Rx is hung for more than 500ms. Reset it */
 365                         ath_dbg(common, ATH_DBG_RESET,
 366                                 "Possible RX hang, resetting");
 367 -                       spin_lock_bh(&sc->sc_pcu_lock);
 368 -                       ath_reset(sc, true);
 369 -                       spin_unlock_bh(&sc->sc_pcu_lock);
 370 +                       ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 371                         count = 0;
 372                 }
 373         } else
 374 @@ -1089,28 +1063,6 @@ static int ath9k_start(struct ieee80211_
 375                 goto mutex_unlock;
 376         }
 377
 378 -       /*
 379 -        * This is needed only to setup initial state
 380 -        * but it's best done after a reset.
 381 -        */
 382 -       ath9k_cmn_update_txpow(ah, sc->curtxpow,
 383 -                       sc->config.txpowlimit, &sc->curtxpow);
 384 -
 385 -       /*
 386 -        * Setup the hardware after reset:
 387 -        * The receive engine is set going.
 388 -        * Frame transmit is handled entirely
 389 -        * in the frame output path; there's nothing to do
 390 -        * here except setup the interrupt mask.
 391 -        */
 392 -       if (ath_startrecv(sc) != 0) {
 393 -               ath_err(common, "Unable to start recv logic\n");
 394 -               r = -EIO;
 395 -               spin_unlock_bh(&sc->sc_pcu_lock);
 396 -               goto mutex_unlock;
 397 -       }
 398 -       spin_unlock_bh(&sc->sc_pcu_lock);
 399 -
 400         /* Setup our intr mask. */
 401         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 402                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 403 @@ -1133,12 +1085,14 @@ static int ath9k_start(struct ieee80211_
 404
 405         /* Disable BMISS interrupt when we're not associated */
 406         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
 407 -       ath9k_hw_set_interrupts(ah, ah->imask);
 408 -       ath9k_hw_enable_interrupts(ah);
 409
 410 -       ieee80211_wake_queues(hw);
 411 +       if (!ath_complete_reset(sc, false)) {
 412 +               r = -EIO;
 413 +               spin_unlock_bh(&sc->sc_pcu_lock);
 414 +               goto mutex_unlock;
 415 +       }
 416
 417 -       ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 418 +       spin_unlock_bh(&sc->sc_pcu_lock);
 419
 420         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
 421             !ah->btcoex_hw.enabled) {
 422 @@ -1231,10 +1185,7 @@ static void ath9k_stop(struct ieee80211_
 423
 424         mutex_lock(&sc->mutex);
 425
 426 -       cancel_delayed_work_sync(&sc->tx_complete_work);
 427 -       cancel_delayed_work_sync(&sc->hw_pll_work);
 428 -       cancel_work_sync(&sc->paprd_work);
 429 -       cancel_work_sync(&sc->hw_check_work);
 430 +       ath_cancel_work(sc);
 431
 432         if (sc->sc_flags & SC_OP_INVALID) {
 433                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
 434 @@ -2351,9 +2302,11 @@ static void ath9k_flush(struct ieee80211
 435         ath9k_ps_wakeup(sc);
 436         spin_lock_bh(&sc->sc_pcu_lock);
 437         drain_txq = ath_drain_all_txq(sc, false);
 438 +       spin_unlock_bh(&sc->sc_pcu_lock);
 439 +
 440         if (!drain_txq)
 441                 ath_reset(sc, false);
 442 -       spin_unlock_bh(&sc->sc_pcu_lock);
 443 +
 444         ath9k_ps_restore(sc);
 445         ieee80211_wake_queues(hw);
 446