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[adm5120] fix reset function in USB driver
[openwrt/svn-archive/archive.git] / target / linux / adm5120-2.6 / files / drivers / usb / host / adm5120-hcd.c
1 /*
2 * HCD driver for ADM5120 SoC
3 *
4 * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
5 *
6 * Based on the ADMtek 2.4 driver
7 * (C) Copyright 2003 Junius Chen <juniusc@admtek.com.tw>
8 * Which again was based on the ohci and uhci drivers.
9 */
10
11 #include <linux/module.h>
12 #include <linux/delay.h>
13 #include <linux/debugfs.h>
14 #include <linux/seq_file.h>
15 #include <linux/errno.h>
16 #include <linux/init.h>
17 #include <linux/list.h>
18 #include <linux/usb.h>
19 #include <linux/platform_device.h>
20
21 #include <asm/bootinfo.h>
22 #include <asm/io.h>
23 #include <asm/irq.h>
24 #include <asm/system.h>
25 #include <asm/byteorder.h>
26 #include <asm/mach-adm5120/adm5120_info.h>
27
28 #include "../core/hcd.h"
29
30 MODULE_DESCRIPTION("ADM5120 USB Host Controller Driver");
31 MODULE_LICENSE("GPL");
32 MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)");
33
34 #define PFX "adm5120-hcd: "
35
36 #define ADMHCD_REG_CONTROL 0x00
37 #define ADMHCD_SW_RESET 0x00000008 /* Reset */
38 #define ADMHCD_DMAA 0x00000004 /* DMA arbitration control */
39 #define ADMHCD_SW_INTREQ 0x00000002 /* request software int */
40 #define ADMHCD_HOST_EN 0x00000001 /* Host enable */
41 #define ADMHCD_REG_INTSTATUS 0x04
42 #define ADMHCD_INT_ACT 0x80000000 /* Interrupt active */
43 #define ADMHCD_INT_FATAL 0x40000000 /* Fatal interrupt */
44 #define ADMHCD_INT_SW 0x20000000 /* software interrupt */
45 #define ADMHCD_INT_TD 0x00100000 /* TD completed */
46 #define ADMHCD_FNO 0x00000800 /* Frame number overaflow */
47 #define ADMHCD_SO 0x00000400 /* Scheduling overrun */
48 #define ADMHCD_INSMI 0x00000200 /* Root hub status change */
49 #define ADMHCD_BABI 0x00000100 /* Babble detected, host mode */
50 #define ADMHCD_RESI 0x00000020 /* Resume detected */
51 #define ADMHCD_SOFI 0x00000010 /* SOF transmitted/received, host mode */
52 #define ADMHCD_REG_INTENABLE 0x08
53 #define ADMHCD_INT_EN 0x80000000 /* Interrupt enable */
54 #define ADMHCD_INTMASK 0x00000001 /* Interrupt mask */
55 #define ADMHCD_REG_HOSTCONTROL 0x10
56 #define ADMHCD_DMA_EN 0x00000004 /* USB host DMA enable */
57 #define ADMHCD_STATE_MASK 0x00000003
58 #define ADMHCD_STATE_RST 0x00000000 /* bus state reset */
59 #define ADMHCD_STATE_RES 0x00000001 /* bus state resume */
60 #define ADMHCD_STATE_OP 0x00000002 /* bus state operational */
61 #define ADMHCD_STATE_SUS 0x00000003 /* bus state suspended */
62 #define ADMHCD_REG_FMINTERVAL 0x18
63 #define ADMHCD_REG_FMNUMBER 0x1c
64 #define ADMHCD_REG_LSTHRESH 0x70
65 #define ADMHCD_REG_RHDESCR 0x74
66 #define ADMHCD_CRWE 0x20000000 /* Clear wakeup enable */
67 #define ADMHCD_DRWE 0x10000000 /* Device remote wakeup enable */
68 #define ADMHCD_HW_OCIC 0x08000000 /* Over current indication change */
69 #define ADMHCD_LPSC 0x04000000 /* Local power switch change */
70 #define ADMHCD_OCI 0x02000000 /* Over current indication */
71 #define ADMHCD_LPS 0x01000000 /* Local power switch/global power switch */
72 #define ADMHCD_NOCP 0x00000800 /* No over current protect mode */
73 #define ADMHCD_OPCM 0x00000400 /* Over current protect mode */
74 #define ADMHCD_NPS 0x00000200 /* No Power Switch */
75 #define ADMHCD_PSM 0x00000100 /* Power switch mode */
76 #define ADMHCD_REG_PORTSTATUS0 0x78
77 #define ADMHCD_CCS 0x00000001 /* current connect status */
78 #define ADMHCD_PES 0x00000002 /* port enable status */
79 #define ADMHCD_PSS 0x00000004 /* port suspend status */
80 #define ADMHCD_POCI 0x00000008 /* port overcurrent indicator */
81 #define ADMHCD_PRS 0x00000010 /* port reset status */
82 #define ADMHCD_PPS 0x00000100 /* port power status */
83 #define ADMHCD_LSDA 0x00000200 /* low speed device attached */
84 #define ADMHCD_CSC 0x00010000 /* connect status change */
85 #define ADMHCD_PESC 0x00020000 /* enable status change */
86 #define ADMHCD_PSSC 0x00040000 /* suspend status change */
87 #define ADMHCD_OCIC 0x00080000 /* overcurrent change*/
88 #define ADMHCD_PRSC 0x00100000 /* reset status change */
89 #define ADMHCD_REG_PORTSTATUS1 0x7c
90 #define ADMHCD_REG_HOSTHEAD 0x80
91
92
93 #define ADMHCD_NUMPORTS 2
94
95 struct admhcd_ed {
96 /* Don't change first four, they used for DMA */
97 u32 control;
98 struct admhcd_td *tail;
99 struct admhcd_td *head;
100 struct admhcd_ed *next;
101 /* the rest is for the driver only: */
102 struct admhcd_td *cur;
103 struct usb_host_endpoint *ep;
104 struct urb *urb;
105 struct admhcd_ed *real;
106 } __attribute__ ((packed));
107
108 #define ADMHCD_ED_EPSHIFT 7 /* Shift for endpoint number */
109 #define ADMHCD_ED_INT 0x00000800 /* Is this an int endpoint */
110 #define ADMHCD_ED_SPEED 0x00002000 /* Is it a high speed dev? */
111 #define ADMHCD_ED_SKIP 0x00004000 /* Skip this ED */
112 #define ADMHCD_ED_FORMAT 0x00008000 /* Is this an isoc endpoint */
113 #define ADMHCD_ED_MAXSHIFT 16 /* Shift for max packet size */
114
115 struct admhcd_td {
116 /* Don't change first four, they are used for DMA */
117 u32 control;
118 u32 buffer;
119 u32 buflen;
120 struct admhcd_td *next;
121 /* the rest is for the driver only: */
122 struct urb *urb;
123 struct admhcd_td *real;
124 } __attribute__ ((packed));
125
126 #define ADMHCD_TD_OWN 0x80000000
127 #define ADMHCD_TD_TOGGLE 0x00000000
128 #define ADMHCD_TD_DATA0 0x01000000
129 #define ADMHCD_TD_DATA1 0x01800000
130 #define ADMHCD_TD_OUT 0x00200000
131 #define ADMHCD_TD_IN 0x00400000
132 #define ADMHCD_TD_SETUP 0x00000000
133 #define ADMHCD_TD_ISO 0x00010000
134 #define ADMHCD_TD_R 0x00040000
135 #define ADMHCD_TD_INTEN 0x00010000
136
137 static int admhcd_td_err[16] = {
138 0, /* No */
139 -EREMOTEIO, /* CRC */
140 -EREMOTEIO, /* bit stuff */
141 -EREMOTEIO, /* data toggle */
142 -EPIPE, /* stall */
143 -ETIMEDOUT, /* timeout */
144 -EPROTO, /* pid err */
145 -EPROTO, /* unexpected pid */
146 -EREMOTEIO, /* data overrun */
147 -EREMOTEIO, /* data underrun */
148 -ETIMEDOUT, /* 1010 */
149 -ETIMEDOUT, /* 1011 */
150 -EREMOTEIO, /* buffer overrun */
151 -EREMOTEIO, /* buffer underrun */
152 -ETIMEDOUT, /* 1110 */
153 -ETIMEDOUT, /* 1111 */
154 };
155
156 #define ADMHCD_TD_ERRMASK 0x38000000
157 #define ADMHCD_TD_ERRSHIFT 27
158
159 #define TD(td) ((struct admhcd_td *)(((u32)(td)) & ~0xf))
160 #define ED(ed) ((struct admhcd_ed *)(((u32)(ed)) & ~0xf))
161
162 struct admhcd {
163 spinlock_t lock;
164
165 void __iomem *data_reg;
166 /* Root hub registers */
167 u32 rhdesca;
168 u32 rhdescb;
169 u32 rhstatus;
170 u32 rhport[2];
171
172 /* async schedule: control, bulk */
173 struct list_head async;
174 u32 base;
175 u32 dma_en;
176 unsigned long flags;
177
178 };
179
180 static inline struct admhcd *hcd_to_admhcd(struct usb_hcd *hcd)
181 {
182 return (struct admhcd *)(hcd->hcd_priv);
183 }
184
185 static inline struct usb_hcd *admhcd_to_hcd(struct admhcd *admhcd)
186 {
187 return container_of((void *)admhcd, struct usb_hcd, hcd_priv);
188 }
189
190 static char hcd_name[] = "adm5120-hcd";
191
192 static u32 admhcd_reg_get(struct admhcd *ahcd, int reg)
193 {
194 return *(volatile u32 *)KSEG1ADDR(ahcd->base+reg);
195 }
196
197 static void admhcd_reg_set(struct admhcd *ahcd, int reg, u32 val)
198 {
199 *(volatile u32 *)KSEG1ADDR(ahcd->base+reg) = val;
200 }
201
202 static void admhcd_lock(struct admhcd *ahcd)
203 {
204 spin_lock_irqsave(&ahcd->lock, ahcd->flags);
205 ahcd->dma_en = admhcd_reg_get(ahcd, ADMHCD_REG_HOSTCONTROL) &
206 ADMHCD_DMA_EN;
207 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
208 }
209
210 static void admhcd_unlock(struct admhcd *ahcd)
211 {
212 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL,
213 ADMHCD_STATE_OP | ahcd->dma_en);
214 spin_unlock_irqrestore(&ahcd->lock, ahcd->flags);
215 }
216
217 static struct admhcd_td *admhcd_td_alloc(struct admhcd_ed *ed, struct urb *urb)
218 {
219 struct admhcd_td *tdn, *td;
220
221 tdn = kmalloc(sizeof(struct admhcd_td), GFP_ATOMIC);
222 if (!tdn)
223 return NULL;
224 tdn->real = tdn;
225 tdn = (struct admhcd_td *)KSEG1ADDR(tdn);
226 memset(tdn, 0, sizeof(struct admhcd_td));
227 if (ed->cur == NULL) {
228 ed->cur = tdn;
229 ed->head = tdn;
230 ed->tail = tdn;
231 td = tdn;
232 } else {
233 /* Supply back the old tail and link in new td as tail */
234 td = TD(ed->tail);
235 TD(ed->tail)->next = tdn;
236 ed->tail = tdn;
237 }
238 td->urb = urb;
239
240 return td;
241 }
242
243 static void admhcd_td_free(struct admhcd_ed *ed, struct urb *urb)
244 {
245 struct admhcd_td *td, **tdp;
246
247 if (urb == NULL)
248 ed->control |= ADMHCD_ED_SKIP;
249 tdp = &ed->cur;
250 td = ed->cur;
251 do {
252 if (td->urb == urb)
253 break;
254 tdp = &td->next;
255 td = TD(td->next);
256 } while (td);
257 while (td && td->urb == urb) {
258 *tdp = TD(td->next);
259 kfree(td->real);
260 td = *tdp;
261 }
262 }
263
264 /* Find an endpoint's descriptor, if needed allocate a new one and link it
265 in the DMA chain
266 */
267 static struct admhcd_ed *admhcd_get_ed(struct admhcd *ahcd,
268 struct usb_host_endpoint *ep, struct urb *urb)
269 {
270 struct admhcd_ed *hosthead;
271 struct admhcd_ed *found = NULL, *ed = NULL;
272 unsigned int pipe = urb->pipe;
273
274 admhcd_lock(ahcd);
275 hosthead = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
276 if (hosthead) {
277 for (ed = hosthead;; ed = ED(ed->next)) {
278 if (ed->ep == ep) {
279 found = ed;
280 break;
281 }
282 if (ED(ed->next) == hosthead)
283 break;
284 }
285 }
286 if (!found) {
287 found = kmalloc(sizeof(struct admhcd_ed), GFP_ATOMIC);
288 if (!found)
289 goto out;
290 memset(found, 0, sizeof(struct admhcd_ed));
291 found->real = found;
292 found->ep = ep;
293 found = (struct admhcd_ed *)KSEG1ADDR(found);
294 found->control = usb_pipedevice(pipe) |
295 (usb_pipeendpoint(pipe) << ADMHCD_ED_EPSHIFT) |
296 (usb_pipeint(pipe) ? ADMHCD_ED_INT : 0) |
297 (urb->dev->speed == USB_SPEED_FULL ? ADMHCD_ED_SPEED : 0) |
298 (usb_pipeisoc(pipe) ? ADMHCD_ED_FORMAT : 0) |
299 (usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)) << ADMHCD_ED_MAXSHIFT);
300 /* Alloc first dummy td */
301 admhcd_td_alloc(found, NULL);
302 if (hosthead) {
303 found->next = hosthead;
304 ed->next = found;
305 } else {
306 found->next = found;
307 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)found);
308 }
309 }
310 out:
311 admhcd_unlock(ahcd);
312 return found;
313 }
314
315 static struct admhcd_td *admhcd_td_fill(u32 control, struct admhcd_td *td,
316 dma_addr_t data, int len)
317 {
318 td->buffer = data;
319 td->buflen = len;
320 td->control = control;
321 return TD(td->next);
322 }
323
324 static void admhcd_ed_start(struct admhcd *ahcd, struct admhcd_ed *ed)
325 {
326 struct admhcd_td *td = ed->cur;
327
328 if (ed->urb)
329 return;
330 if (td->urb) {
331 ed->urb = td->urb;
332 while (1) {
333 td->control |= ADMHCD_TD_OWN;
334 if (TD(td->next)->urb != td->urb) {
335 td->buflen |= ADMHCD_TD_INTEN;
336 break;
337 }
338 td = TD(td->next);
339 }
340 }
341 ed->head = TD(ed->head);
342 ahcd->dma_en |= ADMHCD_DMA_EN;
343 }
344
345 static irqreturn_t adm5120hcd_irq(struct usb_hcd *hcd)
346 {
347 struct admhcd *ahcd = hcd_to_admhcd(hcd);
348 u32 intstatus;
349
350 intstatus = admhcd_reg_get(ahcd, ADMHCD_REG_INTSTATUS);
351 if (intstatus & ADMHCD_INT_FATAL) {
352 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_FATAL);
353 //
354 }
355 if (intstatus & ADMHCD_INT_SW) {
356 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_SW);
357 //
358 }
359 if (intstatus & ADMHCD_INT_TD) {
360 struct admhcd_ed *ed, *head;
361
362 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_TD);
363
364 head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
365 ed = head;
366 if (ed) do {
367 /* Is it a finished TD? */
368 if (ed->urb && !(ed->cur->control & ADMHCD_TD_OWN)) {
369 struct admhcd_td *td;
370 int error;
371
372 td = ed->cur;
373 error = (td->control & ADMHCD_TD_ERRMASK) >>
374 ADMHCD_TD_ERRSHIFT;
375 ed->urb->status = admhcd_td_err[error];
376 admhcd_td_free(ed, ed->urb);
377 // Calculate real length!!!
378 ed->urb->actual_length = ed->urb->transfer_buffer_length;
379 ed->urb->hcpriv = NULL;
380 usb_hcd_giveback_urb(hcd, ed->urb);
381 ed->urb = NULL;
382 }
383 admhcd_ed_start(ahcd, ed);
384 ed = ED(ed->next);
385 } while (ed != head);
386 }
387
388 return IRQ_HANDLED;
389 }
390
391 static int admhcd_urb_enqueue(struct usb_hcd *hcd, struct usb_host_endpoint *ep,
392 struct urb *urb, gfp_t mem_flags)
393 {
394 struct admhcd *ahcd = hcd_to_admhcd(hcd);
395 struct admhcd_ed *ed;
396 struct admhcd_td *td;
397 int size = 0, i, zero = 0, ret = 0;
398 unsigned int pipe = urb->pipe, toggle = 0;
399 dma_addr_t data = (dma_addr_t)urb->transfer_buffer;
400 int data_len = urb->transfer_buffer_length;
401
402 ed = admhcd_get_ed(ahcd, ep, urb);
403 if (!ed)
404 return -ENOMEM;
405
406 switch(usb_pipetype(pipe)) {
407 case PIPE_CONTROL:
408 size = 2;
409 case PIPE_INTERRUPT:
410 case PIPE_BULK:
411 default:
412 size += urb->transfer_buffer_length / 4096;
413 if (urb->transfer_buffer_length % 4096)
414 size++;
415 if (size == 0)
416 size++;
417 else if (urb->transfer_flags & URB_ZERO_PACKET &&
418 !(urb->transfer_buffer_length %
419 usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)))) {
420 size++;
421 zero = 1;
422 }
423 break;
424 case PIPE_ISOCHRONOUS:
425 size = urb->number_of_packets;
426 break;
427 }
428
429 admhcd_lock(ahcd);
430 /* Remember the first td */
431 td = admhcd_td_alloc(ed, urb);
432 if (!td) {
433 ret = -ENOMEM;
434 goto out;
435 }
436 /* Allocate additionall tds first */
437 for (i = 1; i < size; i++) {
438 if (admhcd_td_alloc(ed, urb) == NULL) {
439 admhcd_td_free(ed, urb);
440 ret = -ENOMEM;
441 goto out;
442 }
443 }
444
445 if (usb_gettoggle(urb->dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)))
446 toggle = ADMHCD_TD_TOGGLE;
447 else {
448 toggle = ADMHCD_TD_DATA0;
449 usb_settoggle(urb->dev, usb_pipeendpoint(pipe),
450 usb_pipeout(pipe), 1);
451 }
452
453 switch(usb_pipetype(pipe)) {
454 case PIPE_CONTROL:
455 td = admhcd_td_fill(ADMHCD_TD_SETUP | ADMHCD_TD_DATA0,
456 td, (dma_addr_t)urb->setup_packet, 8);
457 while (data_len > 0) {
458 td = admhcd_td_fill(ADMHCD_TD_DATA1
459 | ADMHCD_TD_R |
460 (usb_pipeout(pipe) ?
461 ADMHCD_TD_OUT : ADMHCD_TD_IN), td,
462 data, data_len % 4097);
463 data_len -= 4096;
464 }
465 admhcd_td_fill(ADMHCD_TD_DATA1 | (usb_pipeout(pipe) ?
466 ADMHCD_TD_IN : ADMHCD_TD_OUT), td,
467 data, 0);
468 break;
469 case PIPE_INTERRUPT:
470 case PIPE_BULK:
471 //info ok for interrupt?
472 i = 0;
473 while(data_len > 4096) {
474 td = admhcd_td_fill((usb_pipeout(pipe) ?
475 ADMHCD_TD_OUT :
476 ADMHCD_TD_IN | ADMHCD_TD_R) |
477 (i ? ADMHCD_TD_TOGGLE : toggle), td,
478 data, 4096);
479 data += 4096;
480 data_len -= 4096;
481 i++;
482 }
483 td = admhcd_td_fill((usb_pipeout(pipe) ?
484 ADMHCD_TD_OUT : ADMHCD_TD_IN) |
485 (i ? ADMHCD_TD_TOGGLE : toggle), td, data, data_len);
486 i++;
487 if (zero)
488 admhcd_td_fill((usb_pipeout(pipe) ?
489 ADMHCD_TD_OUT : ADMHCD_TD_IN) |
490 (i ? ADMHCD_TD_TOGGLE : toggle), td, 0, 0);
491 break;
492 case PIPE_ISOCHRONOUS:
493 for (i = 0; i < urb->number_of_packets; i++) {
494 td = admhcd_td_fill(ADMHCD_TD_ISO |
495 ((urb->start_frame + i) & 0xffff), td,
496 data + urb->iso_frame_desc[i].offset,
497 urb->iso_frame_desc[i].length);
498 }
499 break;
500 }
501 urb->hcpriv = ed;
502 admhcd_ed_start(ahcd, ed);
503 out:
504 admhcd_unlock(ahcd);
505 return ret;
506 }
507
508 static int admhcd_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
509 {
510 struct admhcd *ahcd = hcd_to_admhcd(hcd);
511 struct admhcd_ed *ed;
512
513 admhcd_lock(ahcd);
514
515 ed = urb->hcpriv;
516 if (ed && ed->urb != urb)
517 admhcd_td_free(ed, urb);
518
519 admhcd_unlock(ahcd);
520 return 0;
521 }
522
523 static void admhcd_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
524 {
525 struct admhcd *ahcd = hcd_to_admhcd(hcd);
526 struct admhcd_ed *ed, *edt, *head;
527
528 admhcd_lock(ahcd);
529
530 head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
531 if (!head)
532 goto out;
533 for (ed = head; ED(ed->next) != head; ed = ED(ed->next))
534 if (ed->ep == ep)
535 break;
536 if (ed->ep != ep)
537 goto out;
538 while (ed->cur)
539 admhcd_td_free(ed, ed->cur->urb);
540 if (head == ed) {
541 if (ED(ed->next) == ed) {
542 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0);
543 ahcd->dma_en = 0;
544 goto out_free;
545 }
546 head = ED(ed->next);
547 for (edt = head; ED(edt->next) != head; edt = ED(edt->next));
548 edt->next = ED(ed->next);
549 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)ed->next);
550 goto out_free;
551 }
552 for (edt = head; edt->next != ed; edt = edt->next);
553 edt->next = ed->next;
554 out_free:
555 kfree(ed->real);
556 out:
557 admhcd_unlock(ahcd);
558 }
559
560 static int admhcd_get_frame_number(struct usb_hcd *hcd)
561 {
562 struct admhcd *ahcd = hcd_to_admhcd(hcd);
563
564 return admhcd_reg_get(ahcd, ADMHCD_REG_FMNUMBER) & 0x0000ffff;
565 }
566
567 static int admhcd_hub_status_data(struct usb_hcd *hcd, char *buf)
568 {
569 struct admhcd *ahcd = hcd_to_admhcd(hcd);
570 int port;
571
572 *buf = 0;
573 for (port = 0; port < ADMHCD_NUMPORTS; port++) {
574 if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4) &
575 (ADMHCD_CSC | ADMHCD_PESC | ADMHCD_PSSC | ADMHCD_OCIC |
576 ADMHCD_PRSC))
577 *buf |= (1 << (port + 1));
578 }
579 return !!*buf;
580 }
581
582 static __u8 root_hub_hub_des[] = {
583 0x09, /* __u8 bLength; */
584 0x29, /* __u8 bDescriptorType; Hub-descriptor */
585 0x02, /* __u8 bNbrPorts; */
586 0x0a, 0x00, /* __u16 wHubCharacteristics; */
587 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
588 0x00, /* __u8 bHubContrCurrent; 0mA */
589 0x00, /* __u8 DeviceRemovable; */
590 0xff, /* __u8 PortPwrCtrlMask; */
591 };
592
593 static int admhcd_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
594 u16 wIndex, char *buf, u16 wLength)
595 {
596 struct admhcd *ahcd = hcd_to_admhcd(hcd);
597 int retval = 0, len;
598 unsigned int port = wIndex -1;
599
600 switch (typeReq) {
601
602 case GetHubStatus:
603 *(__le32 *)buf = cpu_to_le32(0);
604 break;
605 case GetPortStatus:
606 if (port >= ADMHCD_NUMPORTS)
607 goto err;
608 *(__le32 *)buf = cpu_to_le32(
609 admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4));
610 break;
611 case SetHubFeature: /* We don't implement these */
612 case ClearHubFeature:
613 switch (wValue) {
614 case C_HUB_OVER_CURRENT:
615 case C_HUB_LOCAL_POWER:
616 break;
617 default:
618 goto err;
619 }
620 case SetPortFeature:
621 if (port >= ADMHCD_NUMPORTS)
622 goto err;
623
624 switch (wValue) {
625 case USB_PORT_FEAT_SUSPEND:
626 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
627 ADMHCD_PSS);
628 break;
629 case USB_PORT_FEAT_RESET:
630 if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4)
631 & ADMHCD_CCS) {
632 admhcd_reg_set(ahcd,
633 ADMHCD_REG_PORTSTATUS0 + port*4,
634 ADMHCD_PRS | ADMHCD_CSC);
635 mdelay(50);
636 admhcd_reg_set(ahcd,
637 ADMHCD_REG_PORTSTATUS0 + port*4,
638 ADMHCD_PES | ADMHCD_CSC);
639 }
640 break;
641 case USB_PORT_FEAT_POWER:
642 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
643 ADMHCD_PPS);
644 break;
645 default:
646 goto err;
647 }
648 break;
649 case ClearPortFeature:
650 if (port >= ADMHCD_NUMPORTS)
651 goto err;
652
653 switch (wValue) {
654 case USB_PORT_FEAT_ENABLE:
655 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
656 ADMHCD_CCS);
657 break;
658 case USB_PORT_FEAT_C_ENABLE:
659 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
660 ADMHCD_PESC);
661 break;
662 case USB_PORT_FEAT_SUSPEND:
663 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
664 ADMHCD_POCI);
665 break;
666 case USB_PORT_FEAT_C_SUSPEND:
667 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
668 ADMHCD_PSSC);
669 case USB_PORT_FEAT_POWER:
670 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
671 ADMHCD_LSDA);
672 break;
673 case USB_PORT_FEAT_C_CONNECTION:
674 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
675 ADMHCD_CSC);
676 break;
677 case USB_PORT_FEAT_C_OVER_CURRENT:
678 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
679 ADMHCD_OCIC);
680 break;
681 case USB_PORT_FEAT_C_RESET:
682 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
683 ADMHCD_PRSC);
684 break;
685 default:
686 goto err;
687 }
688 break;
689 case GetHubDescriptor:
690 len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
691 memcpy(buf, root_hub_hub_des, len);
692 break;
693 default:
694 err:
695 retval = -EPIPE;
696 }
697
698 return retval;
699 }
700
701 static int admhcd_start(struct usb_hcd *hcd)
702 {
703 struct admhcd *ahcd = hcd_to_admhcd(hcd);
704 unsigned long flags;
705
706 printk(KERN_DEBUG PFX "calling admhcd_start\n");
707
708 spin_lock_irqsave(&ahcd->lock, flags);
709
710 /* Initialise the HCD registers */
711 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
712 mdelay(10);
713
714 admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_SW_RESET);
715
716 while (admhcd_reg_get(ahcd, ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET) {
717 printk(KERN_WARNING PFX "waiting for reset to complete\n");
718 mdelay(1);
719 }
720
721 hcd->uses_new_polling = 1;
722
723 /* Enable USB host mode */
724 admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_HOST_EN);
725
726 /* Set host specific settings */
727 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0x00000000);
728 admhcd_reg_set(ahcd, ADMHCD_REG_FMINTERVAL, 0x20002edf);
729 admhcd_reg_set(ahcd, ADMHCD_REG_LSTHRESH, 0x628);
730
731 /* Set interrupts */
732 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE,
733 ADMHCD_INT_ACT | ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
734 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS,
735 ADMHCD_INT_ACT | ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
736
737 /* Power on all ports */
738 admhcd_reg_set(ahcd, ADMHCD_REG_RHDESCR, ADMHCD_NPS | ADMHCD_LPSC);
739
740 /* HCD is now operationnal */
741 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
742
743 hcd->state = HC_STATE_RUNNING;
744
745 spin_unlock_irqrestore(&ahcd->lock, flags);
746
747 printk(KERN_DEBUG PFX "returning 0 from admhcd_start\n");
748 return 0;
749 }
750
751 static int admhcd_sw_reset(struct admhcd *ahcd)
752 {
753 int retries = 15;
754 unsigned long flags;
755 int ret = 0;
756
757 spin_lock_irqsave(&ahcd->lock, flags);
758
759 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
760 mdelay(10);
761
762 admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_SW_RESET);
763
764 while (--retries) {
765 mdelay(1);
766 if (!(admhcd_reg_get(ahcd, ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET))
767 break;
768 }
769 if (!retries) {
770 printk(KERN_WARNING "%s: software reset timeout\n", hcd_name);
771 ret = -ETIME;
772 }
773 spin_unlock_irqrestore(&ahcd->lock, flags);
774 return ret;
775 }
776
777 static int admhcd_reset(struct usb_hcd *hcd)
778 {
779 struct admhcd *ahcd = hcd_to_admhcd(hcd);
780 u32 state = 0;
781 int ret, timeout = 15; /* ms */
782 unsigned long t;
783
784 ret = admhcd_sw_reset(ahcd);
785 if (ret)
786 return ret;
787
788 t = jiffies + msecs_to_jiffies(timeout);
789 do {
790 spin_lock_irq(&ahcd->lock);
791 state = admhcd_reg_get(ahcd, ADMHCD_REG_HOSTCONTROL);
792 spin_unlock_irq(&ahcd->lock);
793 state &= ADMHCD_STATE_MASK;
794 if (state == ADMHCD_STATE_RST)
795 break;
796 msleep(4);
797 } while (time_before_eq(jiffies, t));
798
799 if (state != ADMHCD_STATE_RST) {
800 printk(KERN_WARNING "%s: device not ready after %dms\n",
801 hcd_name, timeout);
802 ret = -ENODEV;
803 }
804
805 return ret;
806 }
807
808 static void admhcd_stop(struct usb_hcd *hcd)
809 {
810 struct admhcd *ahcd = hcd_to_admhcd(hcd);
811 unsigned long flags;
812 u32 val;
813
814 spin_lock_irqsave(&ahcd->lock, flags);
815 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
816
817 /* Set global control of power for ports */
818 val = admhcd_reg_get(ahcd, ADMHCD_REG_RHDESCR);
819 val &= (~ADMHCD_PSM | ADMHCD_LPS);
820 admhcd_reg_set(ahcd, ADMHCD_REG_RHDESCR, val);
821
822 spin_unlock_irqrestore(&ahcd->lock, flags);
823
824 /* Ask for software reset */
825 admhcd_sw_reset(ahcd);
826 }
827
828
829 static struct hc_driver adm5120_hc_driver = {
830 .description = hcd_name,
831 .product_desc = "ADM5120 HCD",
832 .hcd_priv_size = sizeof(struct admhcd),
833 .irq = adm5120hcd_irq,
834 .flags = HCD_USB11,
835 .urb_enqueue = admhcd_urb_enqueue,
836 .urb_dequeue = admhcd_urb_dequeue,
837 .endpoint_disable = admhcd_endpoint_disable,
838 .get_frame_number = admhcd_get_frame_number,
839 .hub_status_data = admhcd_hub_status_data,
840 .hub_control = admhcd_hub_control,
841 .start = admhcd_start,
842 .stop = admhcd_stop,
843 .reset = admhcd_reset,
844 };
845
846 #define resource_len(r) (((r)->end - (r)->start) + 1)
847
848 static int __init adm5120hcd_probe(struct platform_device *pdev)
849 {
850 struct usb_hcd *hcd;
851 struct admhcd *ahcd;
852 struct resource *data;
853 void __iomem *data_reg;
854
855 int err = 0, irq;
856
857 if (pdev->num_resources < 2) {
858 printk(KERN_WARNING PFX "not enough resources\n");
859 err = -ENODEV;
860 goto out;
861 }
862
863 irq = platform_get_irq(pdev, 0);
864 data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
865
866 if (pdev->dev.dma_mask) {
867 printk(KERN_DEBUG PFX "no we won't dma\n");
868 return -EINVAL;
869 }
870
871 if (!data || irq < 0) {
872 printk(KERN_DEBUG PFX "either IRQ or data resource is invalid\n");
873 err = -ENODEV;
874 goto out;
875 }
876
877 if (!request_mem_region(data->start, resource_len(data), hcd_name)) {
878 printk(KERN_DEBUG PFX "cannot request memory regions for the data resource\n");
879 err = -EBUSY;
880 goto out;
881 }
882
883 data_reg = ioremap(data->start, resource_len(data));
884 if (data_reg == NULL) {
885 printk(KERN_DEBUG PFX "unable to ioremap\n");
886 err = -ENOMEM;
887 goto out_mem;
888 }
889
890 hcd = usb_create_hcd(&adm5120_hc_driver, &pdev->dev, pdev->dev.bus_id);
891 if (!hcd) {
892 printk(KERN_DEBUG PFX "unable to create the hcd\n");
893 err = -ENOMEM;
894 goto out_unmap;
895 }
896
897 hcd->rsrc_start = data->start;
898 hcd->rsrc_len = resource_len(data);
899 hcd->regs = data_reg;
900
901 ahcd = hcd_to_admhcd(hcd);
902 ahcd->data_reg = data_reg;
903 ahcd->base = (u32)data_reg;
904
905 spin_lock_init(&ahcd->lock);
906 INIT_LIST_HEAD(&ahcd->async);
907
908 hcd->product_desc = "ADM5120 HCD";
909
910 err = usb_add_hcd(hcd, irq, IRQF_DISABLED);
911 if (err) {
912 printk(KERN_DEBUG PFX "unable to add hcd\n");
913 goto out_dev;
914 }
915
916 return 0;
917
918 out_dev:
919 usb_put_hcd(hcd);
920 out_unmap:
921 iounmap(data_reg);
922 out_mem:
923 release_mem_region(pdev->resource[0].start, pdev->resource[0].end - pdev->resource[0].start +1);
924 out:
925 return err;
926 }
927
928 #ifdef CONFIG_PM
929 static int adm5120hcd_suspend(struct platform_device *pdev, pm_message_t state)
930 {
931 pdev-dev.power.power_state = state;
932 mdelay(1);
933 return 0;
934 }
935
936 static int adm5120hcd_resume(struct platform_device *pdev, pm_message_t state)
937 {
938 pdev->dev.power.power_state = PMSG_ON;
939 mdelay(1);
940 return 0;
941 }
942 #else
943 #define adm5120hcd_suspend NULL
944 #define adm5120hcd_resume NULL
945 #endif
946
947 static int __init_or_module adm5120hcd_remove(struct platform_device *pdev)
948 {
949 struct usb_hcd *hcd = platform_get_drvdata(pdev);
950 struct admhcd *ahcd;
951
952 if (!hcd)
953 return 0;
954 ahcd = hcd_to_admhcd(hcd);
955 usb_remove_hcd(hcd);
956
957 usb_put_hcd(hcd);
958 return 0;
959 }
960
961 static struct platform_driver adm5120hcd_driver = {
962 .probe = adm5120hcd_probe,
963 .remove = adm5120hcd_remove,
964 .suspend = adm5120hcd_suspend,
965 .remove = adm5120hcd_resume,
966 .driver = {
967 .name = (char *)hcd_name,
968 .owner = THIS_MODULE,
969 },
970 };
971
972 static int __init adm5120hcd_init(void)
973 {
974 int ret;
975
976 if (usb_disabled()) {
977 printk(KERN_DEBUG PFX "USB support is disabled\n");
978 return -ENODEV;
979 }
980
981 if (mips_machgroup != MACH_GROUP_ADM5120) {
982 printk(KERN_DEBUG PFX "unsupported machine group\n");
983 return -ENODEV;
984 }
985
986 ret = platform_driver_register(&adm5120hcd_driver);
987 if (ret == 0)
988 printk(KERN_INFO PFX "registered\n");
989
990 return ret;
991 }
992
993 static void __exit adm5120hcd_exit(void)
994 {
995 platform_driver_unregister(&adm5120hcd_driver);
996 printk(KERN_INFO PFX "driver unregistered\n");
997 }
998
999 module_init(adm5120hcd_init);
1000 module_exit(adm5120hcd_exit);
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