target/linux/adm5120/files/arch/mips/adm5120/boards/mikrotik.c

   1 /*
   2  *  $Id$
   3  *
   4  *  Mikrotik RouterBOARD 1xx series
   5  *
   6  *  Copyright (C) 2007 OpenWrt.org
   7  *  Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
   8  *
   9  *  NAND initialization code was based on a driver for Linux 2.6.19+ which
  10  *  was derived from the driver for Linux 2.4.xx published by Mikrotik for
  11  *  their RouterBoard 1xx and 5xx series boards.
  12  *    Copyright (C) 2007 David Goodenough <david.goodenough@linkchoose.co.uk>
  13  *    Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
  14  *    The original Mikrotik code seems not to have a license.
  15  *
  16  *  This program is free software; you can redistribute it and/or
  17  *  modify it under the terms of the GNU General Public License
  18  *  as published by the Free Software Foundation; either version 2
  19  *  of the License, or (at your option) any later version.
  20  *
  21  *  This program is distributed in the hope that it will be useful,
  22  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  *  GNU General Public License for more details.
  25  *
  26  *  You should have received a copy of the GNU General Public License
  27  *  along with this program; if not, write to the
  28  *  Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  29  *  Boston, MA  02110-1301, USA.
  30  *
  31  */
  32
  33 #include <linux/kernel.h>
  34 #include <linux/init.h>
  35 #include <linux/delay.h>
  36
  37 #include <asm/bootinfo.h>
  38 #include <asm/gpio.h>
  39
  40 #include <adm5120_defs.h>
  41 #include <adm5120_irq.h>
  42 #include <adm5120_nand.h>
  43 #include <adm5120_board.h>
  44 #include <adm5120_platform.h>
  45 #include <adm5120_info.h>
  46
  47 #include <prom/routerboot.h>
  48
  49 #define RB1XX_NAND_CHIP_DELAY   25
  50
  51 #define RB150_NAND_BASE         0x1FC80000
  52 #define RB150_NAND_SIZE         1
  53
  54 #define RB150_GPIO_NAND_READY   ADM5120_GPIO_PIN0
  55 #define RB150_GPIO_NAND_NCE     ADM5120_GPIO_PIN1
  56 #define RB150_GPIO_NAND_CLE     ADM5120_GPIO_P2L2
  57 #define RB150_GPIO_NAND_ALE     ADM5120_GPIO_P3L2
  58
  59 #define RB150_NAND_DELAY        100
  60
  61 #define RB150_NAND_WRITE(v) \
  62         writeb((v), (void __iomem *)KSEG1ADDR(RB150_NAND_BASE))
  63
  64 #define RB153_GPIO_CF_RDY       ADM5120_GPIO_P1L1
  65 #define RB153_GPIO_CF_WT        ADM5120_GPIO_P0L0
  66
  67 /*--------------------------------------------------------------------------*/
  68
  69 static struct adm5120_pci_irq rb1xx_pci_irqs[] __initdata = {
  70         PCIIRQ(1, 0, 1, ADM5120_IRQ_PCI0),
  71         PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI1),
  72         PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI2)
  73 };
  74
  75 static struct mtd_partition rb1xx_nor_parts[] = {
  76         {
  77                 .name   = "booter",
  78                 .offset = 0,
  79                 .size   = 64*1024,
  80                 .mask_flags = MTD_WRITEABLE,
  81         } , {
  82                 .name   = "firmware",
  83                 .offset = MTDPART_OFS_APPEND,
  84                 .size   = MTDPART_SIZ_FULL,
  85         }
  86 };
  87
  88 static struct mtd_partition rb1xx_nand_parts[] = {
  89         {
  90                 .name   = "kernel",
  91                 .offset = 0,
  92                 .size   = 4 * 1024 * 1024,
  93         } , {
  94                 .name   = "rootfs",
  95                 .offset = MTDPART_OFS_NXTBLK,
  96                 .size   = MTDPART_SIZ_FULL
  97         }
  98 };
  99
 100 static struct platform_device *rb1xx_devices[] __initdata = {
 101         &adm5120_flash0_device,
 102         &adm5120_nand_device,
 103 };
 104
 105 /*
 106  * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
 107  * will not be able to find the kernel that we load.  So set the oobinfo
 108  * when creating the partitions
 109  */
 110 static struct nand_ecclayout rb1xx_nand_ecclayout = {
 111         .eccbytes       = 6,
 112         .eccpos         = { 8, 9, 10, 13, 14, 15 },
 113         .oobavail       = 9,
 114         .oobfree        = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
 115 };
 116
 117 static struct resource rb150_nand_resource[] = {
 118         [0] = {
 119                 .start  = RB150_NAND_BASE,
 120                 .end    = RB150_NAND_BASE + RB150_NAND_SIZE-1,
 121                 .flags  = IORESOURCE_MEM,
 122         },
 123 };
 124
 125 static struct resource rb153_cf_resources[] = {
 126         {
 127                 .name   = "cf_membase",
 128                 .start  = ADM5120_EXTIO1_BASE,
 129                 .end    = ADM5120_EXTIO1_BASE + ADM5120_EXTIO1_SIZE-1 ,
 130                 .flags  = IORESOURCE_MEM
 131         }, {
 132                 .name   = "cf_irq",
 133                 .start  = ADM5120_IRQ_GPIO4,
 134                 .end    = ADM5120_IRQ_GPIO4,
 135                 .flags  = IORESOURCE_IRQ
 136         }
 137 };
 138
 139 static struct platform_device rb153_cf_device = {
 140         .name           = "pata-rb153-cf",
 141         .id             = -1,
 142         .resource       = rb153_cf_resources,
 143         .num_resources  = ARRAY_SIZE(rb153_cf_resources),
 144 };
 145
 146 static struct platform_device *rb153_devices[] __initdata = {
 147         &adm5120_flash0_device,
 148         &adm5120_nand_device,
 149         &rb153_cf_device,
 150 };
 151
 152 #if 0
 153 /*
 154  * RB1xx boards have bad network performance with the default VLAN matrixes.
 155  * Disable it while the ethernet driver gets fixed.
 156  */
 157 static unsigned char rb11x_vlans[6] __initdata = {
 158         /* FIXME: untested */
 159         0x41, 0x00, 0x00, 0x00, 0x00, 0x00
 160 };
 161
 162 static unsigned char rb133_vlans[6] __initdata = {
 163         /* FIXME: untested */
 164         0x44, 0x42, 0x41, 0x00, 0x00, 0x00
 165 };
 166
 167 static unsigned char rb133c_vlans[6] __initdata = {
 168         /* FIXME: untested */
 169         0x44, 0x00, 0x00, 0x00, 0x00, 0x00
 170 };
 171
 172 static unsigned char rb15x_vlans[6] __initdata = {
 173         /* FIXME: untested */
 174         0x41, 0x42, 0x44, 0x48, 0x50, 0x00
 175 };
 176
 177 static unsigned char rb192_vlans[6] __initdata = {
 178         /* FIXME: untested */
 179         0x41, 0x50, 0x48, 0x44, 0x42, 0x00
 180 };
 181 #else
 182 static unsigned char rb_vlans[6] __initdata = {
 183         0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
 184 };
 185 #define rb11x_vlans     rb_vlans
 186 #define rb133_vlans     rb_vlans
 187 #define rb133c_vlans    rb_vlans
 188 #define rb15x_vlans     rb_vlans
 189 #define rb192_vlans     rb_vlans
 190 #endif
 191
 192 /*--------------------------------------------------------------------------*/
 193
 194 static int rb150_nand_ready(struct mtd_info *mtd)
 195 {
 196         return gpio_get_value(RB150_GPIO_NAND_READY);
 197 }
 198
 199 static void rb150_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
 200                 unsigned int ctrl)
 201 {
 202         if (ctrl & NAND_CTRL_CHANGE) {
 203                 gpio_set_value(RB150_GPIO_NAND_CLE, (ctrl & NAND_CLE) ? 1 : 0);
 204                 gpio_set_value(RB150_GPIO_NAND_ALE, (ctrl & NAND_ALE) ? 1 : 0);
 205                 gpio_set_value(RB150_GPIO_NAND_NCE, (ctrl & NAND_NCE) ? 0 : 1);
 206         }
 207
 208         udelay(RB150_NAND_DELAY);
 209
 210         if (cmd != NAND_CMD_NONE)
 211                 RB150_NAND_WRITE(cmd);
 212 }
 213
 214 /*--------------------------------------------------------------------------*/
 215
 216 static void __init rb1xx_mac_setup(void)
 217 {
 218         int i, j;
 219
 220         if (!rb_hs.mac_base)
 221                 return;
 222
 223         for (i = 0; i < 6; i++) {
 224                 for (j = 0; j < 5; j++)
 225                         adm5120_eth_macs[i][j] = rb_hs.mac_base[j];
 226                 adm5120_eth_macs[i][5] = rb_hs.mac_base[5]+i;
 227         }
 228 }
 229
 230 static void __init rb1xx_flash_setup(void)
 231 {
 232         /* setup data for flash0 device */
 233         adm5120_flash0_data.nr_parts = ARRAY_SIZE(rb1xx_nor_parts);
 234         adm5120_flash0_data.parts = rb1xx_nor_parts;
 235
 236         /* setup data for NAND device */
 237         adm5120_nand_data.chip.nr_chips = 1;
 238         adm5120_nand_data.chip.nr_partitions = ARRAY_SIZE(rb1xx_nand_parts);
 239         adm5120_nand_data.chip.partitions = rb1xx_nand_parts;
 240         adm5120_nand_data.chip.ecclayout = &rb1xx_nand_ecclayout;
 241         adm5120_nand_data.chip.chip_delay = RB1XX_NAND_CHIP_DELAY;
 242         adm5120_nand_data.chip.options = NAND_NO_AUTOINCR;
 243 }
 244
 245 static void __init rb153_cf_setup(void)
 246 {
 247         /* enable CSX1:INTX1 on GPIO[3:4] for the CF slot */
 248         adm5120_gpio_csx1_enable();
 249         /* enable the wait state pin GPIO[0] for external I/O control */
 250         adm5120_gpio_ew_enable();
 251
 252         gpio_request(RB153_GPIO_CF_RDY, "cf-ready");
 253         gpio_direction_input(RB153_GPIO_CF_RDY);
 254         gpio_request(RB153_GPIO_CF_WT, "cf-wait");
 255         gpio_direction_output(RB153_GPIO_CF_WT, 1);
 256         gpio_direction_input(RB153_GPIO_CF_WT);
 257 }
 258
 259 static void __init rb1xx_setup(void)
 260 {
 261         /* enable NAND flash interface */
 262         adm5120_nand_enable();
 263
 264         /* initialize NAND chip */
 265         adm5120_nand_set_spn(1);
 266         adm5120_nand_set_wpn(0);
 267
 268         rb1xx_flash_setup();
 269         rb1xx_mac_setup();
 270 }
 271
 272 static void __init rb150_setup(void)
 273 {
 274         /* setup GPIO pins for NAND flash chip */
 275         gpio_request(RB150_GPIO_NAND_READY, "nand-ready");
 276         gpio_direction_input(RB150_GPIO_NAND_READY);
 277         gpio_request(RB150_GPIO_NAND_NCE, "nand-nce");
 278         gpio_direction_output(RB150_GPIO_NAND_NCE, 1);
 279         gpio_request(RB150_GPIO_NAND_CLE, "nand-cle");
 280         gpio_direction_output(RB150_GPIO_NAND_CLE, 0);
 281         gpio_request(RB150_GPIO_NAND_ALE, "nand-ale");
 282         gpio_direction_output(RB150_GPIO_NAND_ALE, 0);
 283
 284         adm5120_nand_device.num_resources = ARRAY_SIZE(rb150_nand_resource);
 285         adm5120_nand_device.resource = rb150_nand_resource;
 286         adm5120_nand_data.ctrl.cmd_ctrl = rb150_nand_cmd_ctrl;
 287         adm5120_nand_data.ctrl.dev_ready = rb150_nand_ready;
 288
 289         adm5120_flash0_data.window_size = 512*1024;
 290
 291         rb1xx_flash_setup();
 292         rb1xx_mac_setup();
 293 }
 294
 295 static void __init rb153_setup(void)
 296 {
 297         rb153_cf_setup();
 298         rb1xx_setup();
 299 }
 300
 301 /*--------------------------------------------------------------------------*/
 302
 303 ADM5120_BOARD_START(RB_111, "Mikrotik RouterBOARD 111")
 304         .board_setup    = rb1xx_setup,
 305         .eth_num_ports  = 1,
 306         .eth_vlans      = rb11x_vlans,
 307         .num_devices    = ARRAY_SIZE(rb1xx_devices),
 308         .devices        = rb1xx_devices,
 309         .pci_nr_irqs    = ARRAY_SIZE(rb1xx_pci_irqs),
 310         .pci_irq_map    = rb1xx_pci_irqs,
 311 ADM5120_BOARD_END
 312
 313 ADM5120_BOARD_START(RB_112, "Mikrotik RouterBOARD 112")
 314         .board_setup    = rb1xx_setup,
 315         .eth_num_ports  = 1,
 316         .eth_vlans      = rb11x_vlans,
 317         .num_devices    = ARRAY_SIZE(rb1xx_devices),
 318         .devices        = rb1xx_devices,
 319         .pci_nr_irqs    = ARRAY_SIZE(rb1xx_pci_irqs),
 320         .pci_irq_map    = rb1xx_pci_irqs,
 321 ADM5120_BOARD_END
 322
 323 ADM5120_BOARD_START(RB_133, "Mikrotik RouterBOARD 133")
 324         .board_setup    = rb1xx_setup,
 325         .eth_num_ports  = 3,
 326         .eth_vlans      = rb133_vlans,
 327         .num_devices    = ARRAY_SIZE(rb1xx_devices),
 328         .devices        = rb1xx_devices,
 329         .pci_nr_irqs    = ARRAY_SIZE(rb1xx_pci_irqs),
 330         .pci_irq_map    = rb1xx_pci_irqs,
 331 ADM5120_BOARD_END
 332
 333 ADM5120_BOARD_START(RB_133C, "Mikrotik RouterBOARD 133C")
 334         .board_setup    = rb1xx_setup,
 335         .eth_num_ports  = 1,
 336         .eth_vlans      = rb133c_vlans,
 337         .num_devices    = ARRAY_SIZE(rb1xx_devices),
 338         .devices        = rb1xx_devices,
 339         .pci_nr_irqs    = ARRAY_SIZE(rb1xx_pci_irqs),
 340         .pci_irq_map    = rb1xx_pci_irqs,
 341 ADM5120_BOARD_END
 342
 343 ADM5120_BOARD_START(RB_150, "Mikrotik RouterBOARD 150")
 344         .board_setup    = rb150_setup,
 345         .eth_num_ports  = 5,
 346         .eth_vlans      = rb15x_vlans,
 347         .num_devices    = ARRAY_SIZE(rb1xx_devices),
 348         .devices        = rb1xx_devices,
 349 ADM5120_BOARD_END
 350
 351 ADM5120_BOARD_START(RB_153, "Mikrotik RouterBOARD 153")
 352         .board_setup    = rb153_setup,
 353         .eth_num_ports  = 5,
 354         .eth_vlans      = rb15x_vlans,
 355         .num_devices    = ARRAY_SIZE(rb153_devices),
 356         .devices        = rb153_devices,
 357         .pci_nr_irqs    = ARRAY_SIZE(rb1xx_pci_irqs),
 358         .pci_irq_map    = rb1xx_pci_irqs,
 359 ADM5120_BOARD_END
 360
 361 ADM5120_BOARD_START(RB_192, "Mikrotik RouterBOARD 192")
 362         .board_setup    = rb1xx_setup,
 363         .eth_num_ports  = 5,
 364         .eth_vlans      = rb192_vlans,
 365         .num_devices    = ARRAY_SIZE(rb1xx_devices),
 366         .devices        = rb1xx_devices,
 367         .pci_nr_irqs    = ARRAY_SIZE(rb1xx_pci_irqs),
 368         .pci_irq_map    = rb1xx_pci_irqs,
 369 ADM5120_BOARD_END