target/linux/amazon-2.6/files/arch/mips/amazon/setup.c

   1 /*
   2  *       Copyright (C) 2004 Peng Liu <peng.liu@infineon.com>
   3  *       Copyright (C) 2007 John Crispin <blogic@openwrt.org>
   4  *       Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
   5  *
   6  *   This program is free software; you can redistribute it and/or modify
   7  *   it under the terms of the GNU General Public License as published by
   8  *   the Free Software Foundation; either version 2 of the License, or
   9  *   (at your option) any later version.
  10  *
  11  *   This program is distributed in the hope that it will be useful,
  12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *   GNU General Public License for more details.
  15  *
  16  *   You should have received a copy of the GNU General Public License
  17  *   along with this program; if not, write to the Free Software
  18  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  19  *
  20  */
  21 #include <linux/init.h>
  22 #include <linux/sched.h>
  23 #include <linux/module.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/delay.h>
  26
  27 #include <asm/reboot.h>
  28 #include <asm/system.h>
  29 #include <asm/time.h>
  30 #include <asm/cpu.h>
  31 #include <asm/bootinfo.h>
  32 #include <asm/irq.h>
  33 #include <asm/mipsregs.h>
  34 #include <asm/amazon/amazon.h>
  35 #include <asm/amazon/irq.h>
  36 #include <asm/amazon/model.h>
  37
  38 extern void prom_printf(const char * fmt, ...);
  39 static void amazon_reboot_setup(void);
  40
  41 /* the CPU clock rate - lifted from u-boot */
  42 unsigned int amazon_get_cpu_hz(void)
  43 {
  44         /*-----------------------------------*/
  45         /**CGU CPU Clock Reduction Register***/
  46         /*-----------------------------------*/
  47         switch((*AMAZON_CGU_CPUCRD) & 0x3){
  48                 case 0:
  49                         /*divider ration 1/1, 235 MHz clock */
  50                         return 235000000;
  51                 case 1:
  52                         /*divider ration 2/3, 235 MHz clock, clock not accurate, here */
  53                         return 150000000;
  54                 case 2:
  55                         /*divider ration 1/2, 235 MHz clock */
  56                         return 117500000;
  57                 default:
  58                         /*divider ration 1/4, 235 MHz clock */
  59                         return 58750000;
  60         }
  61 }
  62
  63 /* the FPI clock rate - lifted from u-boot */
  64 unsigned int amazon_get_fpi_hz(void)
  65 {
  66         unsigned int  clkCPU;
  67         clkCPU = amazon_get_cpu_hz();
  68
  69         /*-------------------------------------*/
  70         /***CGU Clock Divider Select Register***/
  71         /*-------------------------------------*/
  72         switch ((*AMAZON_CGU_DIV) & 0x3)
  73         {
  74                 case 1:
  75                         return clkCPU >> 1;
  76                 case 2:
  77                         return clkCPU >> 2;
  78                 default:
  79                         return clkCPU;
  80                 /* '11' is reserved */
  81         }
  82 }
  83
  84 /* get the CPU version number  - based on sysLib.c from VxWorks sources */
  85 /* this doesn't really belong here, but it's a convenient location */
  86 unsigned int amazon_get_cpu_ver(void)
  87 {
  88         static unsigned int cpu_ver = 0;
  89         if (cpu_ver == 0)
  90                 cpu_ver = *AMAZON_MCD_CHIPID & 0xFFFFF000;
  91         return cpu_ver;
  92 }
  93
  94 void amazon_time_init(void)
  95 {
  96         mips_hpt_frequency = amazon_get_cpu_hz()/2;
  97         printk("mips_hpt_frequency:%d\n",mips_hpt_frequency);
  98 }
  99
 100 extern int hr_time_resolution;
 101
 102 /* ISR GPTU Timer 6 for high resolution timer */
 103 static void amazon_timer6_interrupt(int irq, void *dev_id)
 104 {
 105         timer_interrupt(AMAZON_TIMER6_INT, NULL);
 106 }
 107
 108 static struct irqaction hrt_irqaction = {
 109         .handler = amazon_timer6_interrupt,
 110         .flags = SA_INTERRUPT,
 111         .name = "hrt",
 112 };
 113
 114 /*
 115  * THe CPU counter for System timer, set to HZ
 116  * GPTU Timer 6 for high resolution timer, set to hr_time_resolution
 117  * Also misuse this routine to print out the CPU type and clock.
 118  */
 119 void __init plat_timer_setup(struct irqaction *irq)
 120 {
 121         /* cpu counter for timer interrupts */
 122         setup_irq(MIPS_CPU_TIMER_IRQ, irq);
 123
 124 #if 0
 125         /* to generate the first CPU timer interrupt */
 126         write_c0_compare(read_c0_count() + amazon_get_cpu_hz()/(2*HZ));
 127 #endif
 128
 129         /* enable the timer in the PMU */
 130         *(AMAZON_PMU_PWDCR) = (*(AMAZON_PMU_PWDCR))| AMAZON_PMU_PWDCR_GPT|AMAZON_PMU_PWDCR_FPI;
 131         /* setup the GPTU for timer tick  f_fpi == f_gptu*/
 132         *(AMAZON_GPTU_CLC) = 0x100;
 133
 134         *(AMAZON_GPTU_CAPREL) = 0xffff;
 135         *(AMAZON_GPTU_T6CON) = 0x80C0;
 136         //setup_irq(AMAZON_TIMER6_INT,&hrt_irqaction);
 137
 138 #if 0
 139 #ifdef CONFIG_HIGH_RES_TIMERS
 140         /* GPTU timer 6 */
 141         int retval;
 142         if ( hr_time_resolution > 200000000 || hr_time_resolution < 40) {
 143                 prom_printf("hr_time_resolution is out of range, HIGH_RES_TIMER is diabled.\n");
 144                 return;
 145         }
 146
 147         /* enable the timer in the PMU */
 148         *(AMAZON_PMU_PWDCR) = (*(AMAZON_PMU_PWDCR))| AMAZON_PMU_PWDCR_GPT|AMAZON_PMU_PWDCR_FPI;
 149         /* setup the GPTU for timer tick  f_fpi == f_gptu*/
 150         *(AMAZON_GPTU_CLC) = 0x100;
 151
 152         *(AMAZON_GPTU_CAPREL) = 0xffff;
 153         *(AMAZON_GPTU_T6CON) = 0x80C0;
 154
 155         retval = setup_irq(AMAZON_TIMER6_INT,&hrt_irqaction);
 156         if (retval){
 157                 prom_printf("reqeust_irq failed %d. HIGH_RES_TIMER is diabled\n",AMAZON_TIMER6_INT);
 158         }
 159 #endif //CONFIG_HIGH_RES_TIMERS
 160 #endif
 161 }
 162
 163 void __init plat_mem_setup(void)
 164 {
 165         u32 chipid = 0;
 166         u32 part_no = 0;
 167
 168         chipid = *(AMAZON_MCD_CHIPID);
 169         part_no = AMAZON_MCD_CHIPID_PART_NUMBER_GET(chipid);
 170
 171         if(part_no == AMAZON_CHIPID_YANGTSE){
 172                 prom_printf("Yangtse Version\n");
 173         } else if (part_no == AMAZON_CHIPID_STANDARD) {
 174                 prom_printf(SYSTEM_MODEL_NAME "\n");
 175         } else {
 176                 prom_printf("unknown version %8x\n",part_no);
 177         }
 178
 179         amazon_reboot_setup();
 180         board_time_init = amazon_time_init;
 181
 182         //stop reset TPE and DFE
 183         *(AMAZON_RST_REQ) = 0x0;
 184         //clock
 185         *(AMAZON_PMU_PWDCR) = 0x3fff;
 186         //reenable trace capability
 187         part_no = *(AMAZON_BCU_ECON);
 188 }
 189
 190 static void amazon_machine_restart(char *command)
 191 {
 192     local_irq_disable();
 193     *AMAZON_RST_REQ = AMAZON_RST_ALL;
 194     for (;;) ;
 195 }
 196
 197 static void amazon_machine_halt(void)
 198 {
 199     printk(KERN_NOTICE "System halted.\n");
 200     local_irq_disable();
 201     for (;;) ;
 202 }
 203
 204 static void amazon_machine_power_off(void)
 205 {
 206         printk(KERN_NOTICE "Please turn off the power now.\n");
 207     local_irq_disable();
 208     for (;;) ;
 209 }
 210
 211 static void amazon_reboot_setup(void)
 212 {
 213         _machine_restart = amazon_machine_restart;
 214         _machine_halt = amazon_machine_halt;
 215         pm_power_off = amazon_machine_power_off;
 216 }