target/linux/ar7/files/arch/mips/ar7/platform.c

   1 /*
   2  * Copyright (C) 2006, 2007 OpenWrt.org
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  17  */
  18
  19 #include <linux/autoconf.h>
  20 #include <linux/init.h>
  21 #include <linux/types.h>
  22 #include <linux/module.h>
  23 #include <linux/delay.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/mtd/physmap.h>
  26 #include <linux/serial.h>
  27 #include <linux/serial_8250.h>
  28 #include <linux/ioport.h>
  29 #include <linux/io.h>
  30
  31 #include <asm/addrspace.h>
  32 #include <asm/ar7/ar7.h>
  33 #include <asm/ar7/gpio.h>
  34 #include <asm/ar7/prom.h>
  35 #include <asm/ar7/vlynq.h>
  36
  37 struct plat_vlynq_data {
  38         struct plat_vlynq_ops ops;
  39         int gpio_bit;
  40         int reset_bit;
  41 };
  42
  43
  44 static int vlynq_on(struct vlynq_device *dev)
  45 {
  46         int result;
  47         struct plat_vlynq_data *pdata = dev->dev.platform_data;
  48
  49         if ((result = gpio_request(pdata->gpio_bit, "vlynq")))
  50                 goto out;
  51
  52         ar7_device_reset(pdata->reset_bit);
  53
  54         if ((result = ar7_gpio_disable(pdata->gpio_bit)))
  55                 goto out_enabled;
  56
  57         if ((result = ar7_gpio_enable(pdata->gpio_bit)))
  58                 goto out_enabled;
  59
  60         if ((result = gpio_direction_output(pdata->gpio_bit)))
  61                 goto out_gpio_enabled;
  62
  63         gpio_set_value(pdata->gpio_bit, 0);
  64         mdelay(50);
  65
  66         gpio_set_value(pdata->gpio_bit, 1);
  67         mdelay(50);
  68
  69         return 0;
  70
  71 out_gpio_enabled:
  72         ar7_gpio_disable(pdata->gpio_bit);
  73 out_enabled:
  74         ar7_device_disable(pdata->reset_bit);
  75         gpio_free(pdata->gpio_bit);
  76 out:
  77         return result;
  78 }
  79
  80 static void vlynq_off(struct vlynq_device *dev)
  81 {
  82         struct plat_vlynq_data *pdata = dev->dev.platform_data;
  83         ar7_gpio_disable(pdata->gpio_bit);
  84         gpio_free(pdata->gpio_bit);
  85         ar7_device_disable(pdata->reset_bit);
  86 }
  87
  88 static struct resource physmap_flash_resource = {
  89         .name = "mem",
  90         .flags = IORESOURCE_MEM,
  91         .start = 0x10000000,
  92         .end = 0x107fffff,
  93 };
  94
  95 static struct resource cpmac_low_res[] = {
  96         {
  97                 .name = "regs",
  98                 .flags = IORESOURCE_MEM,
  99                 .start = AR7_REGS_MAC0,
 100                 .end = AR7_REGS_MAC0 + 0x7ff,
 101         },
 102         {
 103                 .name = "irq",
 104                 .flags = IORESOURCE_IRQ,
 105                 .start = 27,
 106                 .end = 27,
 107         },
 108 };
 109
 110 static struct resource cpmac_high_res[] = {
 111         {
 112                 .name = "regs",
 113                 .flags = IORESOURCE_MEM,
 114                 .start = AR7_REGS_MAC1,
 115                 .end = AR7_REGS_MAC1 + 0x7ff,
 116         },
 117         {
 118                 .name = "irq",
 119                 .flags = IORESOURCE_IRQ,
 120                 .start = 41,
 121                 .end = 41,
 122         },
 123 };
 124
 125 static struct resource vlynq_low_res[] = {
 126         {
 127                 .name = "regs",
 128                 .flags = IORESOURCE_MEM,
 129                 .start = AR7_REGS_VLYNQ0,
 130                 .end = AR7_REGS_VLYNQ0 + 0xff,
 131         },
 132         {
 133                 .name = "irq",
 134                 .flags = IORESOURCE_IRQ,
 135                 .start = 29,
 136                 .end = 29,
 137         },
 138         {
 139                 .name = "mem",
 140                 .flags = IORESOURCE_MEM,
 141                 .start = 0x04000000,
 142                 .end = 0x04ffffff,
 143         },
 144         {
 145                 .name = "devirq",
 146                 .flags = IORESOURCE_IRQ,
 147                 .start = 80,
 148                 .end = 111,
 149         },
 150 };
 151
 152 static struct resource vlynq_high_res[] = {
 153         {
 154                 .name = "regs",
 155                 .flags = IORESOURCE_MEM,
 156                 .start = AR7_REGS_VLYNQ1,
 157                 .end = AR7_REGS_VLYNQ1 + 0xff,
 158         },
 159         {
 160                 .name = "irq",
 161                 .flags = IORESOURCE_IRQ,
 162                 .start = 33,
 163                 .end = 33,
 164         },
 165         {
 166                 .name = "mem",
 167                 .flags = IORESOURCE_MEM,
 168                 .start = 0x0c000000,
 169                 .end = 0x0cffffff,
 170         },
 171         {
 172                 .name = "devirq",
 173                 .flags = IORESOURCE_IRQ,
 174                 .start = 112,
 175                 .end = 143,
 176         },
 177 };
 178
 179 static struct physmap_flash_data physmap_flash_data = {
 180         .width = 2,
 181 };
 182
 183 static struct plat_cpmac_data cpmac_low_data = {
 184         .reset_bit = 17,
 185         .power_bit = 20,
 186         .phy_mask = 0x80000000,
 187 };
 188
 189 static struct plat_cpmac_data cpmac_high_data = {
 190         .reset_bit = 21,
 191         .power_bit = 22,
 192         .phy_mask = 0x7fffffff,
 193 };
 194
 195 static struct plat_vlynq_data vlynq_low_data = {
 196         .ops.on = vlynq_on,
 197         .ops.off = vlynq_off,
 198         .reset_bit = 20,
 199         .gpio_bit = 18,
 200 };
 201
 202 static struct plat_vlynq_data vlynq_high_data = {
 203         .ops.on = vlynq_on,
 204         .ops.off = vlynq_off,
 205         .reset_bit = 16,
 206         .gpio_bit = 19,
 207 };
 208
 209 static struct platform_device physmap_flash = {
 210         .id = 0,
 211         .name = "physmap-flash",
 212         .dev.platform_data = &physmap_flash_data,
 213         .resource = &physmap_flash_resource,
 214         .num_resources = 1,
 215 };
 216
 217 static u64 cpmac_dma_mask = DMA_32BIT_MASK;
 218 static struct platform_device cpmac_low = {
 219         .id = 0,
 220         .name = "cpmac",
 221         .dev = {
 222                 .dma_mask = &cpmac_dma_mask;
 223                 .coherent_dma_mask = DMA_32BIT_MASK;
 224                 .platform_data = &cpmac_low_data,
 225         },
 226         .resource = cpmac_low_res,
 227         .num_resources = ARRAY_SIZE(cpmac_low_res),
 228 };
 229
 230 static struct platform_device cpmac_high = {
 231         .id = 1,
 232         .name = "cpmac",
 233         .dev = {
 234                 .dma_mask = &cpmac_dma_mask;
 235                 .coherent_dma_mask = DMA_32BIT_MASK;
 236                 .platform_data = &cpmac_high_data,
 237         },
 238         .resource = cpmac_high_res,
 239         .num_resources = ARRAY_SIZE(cpmac_high_res),
 240 };
 241
 242 static struct platform_device vlynq_low = {
 243         .id = 0,
 244         .name = "vlynq",
 245         .dev.platform_data = &vlynq_low_data,
 246         .resource = vlynq_low_res,
 247         .num_resources = ARRAY_SIZE(vlynq_low_res),
 248 };
 249
 250 static struct platform_device vlynq_high = {
 251         .id = 1,
 252         .name = "vlynq",
 253         .dev.platform_data = &vlynq_high_data,
 254         .resource = vlynq_high_res,
 255         .num_resources = ARRAY_SIZE(vlynq_high_res),
 256 };
 257
 258
 259 /* This is proper way to define uart ports, but they are then detected
 260  * as xscale and, obviously, don't work...
 261  */
 262 #if !defined(CONFIG_SERIAL_8250)
 263
 264 static struct plat_serial8250_port uart0_data = {
 265         .mapbase = AR7_REGS_UART0,
 266         .irq = AR7_IRQ_UART0,
 267         .regshift = 2,
 268         .iotype = UPIO_MEM,
 269         .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 270 };
 271
 272 static struct plat_serial8250_port uart1_data = {
 273         .mapbase = UR8_REGS_UART1,
 274         .irq = AR7_IRQ_UART1,
 275         .regshift = 2,
 276         .iotype = UPIO_MEM,
 277         .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 278 };
 279
 280 static struct plat_serial8250_port uart_data[] = {
 281         uart0_data,
 282         uart1_data,
 283         { .flags = 0 }
 284 };
 285
 286 static struct plat_serial8250_port uart_data_single[] = {
 287         uart0_data,
 288         { .flags = 0 }
 289 };
 290
 291 static struct platform_device uart = {
 292         .id = 0,
 293         .name = "serial8250",
 294         .dev.platform_data = uart_data_single
 295 };
 296 #endif
 297
 298 static inline unsigned char char2hex(char h)
 299 {
 300         switch (h) {
 301         case '0': case '1': case '2': case '3': case '4':
 302         case '5': case '6': case '7': case '8': case '9':
 303                 return h - '0';
 304         case 'A': case 'B': case 'C': case 'D': case 'E': case 'F':
 305                 return h - 'A' + 10;
 306         case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':
 307                 return h - 'a' + 10;
 308         default:
 309                 return 0;
 310         }
 311 }
 312
 313 static void cpmac_get_mac(int instance, unsigned char *dev_addr)
 314 {
 315         int i;
 316         char name[5], default_mac[] = "00:00:00:12:34:56", *mac;
 317
 318         mac = NULL;
 319         sprintf(name, "mac%c", 'a' + instance);
 320         mac = prom_getenv(name);
 321         if (!mac) {
 322                 sprintf(name, "mac%c", 'a');
 323                 mac = prom_getenv(name);
 324         }
 325         if (!mac)
 326                 mac = default_mac;
 327         for (i = 0; i < 6; i++)
 328                 dev_addr[i] = (char2hex(mac[i * 3]) << 4) +
 329                         char2hex(mac[i * 3 + 1]);
 330 }
 331
 332 static int __init ar7_register_devices(void)
 333 {
 334         int res;
 335
 336 #ifdef CONFIG_SERIAL_8250
 337
 338         static struct uart_port uart_port[2];
 339
 340         memset(uart_port, 0, sizeof(struct uart_port) * 2);
 341
 342         uart_port[0].type = PORT_AR7;
 343         uart_port[0].line = 0;
 344         uart_port[0].irq = AR7_IRQ_UART0;
 345         uart_port[0].uartclk = ar7_bus_freq() / 2;
 346         uart_port[0].iotype = UPIO_MEM;
 347         uart_port[0].mapbase = AR7_REGS_UART0;
 348         uart_port[0].membase = ioremap(uart_port[0].mapbase, 256);
 349         uart_port[0].regshift = 2;
 350         res = early_serial_setup(&uart_port[0]);
 351         if (res)
 352                 return res;
 353
 354
 355         /* Only TNETD73xx have a second serial port */
 356         if (ar7_has_second_uart()) {
 357                 uart_port[1].type = PORT_AR7;
 358                 uart_port[1].line = 1;
 359                 uart_port[1].irq = AR7_IRQ_UART1;
 360                 uart_port[1].uartclk = ar7_bus_freq() / 2;
 361                 uart_port[1].iotype = UPIO_MEM;
 362                 uart_port[1].mapbase = UR8_REGS_UART1;
 363                 uart_port[1].membase = ioremap(uart_port[1].mapbase, 256);
 364                 uart_port[1].regshift = 2;
 365                 res = early_serial_setup(&uart_port[1]);
 366                 if (res)
 367                         return res;
 368         }
 369
 370 #else /* !CONFIG_SERIAL_8250 */
 371
 372         uart_data[0].uartclk = ar7_bus_freq() / 2;
 373         uart_data[1].uartclk = uart_data[0].uartclk;
 374
 375         /* Only TNETD73xx have a second serial port */
 376         if (ar7_has_second_uart())
 377                 uart.dev.platform_data = uart_data;
 378
 379         res = platform_device_register(&uart);
 380         if (res)
 381                 return res;
 382
 383 #endif /* CONFIG_SERIAL_8250 */
 384
 385         res = platform_device_register(&physmap_flash);
 386         if (res)
 387                 return res;
 388
 389         res = platform_device_register(&vlynq_low);
 390         if (res)
 391                 return res;
 392
 393         ar7_device_disable(vlynq_low_data.reset_bit);
 394         if (ar7_has_high_vlynq()) {
 395                 ar7_device_disable(vlynq_high_data.reset_bit);
 396                 res = platform_device_register(&vlynq_high);
 397                 if (res)
 398                         return res;
 399         }
 400
 401         if (ar7_has_high_cpmac()) {
 402                 cpmac_get_mac(1, cpmac_high_data.dev_addr);
 403                 res = platform_device_register(&cpmac_high);
 404                 if (res)
 405                         return res;
 406         } else {
 407                 cpmac_low_data.phy_mask = 0xffffffff;
 408         }
 409
 410         cpmac_get_mac(0, cpmac_low_data.dev_addr);
 411         res = platform_device_register(&cpmac_low);
 412
 413         return res;
 414 }
 415
 416
 417 arch_initcall(ar7_register_devices);