[ar71xx] add experimental support for the Linksys WRT400N board (thanks to netprince)
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ar71xx / ar71xx.c
1 /*
2 * AR71xx SoC routines
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/types.h>
15
16 #include <asm/mach-ar71xx/ar71xx.h>
17
18 void __iomem *ar71xx_ddr_base;
19 EXPORT_SYMBOL_GPL(ar71xx_ddr_base);
20
21 void __iomem *ar71xx_pll_base;
22 EXPORT_SYMBOL_GPL(ar71xx_pll_base);
23
24 void __iomem *ar71xx_reset_base;
25 EXPORT_SYMBOL_GPL(ar71xx_reset_base);
26
27 void __iomem *ar71xx_gpio_base;
28 EXPORT_SYMBOL_GPL(ar71xx_gpio_base);
29
30 void __iomem *ar71xx_usb_ctrl_base;
31 EXPORT_SYMBOL_GPL(ar71xx_usb_ctrl_base);
32
33 void ar71xx_device_stop(u32 mask)
34 {
35 unsigned long flags;
36 u32 t;
37
38 switch (ar71xx_soc) {
39 case AR71XX_SOC_AR7130:
40 case AR71XX_SOC_AR7141:
41 case AR71XX_SOC_AR7161:
42 local_irq_save(flags);
43 t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
44 ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t | mask);
45 local_irq_restore(flags);
46 break;
47
48 case AR71XX_SOC_AR9130:
49 case AR71XX_SOC_AR9132:
50 local_irq_save(flags);
51 t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
52 ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t | mask);
53 local_irq_restore(flags);
54 break;
55
56 default:
57 BUG();
58 }
59 }
60 EXPORT_SYMBOL_GPL(ar71xx_device_stop);
61
62 void ar71xx_device_start(u32 mask)
63 {
64 unsigned long flags;
65 u32 t;
66
67 switch (ar71xx_soc) {
68 case AR71XX_SOC_AR7130:
69 case AR71XX_SOC_AR7141:
70 case AR71XX_SOC_AR7161:
71 local_irq_save(flags);
72 t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
73 ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t & ~mask);
74 local_irq_restore(flags);
75 break;
76
77 case AR71XX_SOC_AR9130:
78 case AR71XX_SOC_AR9132:
79 local_irq_save(flags);
80 t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
81 ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t & ~mask);
82 local_irq_restore(flags);
83 break;
84
85 default:
86 BUG();
87 }
88 }
89 EXPORT_SYMBOL_GPL(ar71xx_device_start);
90
91 void ar71xx_ddr_flush(u32 reg)
92 {
93 ar71xx_ddr_wr(reg, 1);
94 while ((ar71xx_ddr_rr(reg) & 0x1));
95
96 ar71xx_ddr_wr(reg, 1);
97 while ((ar71xx_ddr_rr(reg) & 0x1));
98 }
99 EXPORT_SYMBOL_GPL(ar71xx_ddr_flush);
100