ar71xx: add usb support for ubnt rocket m
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ar71xx / ar71xx.c
1 /*
2 * AR71xx SoC routines
3 *
4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/types.h>
15 #include <linux/mutex.h>
16
17 #include <asm/mach-ar71xx/ar71xx.h>
18
19 static DEFINE_MUTEX(ar71xx_flash_mutex);
20
21 void __iomem *ar71xx_ddr_base;
22 EXPORT_SYMBOL_GPL(ar71xx_ddr_base);
23
24 void __iomem *ar71xx_pll_base;
25 EXPORT_SYMBOL_GPL(ar71xx_pll_base);
26
27 void __iomem *ar71xx_reset_base;
28 EXPORT_SYMBOL_GPL(ar71xx_reset_base);
29
30 void __iomem *ar71xx_gpio_base;
31 EXPORT_SYMBOL_GPL(ar71xx_gpio_base);
32
33 void __iomem *ar71xx_usb_ctrl_base;
34 EXPORT_SYMBOL_GPL(ar71xx_usb_ctrl_base);
35
36 void ar71xx_device_stop(u32 mask)
37 {
38 unsigned long flags;
39 u32 mask_inv;
40 u32 t;
41
42 switch (ar71xx_soc) {
43 case AR71XX_SOC_AR7130:
44 case AR71XX_SOC_AR7141:
45 case AR71XX_SOC_AR7161:
46 local_irq_save(flags);
47 t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
48 ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t | mask);
49 local_irq_restore(flags);
50 break;
51
52 case AR71XX_SOC_AR7240:
53 mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
54 local_irq_save(flags);
55 t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
56 t |= mask;
57 t &= ~mask_inv;
58 ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
59 local_irq_restore(flags);
60 break;
61
62 case AR71XX_SOC_AR9130:
63 case AR71XX_SOC_AR9132:
64 local_irq_save(flags);
65 t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
66 ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t | mask);
67 local_irq_restore(flags);
68 break;
69
70 default:
71 BUG();
72 }
73 }
74 EXPORT_SYMBOL_GPL(ar71xx_device_stop);
75
76 void ar71xx_device_start(u32 mask)
77 {
78 unsigned long flags;
79 u32 mask_inv;
80 u32 t;
81
82 switch (ar71xx_soc) {
83 case AR71XX_SOC_AR7130:
84 case AR71XX_SOC_AR7141:
85 case AR71XX_SOC_AR7161:
86 local_irq_save(flags);
87 t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
88 ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t & ~mask);
89 local_irq_restore(flags);
90 break;
91
92 case AR71XX_SOC_AR7240:
93 mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
94 local_irq_save(flags);
95 t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
96 t &= ~mask;
97 t |= mask_inv;
98 ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
99 local_irq_restore(flags);
100 break;
101
102 case AR71XX_SOC_AR9130:
103 case AR71XX_SOC_AR9132:
104 local_irq_save(flags);
105 t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
106 ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t & ~mask);
107 local_irq_restore(flags);
108 break;
109
110 default:
111 BUG();
112 }
113 }
114 EXPORT_SYMBOL_GPL(ar71xx_device_start);
115
116 void ar71xx_ddr_flush(u32 reg)
117 {
118 ar71xx_ddr_wr(reg, 1);
119 while ((ar71xx_ddr_rr(reg) & 0x1));
120
121 ar71xx_ddr_wr(reg, 1);
122 while ((ar71xx_ddr_rr(reg) & 0x1));
123 }
124 EXPORT_SYMBOL_GPL(ar71xx_ddr_flush);
125
126 void ar71xx_flash_acquire(void)
127 {
128 mutex_lock(&ar71xx_flash_mutex);
129 }
130 EXPORT_SYMBOL_GPL(ar71xx_flash_acquire);
131
132 void ar71xx_flash_release(void)
133 {
134 mutex_unlock(&ar71xx_flash_mutex);
135 }
136 EXPORT_SYMBOL_GPL(ar71xx_flash_release);