target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c

   1 /*
   2  *  Atheros AR71xx SoC GPIO API support
   3  *
   4  *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify it
   8  *  under the terms of the GNU General Public License version 2 as published
   9  *  by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/module.h>
  15 #include <linux/types.h>
  16 #include <linux/spinlock.h>
  17 #include <linux/io.h>
  18 #include <linux/ioport.h>
  19 #include <linux/gpio.h>
  20
  21 #include <asm/mach-ar71xx/ar71xx.h>
  22
  23 static DEFINE_SPINLOCK(ar71xx_gpio_lock);
  24
  25 void __ar71xx_gpio_set_value(unsigned gpio, int value)
  26 {
  27         unsigned long flags;
  28
  29         spin_lock_irqsave(&ar71xx_gpio_lock, flags);
  30
  31         if (value)
  32                 ar71xx_gpio_wr(GPIO_REG_SET, (1 << gpio));
  33         else
  34                 ar71xx_gpio_wr(GPIO_REG_CLEAR, (1 << gpio));
  35
  36         spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
  37 }
  38 EXPORT_SYMBOL(__ar71xx_gpio_set_value);
  39
  40 int __ar71xx_gpio_get_value(unsigned gpio)
  41 {
  42         return (ar71xx_gpio_rr(GPIO_REG_IN) & (1 << gpio)) ? 1 : 0;
  43 }
  44 EXPORT_SYMBOL(__ar71xx_gpio_get_value);
  45
  46 static int ar71xx_gpio_get_value(struct gpio_chip *chip, unsigned offset)
  47 {
  48         return __ar71xx_gpio_get_value(offset);
  49 }
  50
  51 static void ar71xx_gpio_set_value(struct gpio_chip *chip,
  52                                   unsigned offset, int value)
  53 {
  54         __ar71xx_gpio_set_value(offset, value);
  55 }
  56
  57 static int ar71xx_gpio_direction_input(struct gpio_chip *chip,
  58                                        unsigned offset)
  59 {
  60         unsigned long flags;
  61
  62         spin_lock_irqsave(&ar71xx_gpio_lock, flags);
  63
  64         ar71xx_gpio_wr(GPIO_REG_OE,
  65                         ar71xx_gpio_rr(GPIO_REG_OE) & ~(1 << offset));
  66
  67         spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
  68
  69         return 0;
  70 }
  71
  72 static int ar71xx_gpio_direction_output(struct gpio_chip *chip,
  73                                         unsigned offset, int value)
  74 {
  75         unsigned long flags;
  76
  77         spin_lock_irqsave(&ar71xx_gpio_lock, flags);
  78
  79         if (value)
  80                 ar71xx_gpio_wr(GPIO_REG_SET, (1 << offset));
  81         else
  82                 ar71xx_gpio_wr(GPIO_REG_CLEAR, (1 << offset));
  83
  84         ar71xx_gpio_wr(GPIO_REG_OE,
  85                         ar71xx_gpio_rr(GPIO_REG_OE) | (1 << offset));
  86
  87         spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
  88
  89         return 0;
  90 }
  91
  92 static struct gpio_chip ar71xx_gpio_chip = {
  93         .label                  = "ar71xx",
  94         .get                    = ar71xx_gpio_get_value,
  95         .set                    = ar71xx_gpio_set_value,
  96         .direction_input        = ar71xx_gpio_direction_input,
  97         .direction_output       = ar71xx_gpio_direction_output,
  98         .base                   = 0,
  99         .ngpio                  = AR71XX_GPIO_COUNT,
 100 };
 101
 102 void ar71xx_gpio_function_enable(u32 mask)
 103 {
 104         unsigned long flags;
 105
 106         spin_lock_irqsave(&ar71xx_gpio_lock, flags);
 107
 108         ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) | mask);
 109
 110         spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
 111 }
 112
 113 void ar71xx_gpio_function_disable(u32 mask)
 114 {
 115         unsigned long flags;
 116
 117         spin_lock_irqsave(&ar71xx_gpio_lock, flags);
 118
 119         ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) & ~mask);
 120
 121         spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
 122 }
 123
 124 void __init ar71xx_gpio_init(void)
 125 {
 126         int err;
 127
 128         if (!request_mem_region(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
 129                                 "AR71xx GPIO controller"))
 130                 panic("cannot allocate AR71xx GPIO registers page");
 131
 132         err = gpiochip_add(&ar71xx_gpio_chip);
 133         if (err)
 134                 panic("cannot add AR71xx GPIO chip, error=%d", err);
 135 }