c5b2d3abd87def17430d08cd4746c20da308ebfc
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ar71xx / mach-ap96.c
1 /*
2 * Atheros AP96 board support
3 *
4 * Copyright (C) 2009 Marco Porsch
5 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2010 Atheros Communications
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13 #include <linux/platform_device.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/delay.h>
17
18 #include <asm/mach-ar71xx/ar71xx.h>
19
20 #include "machtype.h"
21 #include "devices.h"
22 #include "dev-m25p80.h"
23 #include "dev-ap94-pci.h"
24 #include "dev-gpio-buttons.h"
25 #include "dev-leds-gpio.h"
26 #include "dev-usb.h"
27
28 #define AP96_GPIO_LED_12_GREEN 0
29 #define AP96_GPIO_LED_3_GREEN 1
30 #define AP96_GPIO_LED_2_GREEN 2
31 #define AP96_GPIO_LED_WPS_GREEN 4
32 #define AP96_GPIO_LED_5_GREEN 5
33 #define AP96_GPIO_LED_4_ORANGE 6
34
35 /* Reset button - next to the power connector */
36 #define AP96_GPIO_BTN_RESET 3
37 /* WPS button - next to a led on right */
38 #define AP96_GPIO_BTN_WPS 8
39
40 #define AP96_BUTTONS_POLL_INTERVAL 20
41
42 #define AP96_WMAC0_MAC_OFFSET 0x120c
43 #define AP96_WMAC1_MAC_OFFSET 0x520c
44 #define AP96_CALDATA0_OFFSET 0x1000
45 #define AP96_CALDATA1_OFFSET 0x5000
46
47 #ifdef CONFIG_MTD_PARTITIONS
48 static struct mtd_partition ap96_partitions[] = {
49 {
50 .name = "uboot",
51 .offset = 0,
52 .size = 0x030000,
53 .mask_flags = MTD_WRITEABLE,
54 } , {
55 .name = "env",
56 .offset = 0x030000,
57 .size = 0x010000,
58 .mask_flags = MTD_WRITEABLE,
59 } , {
60 .name = "rootfs",
61 .offset = 0x040000,
62 .size = 0x600000,
63 } , {
64 .name = "uImage",
65 .offset = 0x640000,
66 .size = 0x1b0000,
67 } , {
68 .name = "caldata",
69 .offset = 0x7f0000,
70 .size = 0x010000,
71 .mask_flags = MTD_WRITEABLE,
72 }
73 };
74 #endif /* CONFIG_MTD_PARTITIONS */
75
76 static struct flash_platform_data ap96_flash_data = {
77 #ifdef CONFIG_MTD_PARTITIONS
78 .parts = ap96_partitions,
79 .nr_parts = ARRAY_SIZE(ap96_partitions),
80 #endif
81 };
82
83 /*
84 * AP96 has 12 unlabeled leds in the front; these are numbered from 1 to 12
85 * below (from left to right on the board). Led 1 seems to be on whenever the
86 * board is powered. Led 11 shows LAN link activity actity. Led 3 is orange;
87 * others are green.
88 *
89 * In addition, there is one led next to a button on the right side for WPS.
90 */
91 static struct gpio_led ap96_leds_gpio[] __initdata = {
92 {
93 .name = "ap96:green:led2",
94 .gpio = AP96_GPIO_LED_2_GREEN,
95 .active_low = 1,
96 }, {
97 .name = "ap96:green:led3",
98 .gpio = AP96_GPIO_LED_3_GREEN,
99 .active_low = 1,
100 }, {
101 .name = "ap96:orange:led4",
102 .gpio = AP96_GPIO_LED_4_ORANGE,
103 .active_low = 1,
104 }, {
105 .name = "ap96:green:led5",
106 .gpio = AP96_GPIO_LED_5_GREEN,
107 .active_low = 1,
108 }, {
109 .name = "ap96:green:led12",
110 .gpio = AP96_GPIO_LED_12_GREEN,
111 .active_low = 1,
112 }, { /* next to a button on right */
113 .name = "ap96:green:wps",
114 .gpio = AP96_GPIO_LED_WPS_GREEN,
115 .active_low = 1,
116 }
117 };
118
119 static struct gpio_button ap96_gpio_buttons[] __initdata = {
120 {
121 .desc = "reset",
122 .type = EV_KEY,
123 .code = KEY_RESTART,
124 .threshold = 3,
125 .gpio = AP96_GPIO_BTN_RESET,
126 .active_low = 1,
127 }, {
128 .desc = "wps",
129 .type = EV_KEY,
130 .code = KEY_WPS_BUTTON,
131 .threshold = 3,
132 .gpio = AP96_GPIO_BTN_WPS,
133 .active_low = 1,
134 }
135 };
136
137 #define AP96_WAN_PHYMASK 0x10
138 #define AP96_LAN_PHYMASK 0x0f
139
140 static void __init ap96_setup(void)
141 {
142 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
143
144 ar71xx_add_device_mdio(~(AP96_WAN_PHYMASK | AP96_LAN_PHYMASK));
145
146 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, art, 0);
147 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
148 ar71xx_eth0_data.phy_mask = AP96_LAN_PHYMASK;
149 ar71xx_eth0_data.speed = SPEED_1000;
150 ar71xx_eth0_data.duplex = DUPLEX_FULL;
151
152 ar71xx_add_device_eth(0);
153
154 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, art, 1);
155 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
156 ar71xx_eth1_data.phy_mask = AP96_WAN_PHYMASK;
157
158 ar71xx_eth1_pll_data.pll_1000 = 0x1f000000;
159
160 ar71xx_add_device_eth(1);
161
162 ar71xx_add_device_usb();
163
164 ar71xx_add_device_m25p80(&ap96_flash_data);
165
166 ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ap96_leds_gpio),
167 ap96_leds_gpio);
168
169 ar71xx_add_device_gpio_buttons(-1, AP96_BUTTONS_POLL_INTERVAL,
170 ARRAY_SIZE(ap96_gpio_buttons),
171 ap96_gpio_buttons);
172
173 ap94_pci_init(art + AP96_CALDATA0_OFFSET,
174 art + AP96_WMAC0_MAC_OFFSET,
175 art + AP96_CALDATA1_OFFSET,
176 art + AP96_WMAC1_MAC_OFFSET);
177 }
178
179 MIPS_MACHINE(AR71XX_MACH_AP96, "AP96", "Atheros AP96", ap96_setup);