ar71xx: build ALFA AP96 images with default profile as well
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ar71xx / mach-dir-825-b1.c
1 /*
2 * D-Link DIR-825 rev. B1 board support
3 *
4 * Copyright (C) 2009-2011 Lukas Kuna, Evkanet, s.r.o.
5 *
6 * based on mach-wndr3700.c
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13 #include <linux/platform_device.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/delay.h>
17 #include <linux/rtl8366.h>
18
19 #include <asm/mach-ar71xx/ar71xx.h>
20
21 #include "machtype.h"
22 #include "devices.h"
23 #include "dev-m25p80.h"
24 #include "dev-ap94-pci.h"
25 #include "dev-gpio-buttons.h"
26 #include "dev-leds-gpio.h"
27 #include "dev-usb.h"
28
29 #define DIR825B1_GPIO_LED_BLUE_USB 0
30 #define DIR825B1_GPIO_LED_ORANGE_POWER 1
31 #define DIR825B1_GPIO_LED_BLUE_POWER 2
32 #define DIR825B1_GPIO_LED_BLUE_WPS 4
33 #define DIR825B1_GPIO_LED_ORANGE_PLANET 6
34 #define DIR825B1_GPIO_LED_BLUE_PLANET 11
35
36 #define DIR825B1_GPIO_BTN_RESET 3
37 #define DIR825B1_GPIO_BTN_WPS 8
38
39 #define DIR825B1_GPIO_RTL8366_SDA 5
40 #define DIR825B1_GPIO_RTL8366_SCK 7
41
42 #define DIR825B1_KEYS_POLL_INTERVAL 20 /* msecs */
43 #define DIR825B1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825B1_KEYS_POLL_INTERVAL)
44
45 #define DIR825B1_CAL_LOCATION_0 0x1f661000
46 #define DIR825B1_CAL_LOCATION_1 0x1f665000
47
48 #define DIR825B1_MAC_LOCATION_0 0x1f66ffa0
49 #define DIR825B1_MAC_LOCATION_1 0x1f66ffb4
50
51 #ifdef CONFIG_MTD_PARTITIONS
52 static struct mtd_partition dir825b1_partitions[] = {
53 {
54 .name = "uboot",
55 .offset = 0,
56 .size = 0x040000,
57 .mask_flags = MTD_WRITEABLE,
58 }, {
59 .name = "config",
60 .offset = 0x040000,
61 .size = 0x010000,
62 .mask_flags = MTD_WRITEABLE,
63 }, {
64 .name = "firmware",
65 .offset = 0x050000,
66 .size = 0x610000,
67 }, {
68 .name = "caldata",
69 .offset = 0x660000,
70 .size = 0x010000,
71 .mask_flags = MTD_WRITEABLE,
72 }, {
73 .name = "unknown",
74 .offset = 0x670000,
75 .size = 0x190000,
76 .mask_flags = MTD_WRITEABLE,
77 }
78 };
79 #endif /* CONFIG_MTD_PARTITIONS */
80
81 static struct flash_platform_data dir825b1_flash_data = {
82 #ifdef CONFIG_MTD_PARTITIONS
83 .parts = dir825b1_partitions,
84 .nr_parts = ARRAY_SIZE(dir825b1_partitions),
85 #endif
86 };
87
88 static struct gpio_led dir825b1_leds_gpio[] __initdata = {
89 {
90 .name = "dir825b1:blue:usb",
91 .gpio = DIR825B1_GPIO_LED_BLUE_USB,
92 .active_low = 1,
93 }, {
94 .name = "dir825b1:orange:power",
95 .gpio = DIR825B1_GPIO_LED_ORANGE_POWER,
96 .active_low = 1,
97 }, {
98 .name = "dir825b1:blue:power",
99 .gpio = DIR825B1_GPIO_LED_BLUE_POWER,
100 .active_low = 1,
101 }, {
102 .name = "dir825b1:blue:wps",
103 .gpio = DIR825B1_GPIO_LED_BLUE_WPS,
104 .active_low = 1,
105 }, {
106 .name = "dir825b1:orange:planet",
107 .gpio = DIR825B1_GPIO_LED_ORANGE_PLANET,
108 .active_low = 1,
109 }, {
110 .name = "dir825b1:blue:planet",
111 .gpio = DIR825B1_GPIO_LED_BLUE_PLANET,
112 .active_low = 1,
113 }
114 };
115
116 static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = {
117 {
118 .desc = "reset",
119 .type = EV_KEY,
120 .code = KEY_RESTART,
121 .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
122 .gpio = DIR825B1_GPIO_BTN_RESET,
123 .active_low = 1,
124 }, {
125 .desc = "wps",
126 .type = EV_KEY,
127 .code = KEY_WPS_BUTTON,
128 .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
129 .gpio = DIR825B1_GPIO_BTN_WPS,
130 .active_low = 1,
131 }
132 };
133
134 static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = {
135 { .reg = 0x06, .val = 0x0108 },
136 };
137
138 static struct rtl8366_platform_data dir825b1_rtl8366s_data = {
139 .gpio_sda = DIR825B1_GPIO_RTL8366_SDA,
140 .gpio_sck = DIR825B1_GPIO_RTL8366_SCK,
141 .num_initvals = ARRAY_SIZE(dir825b1_rtl8366s_initvals),
142 .initvals = dir825b1_rtl8366s_initvals,
143 };
144
145 static struct platform_device dir825b1_rtl8366s_device = {
146 .name = RTL8366S_DRIVER_NAME,
147 .id = -1,
148 .dev = {
149 .platform_data = &dir825b1_rtl8366s_data,
150 }
151 };
152
153 static void dir825b1_read_ascii_mac(u8 *dest, unsigned int src_addr)
154 {
155 int ret;
156 u8 *src = (u8 *)KSEG1ADDR(src_addr);
157
158 ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
159 &dest[0], &dest[1], &dest[2],
160 &dest[3], &dest[4], &dest[5]);
161
162 if (ret != ETH_ALEN) memset(dest, 0, ETH_ALEN);
163 }
164
165 static void __init dir825b1_setup(void)
166 {
167 u8 mac1[ETH_ALEN], mac2[ETH_ALEN];
168
169 dir825b1_read_ascii_mac(mac1, DIR825B1_MAC_LOCATION_0);
170 dir825b1_read_ascii_mac(mac2, DIR825B1_MAC_LOCATION_1);
171
172 ar71xx_add_device_mdio(0, 0x0);
173
174 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac1, 2);
175 ar71xx_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
176 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
177 ar71xx_eth0_data.speed = SPEED_1000;
178 ar71xx_eth0_data.duplex = DUPLEX_FULL;
179 ar71xx_eth0_pll_data.pll_1000 = 0x11110000;
180
181 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac1, 3);
182 ar71xx_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
183 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
184 ar71xx_eth1_data.phy_mask = 0x10;
185 ar71xx_eth1_pll_data.pll_1000 = 0x11110000;
186
187 ar71xx_add_device_eth(0);
188 ar71xx_add_device_eth(1);
189
190 ar71xx_add_device_m25p80(&dir825b1_flash_data);
191
192 ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
193 dir825b1_leds_gpio);
194
195 ar71xx_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL,
196 ARRAY_SIZE(dir825b1_gpio_keys),
197 dir825b1_gpio_keys);
198
199 ar71xx_add_device_usb();
200
201 platform_device_register(&dir825b1_rtl8366s_device);
202
203 ap94_pci_setup_wmac_led_pin(0, 5);
204 ap94_pci_setup_wmac_led_pin(1, 5);
205
206 ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0), mac1,
207 (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1), mac2);
208 }
209
210 MIPS_MACHINE(AR71XX_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1",
211 dir825b1_setup);