target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr841n.c

   1 /*
   2  *  TP-LINK TL-WR841N board support
   3  *
   4  *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13
  14 #include <asm/mach-ar71xx/ar71xx.h>
  15
  16 #include "machtype.h"
  17 #include "devices.h"
  18 #include "dev-dsa.h"
  19 #include "dev-m25p80.h"
  20 #include "dev-gpio-buttons.h"
  21 #include "dev-pb42-pci.h"
  22 #include "dev-leds-gpio.h"
  23
  24 #define TL_WR841ND_V1_GPIO_LED_SYSTEM           2
  25 #define TL_WR841ND_V1_GPIO_LED_QSS_GREEN        4
  26 #define TL_WR841ND_V1_GPIO_LED_QSS_RED          5
  27
  28 #define TL_WR841ND_V1_GPIO_BTN_RESET    3
  29 #define TL_WR841ND_V1_GPIO_BTN_QSS      7
  30
  31 #define TL_WR841ND_V1_KEYS_POLL_INTERVAL        20      /* msecs */
  32 #define TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL \
  33                                 (3 * TL_WR841ND_V1_KEYS_POLL_INTERVAL)
  34
  35 #ifdef CONFIG_MTD_PARTITIONS
  36 static struct mtd_partition tl_wr841n_v1_partitions[] = {
  37         {
  38                 .name           = "redboot",
  39                 .offset         = 0,
  40                 .size           = 0x020000,
  41                 .mask_flags     = MTD_WRITEABLE,
  42         }, {
  43                 .name           = "kernel",
  44                 .offset         = 0x020000,
  45                 .size           = 0x140000,
  46         }, {
  47                 .name           = "rootfs",
  48                 .offset         = 0x160000,
  49                 .size           = 0x280000,
  50         }, {
  51                 .name           = "config",
  52                 .offset         = 0x3e0000,
  53                 .size           = 0x020000,
  54                 .mask_flags     = MTD_WRITEABLE,
  55         }, {
  56                 .name           = "firmware",
  57                 .offset         = 0x020000,
  58                 .size           = 0x3c0000,
  59         }
  60 };
  61 #endif /* CONFIG_MTD_PARTITIONS */
  62
  63 static struct flash_platform_data tl_wr841n_v1_flash_data = {
  64 #ifdef CONFIG_MTD_PARTITIONS
  65         .parts          = tl_wr841n_v1_partitions,
  66         .nr_parts       = ARRAY_SIZE(tl_wr841n_v1_partitions),
  67 #endif
  68 };
  69
  70 static struct gpio_led tl_wr841n_v1_leds_gpio[] __initdata = {
  71         {
  72                 .name           = "tl-wr841n:green:system",
  73                 .gpio           = TL_WR841ND_V1_GPIO_LED_SYSTEM,
  74                 .active_low     = 1,
  75         }, {
  76                 .name           = "tl-wr841n:red:qss",
  77                 .gpio           = TL_WR841ND_V1_GPIO_LED_QSS_RED,
  78         }, {
  79                 .name           = "tl-wr841n:green:qss",
  80                 .gpio           = TL_WR841ND_V1_GPIO_LED_QSS_GREEN,
  81         }
  82 };
  83
  84 static struct gpio_keys_button tl_wr841n_v1_gpio_keys[] __initdata = {
  85         {
  86                 .desc           = "reset",
  87                 .type           = EV_KEY,
  88                 .code           = KEY_RESTART,
  89                 .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL,
  90                 .gpio           = TL_WR841ND_V1_GPIO_BTN_RESET,
  91                 .active_low     = 1,
  92         }, {
  93                 .desc           = "qss",
  94                 .type           = EV_KEY,
  95                 .code           = KEY_WPS_BUTTON,
  96                 .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL,
  97                 .gpio           = TL_WR841ND_V1_GPIO_BTN_QSS,
  98                 .active_low     = 1,
  99         }
 100 };
 101
 102 static struct dsa_chip_data tl_wr841n_v1_dsa_chip = {
 103         .port_names[0]  = "wan",
 104         .port_names[1]  = "lan1",
 105         .port_names[2]  = "lan2",
 106         .port_names[3]  = "lan3",
 107         .port_names[4]  = "lan4",
 108         .port_names[5]  = "cpu",
 109 };
 110
 111 static struct dsa_platform_data tl_wr841n_v1_dsa_data = {
 112         .nr_chips       = 1,
 113         .chip           = &tl_wr841n_v1_dsa_chip,
 114 };
 115
 116 static void __init tl_wr841n_v1_setup(void)
 117 {
 118         u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
 119
 120         ar71xx_add_device_mdio(0x0);
 121
 122         ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
 123         ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 124         ar71xx_eth0_data.speed = SPEED_100;
 125         ar71xx_eth0_data.duplex = DUPLEX_FULL;
 126
 127         ar71xx_add_device_eth(0);
 128
 129         ar71xx_add_device_dsa(0, &tl_wr841n_v1_dsa_data);
 130
 131         ar71xx_add_device_m25p80(&tl_wr841n_v1_flash_data);
 132
 133         ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v1_leds_gpio),
 134                                         tl_wr841n_v1_leds_gpio);
 135
 136         ar71xx_register_gpio_keys_polled(-1, TL_WR841ND_V1_KEYS_POLL_INTERVAL,
 137                                          ARRAY_SIZE(tl_wr841n_v1_gpio_keys),
 138                                          tl_wr841n_v1_gpio_keys);
 139
 140         pb42_pci_init();
 141 }
 142
 143 MIPS_MACHINE(AR71XX_MACH_TL_WR841N_V1, "TL-WR841N-v1.5", "TP-LINK TL-WR841N v1",
 144              tl_wr841n_v1_setup);