ar71xx: add preliminary support for the Atheros AR933x SoCs
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ar71xx / mach-wrt400n.c
1 /*
2 * Linksys WRT400N board support
3 *
4 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14
15 #include <asm/mach-ar71xx/ar71xx.h>
16
17 #include "machtype.h"
18 #include "devices.h"
19 #include "dev-ap94-pci.h"
20 #include "dev-m25p80.h"
21 #include "dev-gpio-buttons.h"
22 #include "dev-leds-gpio.h"
23
24 #define WRT400N_GPIO_LED_ORANGE 5
25 #define WRT400N_GPIO_LED_GREEN 4
26 #define WRT400N_GPIO_LED_POWER 1
27 #define WRT400N_GPIO_LED_WLAN 0
28
29 #define WRT400N_GPIO_BTN_RESET 8
30 #define WRT400N_GPIO_BTN_WLSEC 3
31
32 #define WRT400N_KEYS_POLL_INTERVAL 20 /* msecs */
33 #define WRT400N_KEYS_DEBOUNE_INTERVAL (3 * WRT400N_KEYS_POLL_INTERVAL)
34
35 #define WRT400N_MAC_ADDR_OFFSET 0x120c
36 #define WRT400N_CALDATA0_OFFSET 0x1000
37 #define WRT400N_CALDATA1_OFFSET 0x5000
38
39 #ifdef CONFIG_MTD_PARTITIONS
40 static struct mtd_partition wrt400n_partitions[] = {
41 {
42 .name = "uboot",
43 .offset = 0,
44 .size = 0x030000,
45 .mask_flags = MTD_WRITEABLE,
46 }, {
47 .name = "env",
48 .offset = 0x030000,
49 .size = 0x010000,
50 .mask_flags = MTD_WRITEABLE,
51 }, {
52 .name = "linux",
53 .offset = 0x040000,
54 .size = 0x140000,
55 }, {
56 .name = "rootfs",
57 .offset = 0x180000,
58 .size = 0x630000,
59 }, {
60 .name = "nvram",
61 .offset = 0x7b0000,
62 .size = 0x010000,
63 .mask_flags = MTD_WRITEABLE,
64 }, {
65 .name = "factory",
66 .offset = 0x7c0000,
67 .size = 0x010000,
68 .mask_flags = MTD_WRITEABLE,
69 }, {
70 .name = "language",
71 .offset = 0x7d0000,
72 .size = 0x020000,
73 .mask_flags = MTD_WRITEABLE,
74 }, {
75 .name = "caldata",
76 .offset = 0x7f0000,
77 .size = 0x010000,
78 .mask_flags = MTD_WRITEABLE,
79 }, {
80 .name = "firmware",
81 .offset = 0x040000,
82 .size = 0x770000,
83 }
84 };
85 #endif /* CONFIG_MTD_PARTITIONS */
86
87 static struct flash_platform_data wrt400n_flash_data = {
88 #ifdef CONFIG_MTD_PARTITIONS
89 .parts = wrt400n_partitions,
90 .nr_parts = ARRAY_SIZE(wrt400n_partitions),
91 #endif
92 };
93
94 static struct gpio_led wrt400n_leds_gpio[] __initdata = {
95 {
96 .name = "wrt400n:green:status",
97 .gpio = WRT400N_GPIO_LED_GREEN,
98 .active_low = 1,
99 }, {
100 .name = "wrt400n:amber:aoss",
101 .gpio = WRT400N_GPIO_LED_ORANGE,
102 .active_low = 1,
103 }, {
104 .name = "wrt400n:green:wlan",
105 .gpio = WRT400N_GPIO_LED_WLAN,
106 .active_low = 1,
107 }, {
108 .name = "wrt400n:green:power",
109 .gpio = WRT400N_GPIO_LED_POWER,
110 .active_low = 1,
111 }
112 };
113
114 static struct gpio_keys_button wrt400n_gpio_keys[] __initdata = {
115 {
116 .desc = "reset",
117 .type = EV_KEY,
118 .code = KEY_RESTART,
119 .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL,
120 .gpio = WRT400N_GPIO_BTN_RESET,
121 .active_low = 1,
122 }, {
123 .desc = "wlsec",
124 .type = EV_KEY,
125 .code = KEY_WPS_BUTTON,
126 .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL,
127 .gpio = WRT400N_GPIO_BTN_WLSEC,
128 .active_low = 1,
129 }
130 };
131
132 static void __init wrt400n_setup(void)
133 {
134 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
135 u8 *mac = art + WRT400N_MAC_ADDR_OFFSET;
136
137 ar71xx_add_device_mdio(0x0);
138
139 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 1);
140 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
141 ar71xx_eth0_data.speed = SPEED_100;
142 ar71xx_eth0_data.duplex = DUPLEX_FULL;
143
144 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 2);
145 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
146 ar71xx_eth1_data.phy_mask = 0x10;
147
148 ar71xx_add_device_eth(0);
149 ar71xx_add_device_eth(1);
150
151 ar71xx_add_device_m25p80(&wrt400n_flash_data);
152
153 ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wrt400n_leds_gpio),
154 wrt400n_leds_gpio);
155
156 ar71xx_register_gpio_keys_polled(-1, WRT400N_KEYS_POLL_INTERVAL,
157 ARRAY_SIZE(wrt400n_gpio_keys),
158 wrt400n_gpio_keys);
159
160 ap94_pci_init(art + WRT400N_CALDATA0_OFFSET, NULL,
161 art + WRT400N_CALDATA1_OFFSET, NULL);
162 }
163
164 MIPS_MACHINE(AR71XX_MACH_WRT400N, "WRT400N", "Linksys WRT400N", wrt400n_setup);