projects / openwrt / svn-archive / archive.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
[ar71xx] parse dot-separated MAC address (patch by Jonas <jmajau@ubnt.com>)
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ar71xx / platform.c
1 /*
2 * Atheros AR71xx SoC platform devices
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * Parts of this file are based on Atheros' 2.6.15 BSP
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
20 #include <linux/serial_8250.h>
21 #include <linux/ath9k_platform.h>
22
23 #include <asm/mach-ar71xx/ar71xx.h>
24 #include <asm/mach-ar71xx/platform.h>
25
26 static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
27
28 /*
29 * OHCI (USB full speed host controller)
30 */
31 static struct resource ar71xx_ohci_resources[] = {
32 [0] = {
33 .start = AR71XX_OHCI_BASE,
34 .end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
35 .flags = IORESOURCE_MEM,
36 },
37 [1] = {
38 .start = AR71XX_MISC_IRQ_OHCI,
39 .end = AR71XX_MISC_IRQ_OHCI,
40 .flags = IORESOURCE_IRQ,
41 },
42 };
43
44 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
45 static struct platform_device ar71xx_ohci_device = {
46 .name = "ar71xx-ohci",
47 .id = -1,
48 .resource = ar71xx_ohci_resources,
49 .num_resources = ARRAY_SIZE(ar71xx_ohci_resources),
50 .dev = {
51 .dma_mask = &ar71xx_ohci_dmamask,
52 .coherent_dma_mask = DMA_BIT_MASK(32),
53 },
54 };
55
56 /*
57 * EHCI (USB full speed host controller)
58 */
59 static struct resource ar71xx_ehci_resources[] = {
60 [0] = {
61 .start = AR71XX_EHCI_BASE,
62 .end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
63 .flags = IORESOURCE_MEM,
64 },
65 [1] = {
66 .start = AR71XX_CPU_IRQ_USB,
67 .end = AR71XX_CPU_IRQ_USB,
68 .flags = IORESOURCE_IRQ,
69 },
70 };
71
72
73 static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
74 static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
75
76 static struct platform_device ar71xx_ehci_device = {
77 .name = "ar71xx-ehci",
78 .id = -1,
79 .resource = ar71xx_ehci_resources,
80 .num_resources = ARRAY_SIZE(ar71xx_ehci_resources),
81 .dev = {
82 .dma_mask = &ar71xx_ehci_dmamask,
83 .coherent_dma_mask = DMA_BIT_MASK(32),
84 .platform_data = &ar71xx_ehci_data,
85 },
86 };
87
88 #define AR71XX_USB_RESET_MASK \
89 (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
90 | RESET_MODULE_USB_OHCI_DLL)
91
92 static void ar71xx_usb_setup(void)
93 {
94 ar71xx_device_stop(AR71XX_USB_RESET_MASK);
95 mdelay(1000);
96 ar71xx_device_start(AR71XX_USB_RESET_MASK);
97
98 /* Turning on the Buff and Desc swap bits */
99 ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
100
101 /* WAR for HW bug. Here it adjusts the duration between two SOFS */
102 ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
103
104 mdelay(900);
105 }
106
107 static void ar91xx_usb_setup(void)
108 {
109 ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
110 mdelay(10);
111
112 ar71xx_device_start(RESET_MODULE_USB_HOST);
113 mdelay(10);
114
115 ar71xx_device_start(RESET_MODULE_USB_PHY);
116 mdelay(10);
117 }
118
119 void __init ar71xx_add_device_usb(void)
120 {
121 switch (ar71xx_soc) {
122 case AR71XX_SOC_AR7130:
123 case AR71XX_SOC_AR7141:
124 case AR71XX_SOC_AR7161:
125 ar71xx_usb_setup();
126 platform_device_register(&ar71xx_ohci_device);
127 platform_device_register(&ar71xx_ehci_device);
128 break;
129
130 case AR71XX_SOC_AR9130:
131 case AR71XX_SOC_AR9132:
132 ar91xx_usb_setup();
133 ar71xx_ehci_data.is_ar91xx = 1;
134 platform_device_register(&ar71xx_ehci_device);
135 break;
136
137 default:
138 BUG();
139 }
140 }
141
142 #ifndef CONFIG_AR71XX_EARLY_SERIAL
143 static struct resource ar71xx_uart_resources[] = {
144 {
145 .start = AR71XX_UART_BASE,
146 .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
147 .flags = IORESOURCE_MEM,
148 },
149 };
150
151 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
152 static struct plat_serial8250_port ar71xx_uart_data[] = {
153 {
154 .mapbase = AR71XX_UART_BASE,
155 .irq = AR71XX_MISC_IRQ_UART,
156 .flags = AR71XX_UART_FLAGS,
157 .iotype = UPIO_MEM32,
158 .regshift = 2,
159 }, {
160 /* terminating entry */
161 }
162 };
163
164 static struct platform_device ar71xx_uart_device = {
165 .name = "serial8250",
166 .id = PLAT8250_DEV_PLATFORM,
167 .resource = ar71xx_uart_resources,
168 .num_resources = ARRAY_SIZE(ar71xx_uart_resources),
169 .dev = {
170 .platform_data = ar71xx_uart_data
171 },
172 };
173
174 void __init ar71xx_add_device_uart(void)
175 {
176 ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
177 platform_device_register(&ar71xx_uart_device);
178 }
179 #endif /* CONFIG_AR71XX_EARLY_SERIAL */
180
181 static struct resource ar71xx_mdio_resources[] = {
182 {
183 .name = "mdio_base",
184 .flags = IORESOURCE_MEM,
185 .start = AR71XX_GE0_BASE + 0x20,
186 .end = AR71XX_GE0_BASE + 0x38 - 1,
187 }
188 };
189
190 static struct ag71xx_mdio_platform_data ar71xx_mdio_data = {
191 .phy_mask = 0xffffffff,
192 };
193
194 static struct platform_device ar71xx_mdio_device = {
195 .name = "ag71xx-mdio",
196 .id = -1,
197 .resource = ar71xx_mdio_resources,
198 .num_resources = ARRAY_SIZE(ar71xx_mdio_resources),
199 .dev = {
200 .platform_data = &ar71xx_mdio_data,
201 },
202 };
203
204 void __init ar71xx_add_device_mdio(u32 phy_mask)
205 {
206 ar71xx_mdio_data.phy_mask = phy_mask;
207 platform_device_register(&ar71xx_mdio_device);
208 }
209
210 static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
211 {
212 void __iomem *base;
213 u32 t;
214
215 base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
216
217 t = __raw_readl(base + cfg_reg);
218 t &= ~(3 << shift);
219 t |= (2 << shift);
220 __raw_writel(t, base + cfg_reg);
221 udelay(100);
222
223 __raw_writel(pll_val, base + pll_reg);
224
225 t |= (3 << shift);
226 __raw_writel(t, base + cfg_reg);
227 udelay(100);
228
229 t &= ~(3 << shift);
230 __raw_writel(t, base + cfg_reg);
231 udelay(100);
232
233 printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
234 (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
235
236 iounmap(base);
237 }
238
239 static void ar71xx_set_pll_ge0(u32 val)
240 {
241 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
242 val, AR71XX_ETH0_PLL_SHIFT);
243 }
244
245 static void ar71xx_set_pll_ge1(u32 val)
246 {
247 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
248 val, AR71XX_ETH1_PLL_SHIFT);
249 }
250
251 static void ar91xx_set_pll_ge0(u32 val)
252 {
253 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
254 val, AR91XX_ETH0_PLL_SHIFT);
255 }
256
257 static void ar91xx_set_pll_ge1(u32 val)
258 {
259 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
260 val, AR91XX_ETH1_PLL_SHIFT);
261 }
262
263 static void ar71xx_ddr_flush_ge0(void)
264 {
265 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
266 }
267
268 static void ar71xx_ddr_flush_ge1(void)
269 {
270 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
271 }
272
273 static void ar91xx_ddr_flush_ge0(void)
274 {
275 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
276 }
277
278 static void ar91xx_ddr_flush_ge1(void)
279 {
280 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
281 }
282
283 static struct resource ar71xx_eth0_resources[] = {
284 {
285 .name = "mac_base",
286 .flags = IORESOURCE_MEM,
287 .start = AR71XX_GE0_BASE,
288 .end = AR71XX_GE0_BASE + 0x20 - 1,
289 }, {
290 .name = "mac_base2",
291 .flags = IORESOURCE_MEM,
292 .start = AR71XX_GE0_BASE + 0x38,
293 .end = AR71XX_GE0_BASE + 0x200 - 1,
294 }, {
295 .name = "mii_ctrl",
296 .flags = IORESOURCE_MEM,
297 .start = AR71XX_MII_BASE + MII_REG_MII0_CTRL,
298 .end = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
299 }, {
300 .name = "mac_irq",
301 .flags = IORESOURCE_IRQ,
302 .start = AR71XX_CPU_IRQ_GE0,
303 .end = AR71XX_CPU_IRQ_GE0,
304 },
305 };
306
307 struct ag71xx_platform_data ar71xx_eth0_data = {
308 .reset_bit = RESET_MODULE_GE0_MAC,
309 };
310
311 static struct platform_device ar71xx_eth0_device = {
312 .name = "ag71xx",
313 .id = 0,
314 .resource = ar71xx_eth0_resources,
315 .num_resources = ARRAY_SIZE(ar71xx_eth0_resources),
316 .dev = {
317 .platform_data = &ar71xx_eth0_data,
318 },
319 };
320
321 static struct resource ar71xx_eth1_resources[] = {
322 {
323 .name = "mac_base",
324 .flags = IORESOURCE_MEM,
325 .start = AR71XX_GE1_BASE,
326 .end = AR71XX_GE1_BASE + 0x20 - 1,
327 }, {
328 .name = "mac_base2",
329 .flags = IORESOURCE_MEM,
330 .start = AR71XX_GE1_BASE + 0x38,
331 .end = AR71XX_GE1_BASE + 0x200 - 1,
332 }, {
333 .name = "mii_ctrl",
334 .flags = IORESOURCE_MEM,
335 .start = AR71XX_MII_BASE + MII_REG_MII1_CTRL,
336 .end = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3,
337 }, {
338 .name = "mac_irq",
339 .flags = IORESOURCE_IRQ,
340 .start = AR71XX_CPU_IRQ_GE1,
341 .end = AR71XX_CPU_IRQ_GE1,
342 },
343 };
344
345 struct ag71xx_platform_data ar71xx_eth1_data = {
346 .reset_bit = RESET_MODULE_GE1_MAC,
347 };
348
349 static struct platform_device ar71xx_eth1_device = {
350 .name = "ag71xx",
351 .id = 1,
352 .resource = ar71xx_eth1_resources,
353 .num_resources = ARRAY_SIZE(ar71xx_eth1_resources),
354 .dev = {
355 .platform_data = &ar71xx_eth1_data,
356 },
357 };
358
359 static int ar71xx_eth_instance __initdata;
360 void __init ar71xx_add_device_eth(unsigned int id)
361 {
362 struct platform_device *pdev;
363 struct ag71xx_platform_data *pdata;
364
365 switch (id) {
366 case 0:
367 switch (ar71xx_eth0_data.phy_if_mode) {
368 case PHY_INTERFACE_MODE_MII:
369 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
370 break;
371 case PHY_INTERFACE_MODE_GMII:
372 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
373 break;
374 case PHY_INTERFACE_MODE_RGMII:
375 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
376 break;
377 case PHY_INTERFACE_MODE_RMII:
378 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
379 break;
380 default:
381 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
382 "for eth0\n");
383 return;
384 }
385 pdev = &ar71xx_eth0_device;
386 break;
387 case 1:
388 switch (ar71xx_eth1_data.phy_if_mode) {
389 case PHY_INTERFACE_MODE_RMII:
390 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
391 break;
392 case PHY_INTERFACE_MODE_RGMII:
393 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
394 break;
395 default:
396 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
397 "for eth1\n");
398 return;
399 }
400 pdev = &ar71xx_eth1_device;
401 break;
402 default:
403 printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
404 return;
405 }
406
407 pdata = pdev->dev.platform_data;
408
409 switch (ar71xx_soc) {
410 case AR71XX_SOC_AR7130:
411 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
412 : ar71xx_ddr_flush_ge0;
413 pdata->set_pll = id ? ar71xx_set_pll_ge1
414 : ar71xx_set_pll_ge0;
415 break;
416
417 case AR71XX_SOC_AR7141:
418 case AR71XX_SOC_AR7161:
419 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
420 : ar71xx_ddr_flush_ge0;
421 pdata->set_pll = id ? ar71xx_set_pll_ge1
422 : ar71xx_set_pll_ge0;
423 pdata->has_gbit = 1;
424 break;
425
426 case AR71XX_SOC_AR9130:
427 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
428 : ar91xx_ddr_flush_ge0;
429 pdata->set_pll = id ? ar91xx_set_pll_ge1
430 : ar91xx_set_pll_ge0;
431 pdata->is_ar91xx = 1;
432 break;
433
434 case AR71XX_SOC_AR9132:
435 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
436 : ar91xx_ddr_flush_ge0;
437 pdata->set_pll = id ? ar91xx_set_pll_ge1
438 : ar91xx_set_pll_ge0;
439 pdata->is_ar91xx = 1;
440 pdata->has_gbit = 1;
441 break;
442
443 default:
444 BUG();
445 }
446
447 switch (pdata->phy_if_mode) {
448 case PHY_INTERFACE_MODE_GMII:
449 case PHY_INTERFACE_MODE_RGMII:
450 if (!pdata->has_gbit) {
451 printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
452 id);
453 return;
454 }
455 /* fallthrough */
456 default:
457 break;
458 }
459
460 if (is_valid_ether_addr(ar71xx_mac_base)) {
461 memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
462 pdata->mac_addr[5] += ar71xx_eth_instance;
463 } else {
464 random_ether_addr(pdata->mac_addr);
465 printk(KERN_DEBUG
466 "ar71xx: using random MAC address for eth%d\n",
467 ar71xx_eth_instance);
468 }
469
470 platform_device_register(pdev);
471 ar71xx_eth_instance++;
472 }
473
474 static struct resource ar71xx_spi_resources[] = {
475 [0] = {
476 .start = AR71XX_SPI_BASE,
477 .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
478 .flags = IORESOURCE_MEM,
479 },
480 };
481
482 static struct platform_device ar71xx_spi_device = {
483 .name = "ar71xx-spi",
484 .id = -1,
485 .resource = ar71xx_spi_resources,
486 .num_resources = ARRAY_SIZE(ar71xx_spi_resources),
487 };
488
489 void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
490 struct spi_board_info const *info,
491 unsigned n)
492 {
493 spi_register_board_info(info, n);
494 ar71xx_spi_device.dev.platform_data = pdata;
495 platform_device_register(&ar71xx_spi_device);
496 }
497
498 void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
499 struct gpio_led *leds)
500 {
501 struct platform_device *pdev;
502 struct gpio_led_platform_data pdata;
503 struct gpio_led *p;
504 int err;
505
506 p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
507 if (!p)
508 return;
509
510 memcpy(p, leds, num_leds * sizeof(*p));
511
512 pdev = platform_device_alloc("leds-gpio", id);
513 if (!pdev)
514 goto err_free_leds;
515
516 memset(&pdata, 0, sizeof(pdata));
517 pdata.num_leds = num_leds;
518 pdata.leds = p;
519
520 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
521 if (err)
522 goto err_put_pdev;
523
524 err = platform_device_add(pdev);
525 if (err)
526 goto err_put_pdev;
527
528 return;
529
530 err_put_pdev:
531 platform_device_put(pdev);
532
533 err_free_leds:
534 kfree(p);
535 }
536
537 void __init ar71xx_add_device_gpio_buttons(int id,
538 unsigned poll_interval,
539 unsigned nbuttons,
540 struct gpio_button *buttons)
541 {
542 struct platform_device *pdev;
543 struct gpio_buttons_platform_data pdata;
544 struct gpio_button *p;
545 int err;
546
547 p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
548 if (!p)
549 return;
550
551 memcpy(p, buttons, nbuttons * sizeof(*p));
552
553 pdev = platform_device_alloc("gpio-buttons", id);
554 if (!pdev)
555 goto err_free_buttons;
556
557 memset(&pdata, 0, sizeof(pdata));
558 pdata.poll_interval = poll_interval;
559 pdata.nbuttons = nbuttons;
560 pdata.buttons = p;
561
562 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
563 if (err)
564 goto err_put_pdev;
565
566
567 err = platform_device_add(pdev);
568 if (err)
569 goto err_put_pdev;
570
571 return;
572
573 err_put_pdev:
574 platform_device_put(pdev);
575
576 err_free_buttons:
577 kfree(p);
578 }
579
580 void __init ar71xx_add_device_wdt(void)
581 {
582 platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
583 }
584
585 void __init ar71xx_set_mac_base(unsigned char *mac)
586 {
587 memcpy(ar71xx_mac_base, mac, ETH_ALEN);
588 }
589
590 void __init ar71xx_parse_mac_addr(char *mac_str)
591 {
592 u8 tmp[ETH_ALEN];
593 int t;
594
595 t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
596 &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
597
598 if (t != ETH_ALEN)
599 t = sscanf(mac_str, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx",
600 &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
601
602 if (t == ETH_ALEN)
603 ar71xx_set_mac_base(tmp);
604 else
605 printk(KERN_DEBUG "ar71xx: failed to parse mac address "
606 "\"%s\"\n", mac_str);
607 }
608
609 static struct resource ar91xx_wmac_resources[] = {
610 {
611 .start = AR91XX_WMAC_BASE,
612 .end = AR91XX_WMAC_BASE + AR91XX_WMAC_SIZE - 1,
613 .flags = IORESOURCE_MEM,
614 }, {
615 .start = AR71XX_CPU_IRQ_WMAC,
616 .end = AR71XX_CPU_IRQ_WMAC,
617 .flags = IORESOURCE_IRQ,
618 },
619 };
620
621 static struct ath9k_platform_data ar91xx_wmac_data;
622
623 static struct platform_device ar91xx_wmac_device = {
624 .name = "ath9k",
625 .id = -1,
626 .resource = ar91xx_wmac_resources,
627 .num_resources = ARRAY_SIZE(ar91xx_wmac_resources),
628 .dev = {
629 .platform_data = &ar91xx_wmac_data,
630 },
631 };
632
633 void __init ar91xx_add_device_wmac(void)
634 {
635 u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
636
637 memcpy(ar91xx_wmac_data.eeprom_data, ee,
638 sizeof(ar91xx_wmac_data.eeprom_data));
639
640 ar71xx_device_stop(RESET_MODULE_AMBA2WMAC);
641 mdelay(10);
642
643 ar71xx_device_start(RESET_MODULE_AMBA2WMAC);
644 mdelay(10);
645
646 platform_device_register(&ar91xx_wmac_device);
647 }
OpenWrt SVN history