7d5377480ad864b3f495099159abea8196187bdf
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-all0315n.c
1 /*
2 * Allnet ALL0315N support
3 *
4 * Copyright (C) 2012 Daniel Golle <dgolle@allnet.de>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12 #include <asm/mach-ath79/ath79.h>
13 #include <asm/mach-ath79/ar71xx_regs.h>
14
15 #include "common.h"
16 #include "dev-eth.h"
17 #include "dev-ap9x-pci.h"
18 #include "dev-gpio-buttons.h"
19 #include "dev-m25p80.h"
20 #include "dev-leds-gpio.h"
21 #include "machtypes.h"
22 #include "pci.h"
23
24 #define ALL0315N_GPIO_BTN_RESET 0
25 #define ALL0315N_GPIO_LED_RSSIHIGH 14
26 #define ALL0315N_GPIO_LED_RSSIMEDIUM 15
27 #define ALL0315N_GPIO_LED_RSSILOW 16
28
29 #define ALL0315N_KEYS_POLL_INTERVAL 20 /* msecs */
30 #define ALL0315N_KEYS_DEBOUNCE_INTERVAL (3 * ALL0315N_KEYS_POLL_INTERVAL)
31
32 static struct gpio_led all0315n_leds_gpio[] __initdata = {
33 {
34 .name = "all0315n:green:rssihigh",
35 .gpio = ALL0315N_GPIO_LED_RSSIHIGH,
36 .active_low = 1,
37 }, {
38 .name = "all0315n:yellow:rssimedium",
39 .gpio = ALL0315N_GPIO_LED_RSSIMEDIUM,
40 .active_low = 1,
41 }, {
42 .name = "all0315n:red:rssilow",
43 .gpio = ALL0315N_GPIO_LED_RSSILOW,
44 .active_low = 1,
45 }
46 };
47
48 static struct gpio_keys_button all0315n_gpio_keys[] __initdata = {
49 {
50 .desc = "reset",
51 .type = EV_KEY,
52 .code = KEY_RESTART,
53 .debounce_interval = ALL0315N_KEYS_DEBOUNCE_INTERVAL,
54 .gpio = ALL0315N_GPIO_BTN_RESET,
55 .active_low = 1,
56 }
57 };
58
59 static void __init all0315n_setup(void)
60 {
61 u8 *mac = (u8 *) KSEG1ADDR(0x1ffc0000);
62 u8 *ee = (u8 *) KSEG1ADDR(0x1ffc1000);
63
64 ath79_register_m25p80(NULL);
65
66 ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
67 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
68 ath79_eth0_data.speed = SPEED_1000;
69 ath79_eth0_data.duplex = DUPLEX_FULL;
70 ath79_eth0_data.phy_mask = BIT(0);
71
72 ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
73 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
74 ath79_eth1_data.speed = SPEED_1000;
75 ath79_eth1_data.duplex = DUPLEX_FULL;
76 ath79_eth1_data.phy_mask = BIT(4);
77
78 ath79_register_mdio(0, ~(BIT(0) | BIT(4)));
79 ath79_register_eth(0);
80 ath79_register_eth(1);
81
82
83 ath79_register_leds_gpio(-1, ARRAY_SIZE(all0315n_leds_gpio),
84 all0315n_leds_gpio);
85
86 ath79_register_gpio_keys_polled(-1, ALL0315N_KEYS_POLL_INTERVAL,
87 ARRAY_SIZE(all0315n_gpio_keys),
88 all0315n_gpio_keys);
89
90 ap9x_pci_setup_wmac_led_pin(0, 1);
91 ap91_pci_init(ee, mac);
92 }
93
94 MIPS_MACHINE(ATH79_MACH_ALL0315N, "ALL0315N", "Allnet ALL0315N",
95 all0315n_setup);