target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-c1.c

   1 /*
   2  *  D-Link DIR-825 rev. C1 board support
   3  *
   4  *  Copyright (C) 2013 Alexander Stadler
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #include <linux/pci.h>
  12 #include <linux/phy.h>
  13 #include <linux/gpio.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/ath9k_platform.h>
  16 #include <linux/ar8216_platform.h>
  17
  18 #include <asm/mach-ath79/ar71xx_regs.h>
  19
  20 #include "common.h"
  21 #include "dev-ap9x-pci.h"
  22 #include "dev-eth.h"
  23 #include "dev-gpio-buttons.h"
  24 #include "dev-leds-gpio.h"
  25 #include "dev-m25p80.h"
  26 #include "dev-spi.h"
  27 #include "dev-usb.h"
  28 #include "dev-wmac.h"
  29 #include "machtypes.h"
  30
  31 #define DIR825C1_GPIO_LED_BLUE_USB              11
  32 #define DIR825C1_GPIO_LED_ORANGE_POWER          14
  33 #define DIR825C1_GPIO_LED_BLUE_POWER            22
  34 #define DIR825C1_GPIO_LED_BLUE_WPS              15
  35 #define DIR825C1_GPIO_LED_ORANGE_PLANET         19
  36 #define DIR825C1_GPIO_LED_BLUE_PLANET           18
  37 #define DIR825C1_GPIO_LED_WIFI_BGN              13
  38
  39 #define DIR825C1_GPIO_BTN_RESET                 17
  40 #define DIR825C1_GPIO_BTN_WPS                   16
  41
  42 #define DIR825C1_KEYS_POLL_INTERVAL             20      /* msecs */
  43 #define DIR825C1_KEYS_DEBOUNCE_INTERVAL         (3 * DIR825C1_KEYS_POLL_INTERVAL)
  44
  45 #define DIR825C1_MAC0_OFFSET                    0x4
  46 #define DIR825C1_MAC1_OFFSET                    0x18
  47 #define DIR825C1_WMAC_CALDATA_OFFSET            0x1000
  48 #define DIR825C1_PCIE_CALDATA_OFFSET            0x5000
  49
  50 static struct gpio_led dir825c1_leds_gpio[] __initdata = {
  51         {
  52                 .name           = "d-link:blue:usb",
  53                 .gpio           = DIR825C1_GPIO_LED_BLUE_USB,
  54                 .active_low     = 1,
  55         },
  56         {
  57                 .name           = "d-link:orange:power",
  58                 .gpio           = DIR825C1_GPIO_LED_ORANGE_POWER,
  59                 .active_low     = 1,
  60         },
  61         {
  62                 .name           = "d-link:blue:power",
  63                 .gpio           = DIR825C1_GPIO_LED_BLUE_POWER,
  64                 .active_low     = 1,
  65         },
  66         {
  67                 .name           = "d-link:blue:wps",
  68                 .gpio           = DIR825C1_GPIO_LED_BLUE_WPS,
  69                 .active_low     = 1,
  70         },
  71         {
  72                 .name           = "d-link:orange:planet",
  73                 .gpio           = DIR825C1_GPIO_LED_ORANGE_PLANET,
  74                 .active_low     = 1,
  75         },
  76         {
  77                 .name           = "d-link:blue:planet",
  78                 .gpio           = DIR825C1_GPIO_LED_BLUE_PLANET,
  79                 .active_low     = 1,
  80         }, {
  81                 .name           = "d-link:blue:wifi_bgn",
  82                 .gpio           = DIR825C1_GPIO_LED_WIFI_BGN,
  83                 .active_low     = 1,
  84         },
  85 };
  86
  87 static struct gpio_led dir835a1_leds_gpio[] __initdata = {
  88         {
  89                 .name           = "d-link:orange:power",
  90                 .gpio           = DIR825C1_GPIO_LED_ORANGE_POWER,
  91                 .active_low     = 1,
  92         },
  93         {
  94                 .name           = "d-link:green:power",
  95                 .gpio           = DIR825C1_GPIO_LED_BLUE_POWER,
  96                 .active_low     = 1,
  97         },
  98         {
  99                 .name           = "d-link:blue:wps",
 100                 .gpio           = DIR825C1_GPIO_LED_BLUE_WPS,
 101                 .active_low     = 1,
 102         },
 103         {
 104                 .name           = "d-link:orange:planet",
 105                 .gpio           = DIR825C1_GPIO_LED_ORANGE_PLANET,
 106                 .active_low     = 1,
 107         },
 108         {
 109                 .name           = "d-link:green:planet",
 110                 .gpio           = DIR825C1_GPIO_LED_BLUE_PLANET,
 111                 .active_low     = 1,
 112         },
 113 };
 114
 115 static struct gpio_keys_button dir825c1_gpio_keys[] __initdata = {
 116         {
 117                 .desc           = "reset",
 118                 .type           = EV_KEY,
 119                 .code           = KEY_RESTART,
 120                 .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL,
 121                 .gpio           = DIR825C1_GPIO_BTN_RESET,
 122                 .active_low     = 1,
 123         },
 124         {
 125                 .desc           = "wps",
 126                 .type           = EV_KEY,
 127                 .code           = KEY_WPS_BUTTON,
 128                 .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL,
 129                 .gpio           = DIR825C1_GPIO_BTN_WPS,
 130                 .active_low     = 1,
 131         },
 132 };
 133
 134 static struct ar8327_pad_cfg dir825c1_ar8327_pad0_cfg = {
 135         .mode = AR8327_PAD_MAC_RGMII,
 136         .txclk_delay_en = true,
 137         .rxclk_delay_en = true,
 138         .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
 139         .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
 140 };
 141
 142 static struct ar8327_led_cfg dir825c1_ar8327_led_cfg = {
 143         .led_ctrl0 = 0xc737c737,
 144         .led_ctrl1 = 0x00000000,
 145         .led_ctrl2 = 0x00000000,
 146         .led_ctrl3 = 0x0030c300,
 147         .open_drain = false,
 148 };
 149
 150 static struct ar8327_platform_data dir825c1_ar8327_data = {
 151         .pad0_cfg = &dir825c1_ar8327_pad0_cfg,
 152         .port0_cfg = {
 153                 .force_link = 1,
 154                 .speed = AR8327_PORT_SPEED_1000,
 155                 .duplex = 1,
 156                 .txpause = 1,
 157                 .rxpause = 1,
 158         },
 159         .led_cfg = &dir825c1_ar8327_led_cfg,
 160 };
 161
 162 static struct mdio_board_info dir825c1_mdio0_info[] = {
 163         {
 164                 .bus_id = "ag71xx-mdio.0",
 165                 .phy_addr = 0,
 166                 .platform_data = &dir825c1_ar8327_data,
 167         },
 168 };
 169
 170 static void dir825c1_read_ascii_mac(u8 *dest, u8 *src)
 171 {
 172         int ret;
 173
 174         ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
 175                      &dest[0], &dest[1], &dest[2],
 176                      &dest[3], &dest[4], &dest[5]);
 177
 178         if (ret != ETH_ALEN)
 179                 memset(dest, 0, ETH_ALEN);
 180 }
 181
 182 static void __init dir825c1_generic_setup(void)
 183 {
 184         u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
 185         u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
 186         u8 mac0[ETH_ALEN], mac1[ETH_ALEN];
 187         u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN];
 188
 189         dir825c1_read_ascii_mac(mac0, mac + DIR825C1_MAC0_OFFSET);
 190         dir825c1_read_ascii_mac(mac1, mac + DIR825C1_MAC1_OFFSET);
 191
 192         ath79_register_m25p80(NULL);
 193
 194         ath79_register_gpio_keys_polled(-1, DIR825C1_KEYS_POLL_INTERVAL,
 195                                         ARRAY_SIZE(dir825c1_gpio_keys),
 196                                         dir825c1_gpio_keys);
 197
 198         ath79_init_mac(wmac0, mac0, 0);
 199         ath79_register_wmac(art + DIR825C1_WMAC_CALDATA_OFFSET, wmac0);
 200
 201         ath79_init_mac(wmac1, mac1, 1);
 202         ap91_pci_init(art + DIR825C1_PCIE_CALDATA_OFFSET, wmac1);
 203
 204         ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
 205
 206         mdiobus_register_board_info(dir825c1_mdio0_info,
 207                                     ARRAY_SIZE(dir825c1_mdio0_info));
 208
 209         ath79_register_mdio(0, 0x0);
 210
 211         ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0);
 212
 213         /* GMAC0 is connected to an AR8327N switch */
 214         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 215         ath79_eth0_data.phy_mask = BIT(0);
 216         ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
 217         ath79_eth0_pll_data.pll_1000 = 0x06000000;
 218         ath79_register_eth(0);
 219
 220         ath79_register_usb();
 221 }
 222
 223 static void __init dir825c1_setup(void)
 224 {
 225         ath79_gpio_output_select(DIR825C1_GPIO_LED_BLUE_USB,
 226                                  AR934X_GPIO_OUT_GPIO);
 227
 228         ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825c1_leds_gpio),
 229                                  dir825c1_leds_gpio);
 230
 231         ap9x_pci_setup_wmac_led_pin(0, 13);
 232         ap9x_pci_setup_wmac_led_pin(1, 32);
 233
 234         dir825c1_generic_setup();
 235 }
 236
 237 static void __init dir835a1_setup(void)
 238 {
 239         dir825c1_ar8327_data.led_cfg = NULL;
 240
 241         ath79_register_leds_gpio(-1, ARRAY_SIZE(dir835a1_leds_gpio),
 242                                  dir835a1_leds_gpio);
 243
 244         dir825c1_generic_setup();
 245 }
 246
 247 MIPS_MACHINE(ATH79_MACH_DIR_825_C1, "DIR-825-C1",
 248              "D-Link DIR-825 rev. C1",
 249              dir825c1_setup);
 250
 251 MIPS_MACHINE(ATH79_MACH_DIR_835_A1, "DIR-835-A1",
 252              "D-Link DIR-835 rev. A1",
 253              dir835a1_setup);