ar71xx: register USB port for RB2011U* devices
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / patches-3.8 / 019-MIPS-pci-ar724x-use-per-controller-IRQ-base.patch
1 From d85015ff3ab6df0e776c2aefc51f2da023c1edcf Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Sun, 3 Feb 2013 10:00:16 +0000
4 Subject: [PATCH] MIPS: pci-ar724x: use per-controller IRQ base
5
6 commit 8b66d461187ff61c5755001af7296e6edde48423 upstream.
7
8 Change to the code to use per-controller IRQ base.
9 This is needed for multiple PCI controller support.
10
11 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
12 Patchwork: http://patchwork.linux-mips.org/patch/4915/
13 Signed-off-by: John Crispin <blogic@openwrt.org>
14 ---
15 arch/mips/pci/pci-ar724x.c | 31 +++++++++++++++++++++----------
16 1 file changed, 21 insertions(+), 10 deletions(-)
17
18 --- a/arch/mips/pci/pci-ar724x.c
19 +++ b/arch/mips/pci/pci-ar724x.c
20 @@ -34,6 +34,7 @@ struct ar724x_pci_controller {
21 void __iomem *ctrl_base;
22
23 int irq;
24 + int irq_base;
25
26 bool link_up;
27 bool bar0_is_cached;
28 @@ -205,7 +206,7 @@ static void ar724x_pci_irq_handler(unsig
29 __raw_readl(base + AR724X_PCI_REG_INT_MASK);
30
31 if (pending & AR724X_PCI_INT_DEV0)
32 - generic_handle_irq(ATH79_PCI_IRQ(0));
33 + generic_handle_irq(apc->irq_base + 0);
34
35 else
36 spurious_interrupt();
37 @@ -215,13 +216,15 @@ static void ar724x_pci_irq_unmask(struct
38 {
39 struct ar724x_pci_controller *apc;
40 void __iomem *base;
41 + int offset;
42 u32 t;
43
44 apc = irq_data_get_irq_chip_data(d);
45 base = apc->ctrl_base;
46 + offset = apc->irq_base - d->irq;
47
48 - switch (d->irq) {
49 - case ATH79_PCI_IRQ(0):
50 + switch (offset) {
51 + case 0:
52 t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
53 __raw_writel(t | AR724X_PCI_INT_DEV0,
54 base + AR724X_PCI_REG_INT_MASK);
55 @@ -234,13 +237,15 @@ static void ar724x_pci_irq_mask(struct i
56 {
57 struct ar724x_pci_controller *apc;
58 void __iomem *base;
59 + int offset;
60 u32 t;
61
62 apc = irq_data_get_irq_chip_data(d);
63 base = apc->ctrl_base;
64 + offset = apc->irq_base - d->irq;
65
66 - switch (d->irq) {
67 - case ATH79_PCI_IRQ(0):
68 + switch (offset) {
69 + case 0:
70 t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
71 __raw_writel(t & ~AR724X_PCI_INT_DEV0,
72 base + AR724X_PCI_REG_INT_MASK);
73 @@ -264,7 +269,8 @@ static struct irq_chip ar724x_pci_irq_ch
74 .irq_mask_ack = ar724x_pci_irq_mask,
75 };
76
77 -static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc)
78 +static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc,
79 + int id)
80 {
81 void __iomem *base;
82 int i;
83 @@ -274,10 +280,10 @@ static void ar724x_pci_irq_init(struct a
84 __raw_writel(0, base + AR724X_PCI_REG_INT_MASK);
85 __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
86
87 - BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR724X_PCI_IRQ_COUNT);
88 + apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT);
89
90 - for (i = ATH79_PCI_IRQ_BASE;
91 - i < ATH79_PCI_IRQ_BASE + AR724X_PCI_IRQ_COUNT; i++) {
92 + for (i = apc->irq_base;
93 + i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) {
94 irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
95 handle_level_irq);
96 irq_set_chip_data(i, apc);
97 @@ -291,6 +297,11 @@ static int ar724x_pci_probe(struct platf
98 {
99 struct ar724x_pci_controller *apc;
100 struct resource *res;
101 + int id;
102 +
103 + id = pdev->id;
104 + if (id == -1)
105 + id = 0;
106
107 apc = devm_kzalloc(&pdev->dev, sizeof(struct ar724x_pci_controller),
108 GFP_KERNEL);
109 @@ -347,7 +358,7 @@ static int ar724x_pci_probe(struct platf
110 if (!apc->link_up)
111 dev_warn(&pdev->dev, "PCIe link is down\n");
112
113 - ar724x_pci_irq_init(apc);
114 + ar724x_pci_irq_init(apc, id);
115
116 register_pci_controller(&apc->pci_controller);
117