ar71xx: add AR934X_GPIO_FUNC_* defines
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / patches-3.8 / 022-MIPS-pci-ar71xx-remove-static-PCI-IO-MEM-resources.patch
1 From f073cb029873ed487e14784d3682b6aa25afe997 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Thu, 7 Feb 2013 19:28:15 +0000
4 Subject: [PATCH] MIPS: pci-ar71xx: remove static PCI IO/MEM resources
5
6 commit 42cb60d1fab4c81ef24876d985e08fc5bb899e41 upstream.
7
8 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
9 Patchwork: http://patchwork.linux-mips.org/patch/4927/
10 Signed-off-by: John Crispin <blogic@openwrt.org>
11 ---
12 arch/mips/ath79/pci.c | 12 +++++++++++-
13 arch/mips/pci/pci-ar71xx.c | 40 ++++++++++++++++++++++++----------------
14 2 files changed, 35 insertions(+), 17 deletions(-)
15
16 --- a/arch/mips/ath79/pci.c
17 +++ b/arch/mips/ath79/pci.c
18 @@ -117,7 +117,7 @@ static struct platform_device *
19 ath79_register_pci_ar71xx(void)
20 {
21 struct platform_device *pdev;
22 - struct resource res[2];
23 + struct resource res[4];
24
25 memset(res, 0, sizeof(res));
26
27 @@ -130,6 +130,16 @@ ath79_register_pci_ar71xx(void)
28 res[1].start = ATH79_CPU_IRQ_IP2;
29 res[1].end = ATH79_CPU_IRQ_IP2;
30
31 + res[2].name = "io_base";
32 + res[2].flags = IORESOURCE_IO;
33 + res[2].start = 0;
34 + res[2].end = 0;
35 +
36 + res[3].name = "mem_base";
37 + res[3].flags = IORESOURCE_MEM;
38 + res[3].start = AR71XX_PCI_MEM_BASE;
39 + res[3].end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1;
40 +
41 pdev = platform_device_register_simple("ar71xx-pci", -1,
42 res, ARRAY_SIZE(res));
43 return pdev;
44 --- a/arch/mips/pci/pci-ar71xx.c
45 +++ b/arch/mips/pci/pci-ar71xx.c
46 @@ -53,6 +53,8 @@ struct ar71xx_pci_controller {
47 spinlock_t lock;
48 int irq;
49 struct pci_controller pci_ctrl;
50 + struct resource io_res;
51 + struct resource mem_res;
52 };
53
54 /* Byte lane enable bits */
55 @@ -234,20 +236,6 @@ static struct pci_ops ar71xx_pci_ops = {
56 .write = ar71xx_pci_write_config,
57 };
58
59 -static struct resource ar71xx_pci_io_resource = {
60 - .name = "PCI IO space",
61 - .start = 0,
62 - .end = 0,
63 - .flags = IORESOURCE_IO,
64 -};
65 -
66 -static struct resource ar71xx_pci_mem_resource = {
67 - .name = "PCI memory space",
68 - .start = AR71XX_PCI_MEM_BASE,
69 - .end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1,
70 - .flags = IORESOURCE_MEM
71 -};
72 -
73 static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
74 {
75 void __iomem *base = ath79_reset_base;
76 @@ -370,6 +358,26 @@ static int ar71xx_pci_probe(struct platf
77 if (apc->irq < 0)
78 return -EINVAL;
79
80 + res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
81 + if (!res)
82 + return -EINVAL;
83 +
84 + apc->io_res.parent = res;
85 + apc->io_res.name = "PCI IO space";
86 + apc->io_res.start = res->start;
87 + apc->io_res.end = res->end;
88 + apc->io_res.flags = IORESOURCE_IO;
89 +
90 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base");
91 + if (!res)
92 + return -EINVAL;
93 +
94 + apc->mem_res.parent = res;
95 + apc->mem_res.name = "PCI memory space";
96 + apc->mem_res.start = res->start;
97 + apc->mem_res.end = res->end;
98 + apc->mem_res.flags = IORESOURCE_MEM;
99 +
100 ar71xx_pci_reset();
101
102 /* setup COMMAND register */
103 @@ -383,8 +391,8 @@ static int ar71xx_pci_probe(struct platf
104 ar71xx_pci_irq_init(apc);
105
106 apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
107 - apc->pci_ctrl.mem_resource = &ar71xx_pci_mem_resource;
108 - apc->pci_ctrl.io_resource = &ar71xx_pci_io_resource;
109 + apc->pci_ctrl.mem_resource = &apc->mem_res;
110 + apc->pci_ctrl.io_resource = &apc->io_res;
111
112 register_pci_controller(&apc->pci_ctrl);
113