ar71xx: move the watchdog driver to the kernel
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / patches-3.8 / 033-MIPS-ath79-add-QCA955X-specific-glue-to-ath79_device.patch
1 From d3cc7a15c1e1a04e8d561c0b05d176434142bf9a Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Fri, 15 Feb 2013 13:38:20 +0000
4 Subject: [PATCH] MIPS: ath79: add QCA955X specific glue to
5 ath79_device_reset_{set, clear}
6
7 commit 7d4c2af9bdbbe789fe4a93f32c5890d72cbf60a1 upstream.
8
9 The ath79_device_reset_* are causing BUG when
10 those are used on the QCA955x SoCs. The patch
11 adds the required code to avoid that.
12
13 Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
14 Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
15 Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
16 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
17 Patchwork: http://patchwork.linux-mips.org/patch/4948/
18 Signed-off-by: John Crispin <blogic@openwrt.org>
19 ---
20 arch/mips/ath79/common.c | 4 ++++
21 arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
22 2 files changed, 5 insertions(+)
23
24 --- a/arch/mips/ath79/common.c
25 +++ b/arch/mips/ath79/common.c
26 @@ -72,6 +72,8 @@ void ath79_device_reset_set(u32 mask)
27 reg = AR933X_RESET_REG_RESET_MODULE;
28 else if (soc_is_ar934x())
29 reg = AR934X_RESET_REG_RESET_MODULE;
30 + else if (soc_is_qca955x())
31 + reg = QCA955X_RESET_REG_RESET_MODULE;
32 else
33 BUG();
34
35 @@ -98,6 +100,8 @@ void ath79_device_reset_clear(u32 mask)
36 reg = AR933X_RESET_REG_RESET_MODULE;
37 else if (soc_is_ar934x())
38 reg = AR934X_RESET_REG_RESET_MODULE;
39 + else if (soc_is_qca955x())
40 + reg = QCA955X_RESET_REG_RESET_MODULE;
41 else
42 BUG();
43
44 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
45 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
46 @@ -299,6 +299,7 @@
47 #define AR934X_RESET_REG_BOOTSTRAP 0xb0
48 #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac
49
50 +#define QCA955X_RESET_REG_RESET_MODULE 0x1c
51 #define QCA955X_RESET_REG_BOOTSTRAP 0xb0
52 #define QCA955X_RESET_REG_EXT_INT_STATUS 0xac
53