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brcm2708: update to v3.18
[openwrt/svn-archive/archive.git] / target / linux / brcm2708 / patches-3.18 / 0058-MMC-added-alternative-MMC-driver.patch
1 From 7da0618348811dbb38825457f63e12d3b8ba943f Mon Sep 17 00:00:00 2001
2 From: gellert <gellert@raspberrypi.org>
3 Date: Fri, 15 Aug 2014 16:35:06 +0100
4 Subject: [PATCH 058/114] MMC: added alternative MMC driver
5
6 ---
7 arch/arm/configs/bcmrpi_defconfig | 2 +
8 arch/arm/mach-bcm2708/bcm2708.c | 31 +
9 drivers/mmc/host/Kconfig | 40 +-
10 drivers/mmc/host/Makefile | 1 +
11 drivers/mmc/host/bcm2835-mmc.c | 1557 +++++++++++++++++++++++++++++++++++++
12 5 files changed, 1620 insertions(+), 11 deletions(-)
13 create mode 100644 drivers/mmc/host/bcm2835-mmc.c
14
15 diff --git a/arch/arm/configs/bcmrpi_defconfig b/arch/arm/configs/bcmrpi_defconfig
16 index f15a4b9..c363a10 100644
17 --- a/arch/arm/configs/bcmrpi_defconfig
18 +++ b/arch/arm/configs/bcmrpi_defconfig
19 @@ -908,6 +908,8 @@ CONFIG_MMC=y
20 CONFIG_MMC_BLOCK_MINORS=32
21 CONFIG_MMC_SDHCI=y
22 CONFIG_MMC_SDHCI_PLTFM=y
23 +CONFIG_MMC_BCM2835=y
24 +CONFIG_MMC_BCM2835_DMA=y
25 CONFIG_MMC_SPI=m
26 CONFIG_LEDS_CLASS=y
27 CONFIG_LEDS_GPIO=y
28 diff --git a/arch/arm/mach-bcm2708/bcm2708.c b/arch/arm/mach-bcm2708/bcm2708.c
29 index b45f327..5ff1299 100644
30 --- a/arch/arm/mach-bcm2708/bcm2708.c
31 +++ b/arch/arm/mach-bcm2708/bcm2708.c
32 @@ -414,6 +414,34 @@ static struct platform_device bcm2708_systemtimer_device = {
33 },
34 };
35
36 +#ifdef CONFIG_MMC_BCM2835 /* Arasan emmc SD (new) */
37 +static struct resource bcm2835_emmc_resources[] = {
38 + [0] = {
39 + .start = EMMC_BASE,
40 + .end = EMMC_BASE + SZ_256 - 1, /* we only need this area */
41 + /* the memory map actually makes SZ_4K available */
42 + .flags = IORESOURCE_MEM,
43 + },
44 + [1] = {
45 + .start = IRQ_ARASANSDIO,
46 + .end = IRQ_ARASANSDIO,
47 + .flags = IORESOURCE_IRQ,
48 + },
49 +};
50 +
51 +static u64 bcm2835_emmc_dmamask = 0xffffffffUL;
52 +
53 +struct platform_device bcm2835_emmc_device = {
54 + .name = "mmc-bcm2835",
55 + .id = 0,
56 + .num_resources = ARRAY_SIZE(bcm2835_emmc_resources),
57 + .resource = bcm2835_emmc_resources,
58 + .dev = {
59 + .dma_mask = &bcm2835_emmc_dmamask,
60 + .coherent_dma_mask = 0xffffffffUL},
61 +};
62 +#endif /* CONFIG_MMC_BCM2835 */
63 +
64 static struct resource bcm2708_powerman_resources[] = {
65 [0] = {
66 .start = PM_BASE,
67 @@ -794,6 +822,9 @@ void __init bcm2708_init(void)
68 bcm_register_device(&bcm2708_uart1_device);
69 bcm_register_device(&bcm2708_powerman_device);
70
71 +#ifdef CONFIG_MMC_BCM2835
72 + bcm_register_device(&bcm2835_emmc_device);
73 +#endif
74 bcm2708_init_led();
75 for (i = 0; i < ARRAY_SIZE(bcm2708_alsa_devices); i++)
76 bcm_register_device(&bcm2708_alsa_devices[i]);
77 diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
78 index 1386065..977aeef 100644
79 --- a/drivers/mmc/host/Kconfig
80 +++ b/drivers/mmc/host/Kconfig
81 @@ -281,17 +281,6 @@ config MMC_SDHCI_BCM_KONA
82
83 If you have a controller with this interface, say Y or M here.
84
85 -config MMC_SDHCI_BCM2835
86 - tristate "SDHCI platform support for the BCM2835 SD/MMC Controller"
87 - depends on ARCH_BCM2835
88 - depends on MMC_SDHCI_PLTFM
89 - select MMC_SDHCI_IO_ACCESSORS
90 - help
91 - This selects the BCM2835 SD/MMC controller. If you have a BCM2835
92 - platform with SD or MMC devices, say Y or M here.
93 -
94 - If unsure, say N.
95 -
96 config MMC_MOXART
97 tristate "MOXART SD/MMC Host Controller support"
98 depends on ARCH_MOXART && MMC
99 @@ -313,6 +302,35 @@ config MMC_SDHCI_ST
100 If you have a controller with this interface, say Y or M here.
101 If unsure, say N.
102
103 +config MMC_BCM2835
104 + tristate "MMC support on BCM2835"
105 + depends on MACH_BCM2708
106 + help
107 + This selects the MMC Interface on BCM2835.
108 +
109 + If you have a controller with this interface, say Y or M here.
110 +
111 + If unsure, say N.
112 +
113 +config MMC_BCM2835_DMA
114 + bool "DMA support on BCM2835 Arasan controller"
115 + depends on MMC_BCM2835
116 + help
117 + Enable DMA support on the Arasan SDHCI controller in Broadcom 2708
118 + based chips.
119 +
120 + If unsure, say N.
121 +
122 +config MMC_BCM2835_PIO_DMA_BARRIER
123 + int "Block count limit for PIO transfers"
124 + depends on MMC_BCM2835 && MMC_BCM2835_DMA
125 + range 0 256
126 + default 2
127 + help
128 + The inclusive limit in bytes under which PIO will be used instead of DMA
129 +
130 + If unsure, say 2 here.
131 +
132 config MMC_OMAP
133 tristate "TI OMAP Multimedia Card Interface support"
134 depends on ARCH_OMAP
135 diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
136 index b09ecfb..7b17387 100644
137 --- a/drivers/mmc/host/Makefile
138 +++ b/drivers/mmc/host/Makefile
139 @@ -17,6 +17,7 @@ obj-$(CONFIG_MMC_SDHCI_PXAV2) += sdhci-pxav2.o
140 obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c.o
141 obj-$(CONFIG_MMC_SDHCI_SIRF) += sdhci-sirf.o
142 obj-$(CONFIG_MMC_SDHCI_SPEAR) += sdhci-spear.o
143 +obj-$(CONFIG_MMC_BCM2835) += bcm2835-mmc.o
144 obj-$(CONFIG_MMC_WBSD) += wbsd.o
145 obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
146 obj-$(CONFIG_MMC_OMAP) += omap.o
147 diff --git a/drivers/mmc/host/bcm2835-mmc.c b/drivers/mmc/host/bcm2835-mmc.c
148 new file mode 100644
149 index 0000000..cefba7c
150 --- /dev/null
151 +++ b/drivers/mmc/host/bcm2835-mmc.c
152 @@ -0,0 +1,1557 @@
153 +/*
154 + * BCM2835 MMC host driver.
155 + *
156 + * Author: Gellert Weisz <gellert@raspberrypi.org>
157 + * Copyright 2014
158 + *
159 + * Based on
160 + * sdhci-bcm2708.c by Broadcom
161 + * sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko
162 + * sdhci.c and sdhci-pci.c by Pierre Ossman
163 + *
164 + * This program is free software; you can redistribute it and/or modify it
165 + * under the terms and conditions of the GNU General Public License,
166 + * version 2, as published by the Free Software Foundation.
167 + *
168 + * This program is distributed in the hope it will be useful, but WITHOUT
169 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
170 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
171 + * more details.
172 + *
173 + * You should have received a copy of the GNU General Public License
174 + * along with this program. If not, see <http://www.gnu.org/licenses/>.
175 + */
176 +
177 +#include <linux/delay.h>
178 +#include <linux/module.h>
179 +#include <linux/io.h>
180 +#include <linux/mmc/mmc.h>
181 +#include <linux/mmc/host.h>
182 +#include <linux/mmc/sd.h>
183 +#include <linux/scatterlist.h>
184 +#include <linux/of_address.h>
185 +#include <linux/of_irq.h>
186 +#include <linux/clk.h>
187 +#include <linux/platform_device.h>
188 +#include <linux/err.h>
189 +#include <linux/blkdev.h>
190 +#include <linux/dmaengine.h>
191 +#include <linux/dma-mapping.h>
192 +#include <linux/of_dma.h>
193 +
194 +#include "sdhci.h"
195 +
196 +
197 +#ifndef CONFIG_OF
198 + #define BCM2835_CLOCK_FREQ 250000000
199 +#endif
200 +
201 +#define DRIVER_NAME "mmc-bcm2835"
202 +
203 +#define DBG(f, x...) \
204 +pr_debug(DRIVER_NAME " [%s()]: " f, __func__, ## x)
205 +
206 +#ifndef CONFIG_MMC_BCM2835_DMA
207 + #define FORCE_PIO
208 +#endif
209 +
210 +
211 +/* the inclusive limit in bytes under which PIO will be used instead of DMA */
212 +#ifdef CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
213 +#define PIO_DMA_BARRIER CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
214 +#else
215 +#define PIO_DMA_BARRIER 00
216 +#endif
217 +
218 +#define MIN_FREQ 400000
219 +#define TIMEOUT_VAL 0xE
220 +#define BCM2835_SDHCI_WRITE_DELAY(f) (((2 * 1000000) / f) + 1)
221 +
222 +#ifndef BCM2708_PERI_BASE
223 + #define BCM2708_PERI_BASE 0x20000000
224 +#endif
225 +
226 +/* FIXME: Needs IOMMU support */
227 +#define BCM2835_VCMMU_SHIFT (0x7E000000 - BCM2708_PERI_BASE)
228 +
229 +
230 +struct bcm2835_host {
231 + spinlock_t lock;
232 +
233 + void __iomem *ioaddr;
234 + u32 phys_addr;
235 +
236 + struct mmc_host *mmc;
237 +
238 + u32 timeout;
239 +
240 + int clock; /* Current clock speed */
241 + u8 pwr; /* Current voltage */
242 +
243 + unsigned int max_clk; /* Max possible freq */
244 + unsigned int timeout_clk; /* Timeout freq (KHz) */
245 + unsigned int clk_mul; /* Clock Muliplier value */
246 +
247 + struct tasklet_struct finish_tasklet; /* Tasklet structures */
248 +
249 + struct timer_list timer; /* Timer for timeouts */
250 +
251 + struct sg_mapping_iter sg_miter; /* SG state for PIO */
252 + unsigned int blocks; /* remaining PIO blocks */
253 +
254 + int irq; /* Device IRQ */
255 +
256 +
257 + u32 ier; /* cached registers */
258 +
259 + struct mmc_request *mrq; /* Current request */
260 + struct mmc_command *cmd; /* Current command */
261 + struct mmc_data *data; /* Current data request */
262 + unsigned int data_early:1; /* Data finished before cmd */
263 +
264 + wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
265 +
266 + u32 thread_isr;
267 +
268 + u32 shadow;
269 +
270 + /*DMA part*/
271 + struct dma_chan *dma_chan_rx; /* DMA channel for reads */
272 + struct dma_chan *dma_chan_tx; /* DMA channel for writes */
273 + struct dma_async_tx_descriptor *tx_desc; /* descriptor */
274 +
275 + bool have_dma;
276 + bool use_dma;
277 + /*end of DMA part*/
278 +
279 + int max_delay; /* maximum length of time spent waiting */
280 +
281 + int flags; /* Host attributes */
282 +#define SDHCI_USE_SDMA (1<<0) /* Host is SDMA capable */
283 +#define SDHCI_USE_ADMA (1<<1) /* Host is ADMA capable */
284 +#define SDHCI_REQ_USE_DMA (1<<2) /* Use DMA for this req. */
285 +#define SDHCI_DEVICE_DEAD (1<<3) /* Device unresponsive */
286 +#define SDHCI_AUTO_CMD12 (1<<6) /* Auto CMD12 support */
287 +#define SDHCI_AUTO_CMD23 (1<<7) /* Auto CMD23 support */
288 +#define SDHCI_PV_ENABLED (1<<8) /* Preset value enabled */
289 +#define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */
290 +#define SDHCI_USE_PLATDMA (1<<12) /* Host uses 3rd party DMA */
291 +};
292 +
293 +
294 +static inline void bcm2835_mmc_writel(struct bcm2835_host *host, u32 val, int reg)
295 +{
296 + writel(val, host->ioaddr + reg);
297 + udelay(BCM2835_SDHCI_WRITE_DELAY(max(host->clock, MIN_FREQ)));
298 +}
299 +
300 +static inline void mmc_raw_writel(struct bcm2835_host *host, u32 val, int reg)
301 +{
302 + writel(val, host->ioaddr + reg);
303 +}
304 +
305 +static inline u32 bcm2835_mmc_readl(struct bcm2835_host *host, int reg)
306 +{
307 + return readl(host->ioaddr + reg);
308 +}
309 +
310 +static inline void bcm2835_mmc_writew(struct bcm2835_host *host, u16 val, int reg)
311 +{
312 + u32 oldval = (reg == SDHCI_COMMAND) ? host->shadow :
313 + bcm2835_mmc_readl(host, reg & ~3);
314 + u32 word_num = (reg >> 1) & 1;
315 + u32 word_shift = word_num * 16;
316 + u32 mask = 0xffff << word_shift;
317 + u32 newval = (oldval & ~mask) | (val << word_shift);
318 +
319 + if (reg == SDHCI_TRANSFER_MODE)
320 + host->shadow = newval;
321 + else
322 + bcm2835_mmc_writel(host, newval, reg & ~3);
323 +
324 +}
325 +
326 +static inline void bcm2835_mmc_writeb(struct bcm2835_host *host, u8 val, int reg)
327 +{
328 + u32 oldval = bcm2835_mmc_readl(host, reg & ~3);
329 + u32 byte_num = reg & 3;
330 + u32 byte_shift = byte_num * 8;
331 + u32 mask = 0xff << byte_shift;
332 + u32 newval = (oldval & ~mask) | (val << byte_shift);
333 +
334 + bcm2835_mmc_writel(host, newval, reg & ~3);
335 +}
336 +
337 +
338 +static inline u16 bcm2835_mmc_readw(struct bcm2835_host *host, int reg)
339 +{
340 + u32 val = bcm2835_mmc_readl(host, (reg & ~3));
341 + u32 word_num = (reg >> 1) & 1;
342 + u32 word_shift = word_num * 16;
343 + u32 word = (val >> word_shift) & 0xffff;
344 +
345 + return word;
346 +}
347 +
348 +static inline u8 bcm2835_mmc_readb(struct bcm2835_host *host, int reg)
349 +{
350 + u32 val = bcm2835_mmc_readl(host, (reg & ~3));
351 + u32 byte_num = reg & 3;
352 + u32 byte_shift = byte_num * 8;
353 + u32 byte = (val >> byte_shift) & 0xff;
354 +
355 + return byte;
356 +}
357 +
358 +static void bcm2835_mmc_unsignal_irqs(struct bcm2835_host *host, u32 clear)
359 +{
360 + u32 ier;
361 +
362 + ier = bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE);
363 + ier &= ~clear;
364 + /* change which requests generate IRQs - makes no difference to
365 + the content of SDHCI_INT_STATUS, or the need to acknowledge IRQs */
366 + bcm2835_mmc_writel(host, ier, SDHCI_SIGNAL_ENABLE);
367 +}
368 +
369 +
370 +static void bcm2835_mmc_dumpregs(struct bcm2835_host *host)
371 +{
372 + pr_debug(DRIVER_NAME ": =========== REGISTER DUMP (%s)===========\n",
373 + mmc_hostname(host->mmc));
374 +
375 + pr_debug(DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
376 + bcm2835_mmc_readl(host, SDHCI_DMA_ADDRESS),
377 + bcm2835_mmc_readw(host, SDHCI_HOST_VERSION));
378 + pr_debug(DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
379 + bcm2835_mmc_readw(host, SDHCI_BLOCK_SIZE),
380 + bcm2835_mmc_readw(host, SDHCI_BLOCK_COUNT));
381 + pr_debug(DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
382 + bcm2835_mmc_readl(host, SDHCI_ARGUMENT),
383 + bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE));
384 + pr_debug(DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
385 + bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE),
386 + bcm2835_mmc_readb(host, SDHCI_HOST_CONTROL));
387 + pr_debug(DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
388 + bcm2835_mmc_readb(host, SDHCI_POWER_CONTROL),
389 + bcm2835_mmc_readb(host, SDHCI_BLOCK_GAP_CONTROL));
390 + pr_debug(DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
391 + bcm2835_mmc_readb(host, SDHCI_WAKE_UP_CONTROL),
392 + bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL));
393 + pr_debug(DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
394 + bcm2835_mmc_readb(host, SDHCI_TIMEOUT_CONTROL),
395 + bcm2835_mmc_readl(host, SDHCI_INT_STATUS));
396 + pr_debug(DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
397 + bcm2835_mmc_readl(host, SDHCI_INT_ENABLE),
398 + bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE));
399 + pr_debug(DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
400 + bcm2835_mmc_readw(host, SDHCI_ACMD12_ERR),
401 + bcm2835_mmc_readw(host, SDHCI_SLOT_INT_STATUS));
402 + pr_debug(DRIVER_NAME ": Caps: 0x%08x | Caps_1: 0x%08x\n",
403 + bcm2835_mmc_readl(host, SDHCI_CAPABILITIES),
404 + bcm2835_mmc_readl(host, SDHCI_CAPABILITIES_1));
405 + pr_debug(DRIVER_NAME ": Cmd: 0x%08x | Max curr: 0x%08x\n",
406 + bcm2835_mmc_readw(host, SDHCI_COMMAND),
407 + bcm2835_mmc_readl(host, SDHCI_MAX_CURRENT));
408 + pr_debug(DRIVER_NAME ": Host ctl2: 0x%08x\n",
409 + bcm2835_mmc_readw(host, SDHCI_HOST_CONTROL2));
410 +
411 + pr_debug(DRIVER_NAME ": ===========================================\n");
412 +}
413 +
414 +
415 +static void bcm2835_mmc_reset(struct bcm2835_host *host, u8 mask)
416 +{
417 + unsigned long timeout;
418 +
419 + bcm2835_mmc_writeb(host, mask, SDHCI_SOFTWARE_RESET);
420 +
421 + if (mask & SDHCI_RESET_ALL)
422 + host->clock = 0;
423 +
424 + /* Wait max 100 ms */
425 + timeout = 100;
426 +
427 + /* hw clears the bit when it's done */
428 + while (bcm2835_mmc_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
429 + if (timeout == 0) {
430 + pr_err("%s: Reset 0x%x never completed.\n",
431 + mmc_hostname(host->mmc), (int)mask);
432 + bcm2835_mmc_dumpregs(host);
433 + return;
434 + }
435 + timeout--;
436 + mdelay(1);
437 + }
438 +
439 + if (100-timeout > 10 && 100-timeout > host->max_delay) {
440 + host->max_delay = 100-timeout;
441 + pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
442 + }
443 +}
444 +
445 +static void bcm2835_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
446 +
447 +static void bcm2835_mmc_init(struct bcm2835_host *host, int soft)
448 +{
449 + if (soft)
450 + bcm2835_mmc_reset(host, SDHCI_RESET_CMD|SDHCI_RESET_DATA);
451 + else
452 + bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
453 +
454 + host->ier = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
455 + SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT |
456 + SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC |
457 + SDHCI_INT_TIMEOUT | SDHCI_INT_DATA_END |
458 + SDHCI_INT_RESPONSE;
459 +
460 + bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE);
461 + bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
462 +
463 + if (soft) {
464 + /* force clock reconfiguration */
465 + host->clock = 0;
466 + bcm2835_mmc_set_ios(host->mmc, &host->mmc->ios);
467 + }
468 +}
469 +
470 +
471 +
472 +static void bcm2835_mmc_finish_data(struct bcm2835_host *host);
473 +
474 +static void bcm2835_mmc_dma_complete(void *param)
475 +{
476 + struct bcm2835_host *host = param;
477 + struct dma_chan *dma_chan;
478 + unsigned long flags;
479 + u32 dir_data;
480 +
481 + spin_lock_irqsave(&host->lock, flags);
482 +
483 + if (host->data && !(host->data->flags & MMC_DATA_WRITE)) {
484 + /* otherwise handled in SDHCI IRQ */
485 + dma_chan = host->dma_chan_rx;
486 + dir_data = DMA_FROM_DEVICE;
487 +
488 + dma_unmap_sg(dma_chan->device->dev,
489 + host->data->sg, host->data->sg_len,
490 + dir_data);
491 +
492 + bcm2835_mmc_finish_data(host);
493 + }
494 +
495 + spin_unlock_irqrestore(&host->lock, flags);
496 +}
497 +
498 +static void bcm2835_bcm2835_mmc_read_block_pio(struct bcm2835_host *host)
499 +{
500 + unsigned long flags;
501 + size_t blksize, len, chunk;
502 +
503 + u32 uninitialized_var(scratch);
504 + u8 *buf;
505 +
506 + blksize = host->data->blksz;
507 + chunk = 0;
508 +
509 + local_irq_save(flags);
510 +
511 + while (blksize) {
512 + if (!sg_miter_next(&host->sg_miter))
513 + BUG();
514 +
515 + len = min(host->sg_miter.length, blksize);
516 +
517 + blksize -= len;
518 + host->sg_miter.consumed = len;
519 +
520 + buf = host->sg_miter.addr;
521 +
522 + while (len) {
523 + if (chunk == 0) {
524 + scratch = bcm2835_mmc_readl(host, SDHCI_BUFFER);
525 + chunk = 4;
526 + }
527 +
528 + *buf = scratch & 0xFF;
529 +
530 + buf++;
531 + scratch >>= 8;
532 + chunk--;
533 + len--;
534 + }
535 + }
536 +
537 + sg_miter_stop(&host->sg_miter);
538 +
539 + local_irq_restore(flags);
540 +}
541 +
542 +static void bcm2835_bcm2835_mmc_write_block_pio(struct bcm2835_host *host)
543 +{
544 + unsigned long flags;
545 + size_t blksize, len, chunk;
546 + u32 scratch;
547 + u8 *buf;
548 +
549 + blksize = host->data->blksz;
550 + chunk = 0;
551 + chunk = 0;
552 + scratch = 0;
553 +
554 + local_irq_save(flags);
555 +
556 + while (blksize) {
557 + if (!sg_miter_next(&host->sg_miter))
558 + BUG();
559 +
560 + len = min(host->sg_miter.length, blksize);
561 +
562 + blksize -= len;
563 + host->sg_miter.consumed = len;
564 +
565 + buf = host->sg_miter.addr;
566 +
567 + while (len) {
568 + scratch |= (u32)*buf << (chunk * 8);
569 +
570 + buf++;
571 + chunk++;
572 + len--;
573 +
574 + if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
575 + mmc_raw_writel(host, scratch, SDHCI_BUFFER);
576 + chunk = 0;
577 + scratch = 0;
578 + }
579 + }
580 + }
581 +
582 + sg_miter_stop(&host->sg_miter);
583 +
584 + local_irq_restore(flags);
585 +}
586 +
587 +
588 +static void bcm2835_mmc_transfer_pio(struct bcm2835_host *host)
589 +{
590 + u32 mask;
591 +
592 + BUG_ON(!host->data);
593 +
594 + if (host->blocks == 0)
595 + return;
596 +
597 + if (host->data->flags & MMC_DATA_READ)
598 + mask = SDHCI_DATA_AVAILABLE;
599 + else
600 + mask = SDHCI_SPACE_AVAILABLE;
601 +
602 + while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
603 +
604 + if (host->data->flags & MMC_DATA_READ)
605 + bcm2835_bcm2835_mmc_read_block_pio(host);
606 + else
607 + bcm2835_bcm2835_mmc_write_block_pio(host);
608 +
609 + host->blocks--;
610 +
611 + /* QUIRK used in sdhci.c removes the 'if' */
612 + /* but it seems this is unnecessary */
613 + if (host->blocks == 0)
614 + break;
615 +
616 +
617 + }
618 +}
619 +
620 +
621 +static void bcm2835_mmc_transfer_dma(struct bcm2835_host *host)
622 +{
623 + u32 len, dir_data, dir_slave;
624 + struct dma_async_tx_descriptor *desc = NULL;
625 + struct dma_chan *dma_chan;
626 +
627 +
628 + WARN_ON(!host->data);
629 +
630 + if (!host->data)
631 + return;
632 +
633 + if (host->blocks == 0)
634 + return;
635 +
636 + if (host->data->flags & MMC_DATA_READ) {
637 + dma_chan = host->dma_chan_rx;
638 + dir_data = DMA_FROM_DEVICE;
639 + dir_slave = DMA_DEV_TO_MEM;
640 + } else {
641 + dma_chan = host->dma_chan_tx;
642 + dir_data = DMA_TO_DEVICE;
643 + dir_slave = DMA_MEM_TO_DEV;
644 + }
645 +
646 + BUG_ON(!dma_chan->device);
647 + BUG_ON(!dma_chan->device->dev);
648 + BUG_ON(!host->data->sg);
649 +
650 + len = dma_map_sg(dma_chan->device->dev, host->data->sg,
651 + host->data->sg_len, dir_data);
652 + if (len > 0) {
653 + desc = dmaengine_prep_slave_sg(dma_chan, host->data->sg,
654 + len, dir_slave,
655 + DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
656 + } else {
657 + dev_err(mmc_dev(host->mmc), "dma_map_sg returned zero length\n");
658 + }
659 + if (desc) {
660 + bcm2835_mmc_unsignal_irqs(host, SDHCI_INT_DATA_AVAIL |
661 + SDHCI_INT_SPACE_AVAIL);
662 + host->tx_desc = desc;
663 + desc->callback = bcm2835_mmc_dma_complete;
664 + desc->callback_param = host;
665 + dmaengine_submit(desc);
666 + dma_async_issue_pending(dma_chan);
667 + }
668 +
669 +}
670 +
671 +
672 +
673 +static void bcm2835_mmc_set_transfer_irqs(struct bcm2835_host *host)
674 +{
675 + u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
676 + u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;
677 +
678 + if (host->use_dma)
679 + host->ier = (host->ier & ~pio_irqs) | dma_irqs;
680 + else
681 + host->ier = (host->ier & ~dma_irqs) | pio_irqs;
682 +
683 + bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE);
684 + bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
685 +}
686 +
687 +
688 +static void bcm2835_mmc_prepare_data(struct bcm2835_host *host, struct mmc_command *cmd)
689 +{
690 + u8 count;
691 + struct mmc_data *data = cmd->data;
692 +
693 + WARN_ON(host->data);
694 +
695 + if (data || (cmd->flags & MMC_RSP_BUSY)) {
696 + count = TIMEOUT_VAL;
697 + bcm2835_mmc_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
698 + }
699 +
700 + if (!data)
701 + return;
702 +
703 + /* Sanity checks */
704 + BUG_ON(data->blksz * data->blocks > 524288);
705 + BUG_ON(data->blksz > host->mmc->max_blk_size);
706 + BUG_ON(data->blocks > 65535);
707 +
708 + host->data = data;
709 + host->data_early = 0;
710 + host->data->bytes_xfered = 0;
711 +
712 +
713 + if (!(host->flags & SDHCI_REQ_USE_DMA)) {
714 + int flags;
715 +
716 + flags = SG_MITER_ATOMIC;
717 + if (host->data->flags & MMC_DATA_READ)
718 + flags |= SG_MITER_TO_SG;
719 + else
720 + flags |= SG_MITER_FROM_SG;
721 + sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
722 + host->blocks = data->blocks;
723 + }
724 +
725 + host->use_dma = host->have_dma && data->blocks > PIO_DMA_BARRIER;
726 +
727 + bcm2835_mmc_set_transfer_irqs(host);
728 +
729 + /* Set the DMA boundary value and block size */
730 + bcm2835_mmc_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG,
731 + data->blksz), SDHCI_BLOCK_SIZE);
732 + bcm2835_mmc_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
733 +
734 + BUG_ON(!host->data);
735 +}
736 +
737 +static void bcm2835_mmc_set_transfer_mode(struct bcm2835_host *host,
738 + struct mmc_command *cmd)
739 +{
740 + u16 mode;
741 + struct mmc_data *data = cmd->data;
742 +
743 + if (data == NULL) {
744 + /* clear Auto CMD settings for no data CMDs */
745 + mode = bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE);
746 + bcm2835_mmc_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
747 + SDHCI_TRNS_AUTO_CMD23), SDHCI_TRANSFER_MODE);
748 + return;
749 + }
750 +
751 + WARN_ON(!host->data);
752 +
753 + mode = SDHCI_TRNS_BLK_CNT_EN;
754 +
755 + if ((mmc_op_multi(cmd->opcode) || data->blocks > 1)) {
756 + mode |= SDHCI_TRNS_MULTI;
757 +
758 + /*
759 + * If we are sending CMD23, CMD12 never gets sent
760 + * on successful completion (so no Auto-CMD12).
761 + */
762 + if (!host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD12))
763 + mode |= SDHCI_TRNS_AUTO_CMD12;
764 + else if (host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) {
765 + mode |= SDHCI_TRNS_AUTO_CMD23;
766 + bcm2835_mmc_writel(host, host->mrq->sbc->arg, SDHCI_ARGUMENT2);
767 + }
768 + }
769 +
770 + if (data->flags & MMC_DATA_READ)
771 + mode |= SDHCI_TRNS_READ;
772 + if (host->flags & SDHCI_REQ_USE_DMA)
773 + mode |= SDHCI_TRNS_DMA;
774 +
775 + bcm2835_mmc_writew(host, mode, SDHCI_TRANSFER_MODE);
776 +}
777 +
778 +void bcm2835_mmc_send_command(struct bcm2835_host *host, struct mmc_command *cmd)
779 +{
780 + int flags;
781 + u32 mask;
782 + unsigned long timeout;
783 +
784 + WARN_ON(host->cmd);
785 +
786 + /* Wait max 10 ms */
787 + timeout = 1000;
788 +
789 + mask = SDHCI_CMD_INHIBIT;
790 + if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
791 + mask |= SDHCI_DATA_INHIBIT;
792 +
793 + /* We shouldn't wait for data inihibit for stop commands, even
794 + though they might use busy signaling */
795 + if (host->mrq->data && (cmd == host->mrq->data->stop))
796 + mask &= ~SDHCI_DATA_INHIBIT;
797 +
798 + while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
799 + if (timeout == 0) {
800 + pr_err("%s: Controller never released inhibit bit(s).\n",
801 + mmc_hostname(host->mmc));
802 + bcm2835_mmc_dumpregs(host);
803 + cmd->error = -EIO;
804 + tasklet_schedule(&host->finish_tasklet);
805 + return;
806 + }
807 + timeout--;
808 + udelay(10);
809 + }
810 +
811 + if ((1000-timeout)/100 > 1 && (1000-timeout)/100 > host->max_delay) {
812 + host->max_delay = (1000-timeout)/100;
813 + pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
814 + }
815 +
816 + timeout = jiffies;
817 +#ifdef CONFIG_OF
818 + if (!cmd->data && cmd->busy_timeout > 9000)
819 + timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ;
820 + else
821 +#endif
822 + timeout += 10 * HZ;
823 + mod_timer(&host->timer, timeout);
824 +
825 + host->cmd = cmd;
826 +
827 + bcm2835_mmc_prepare_data(host, cmd);
828 +
829 + bcm2835_mmc_writel(host, cmd->arg, SDHCI_ARGUMENT);
830 +
831 + bcm2835_mmc_set_transfer_mode(host, cmd);
832 +
833 + if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
834 + pr_err("%s: Unsupported response type!\n",
835 + mmc_hostname(host->mmc));
836 + cmd->error = -EINVAL;
837 + tasklet_schedule(&host->finish_tasklet);
838 + return;
839 + }
840 +
841 + if (!(cmd->flags & MMC_RSP_PRESENT))
842 + flags = SDHCI_CMD_RESP_NONE;
843 + else if (cmd->flags & MMC_RSP_136)
844 + flags = SDHCI_CMD_RESP_LONG;
845 + else if (cmd->flags & MMC_RSP_BUSY)
846 + flags = SDHCI_CMD_RESP_SHORT_BUSY;
847 + else
848 + flags = SDHCI_CMD_RESP_SHORT;
849 +
850 + if (cmd->flags & MMC_RSP_CRC)
851 + flags |= SDHCI_CMD_CRC;
852 + if (cmd->flags & MMC_RSP_OPCODE)
853 + flags |= SDHCI_CMD_INDEX;
854 +
855 + if (cmd->data)
856 + flags |= SDHCI_CMD_DATA;
857 +
858 + bcm2835_mmc_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
859 +}
860 +
861 +
862 +static void bcm2835_mmc_finish_data(struct bcm2835_host *host)
863 +{
864 + struct mmc_data *data;
865 +
866 + BUG_ON(!host->data);
867 +
868 + data = host->data;
869 + host->data = NULL;
870 +
871 + if (data->error)
872 + data->bytes_xfered = 0;
873 + else
874 + data->bytes_xfered = data->blksz * data->blocks;
875 +
876 + /*
877 + * Need to send CMD12 if -
878 + * a) open-ended multiblock transfer (no CMD23)
879 + * b) error in multiblock transfer
880 + */
881 + if (data->stop &&
882 + (data->error ||
883 + !host->mrq->sbc)) {
884 +
885 + /*
886 + * The controller needs a reset of internal state machines
887 + * upon error conditions.
888 + */
889 + if (data->error) {
890 + bcm2835_mmc_reset(host, SDHCI_RESET_CMD);
891 + bcm2835_mmc_reset(host, SDHCI_RESET_DATA);
892 + }
893 +
894 + bcm2835_mmc_send_command(host, data->stop);
895 + } else
896 + tasklet_schedule(&host->finish_tasklet);
897 +}
898 +
899 +static void bcm2835_mmc_finish_command(struct bcm2835_host *host)
900 +{
901 + int i;
902 +
903 + BUG_ON(host->cmd == NULL);
904 +
905 + if (host->cmd->flags & MMC_RSP_PRESENT) {
906 + if (host->cmd->flags & MMC_RSP_136) {
907 + /* CRC is stripped so we need to do some shifting. */
908 + for (i = 0; i < 4; i++) {
909 + host->cmd->resp[i] = bcm2835_mmc_readl(host,
910 + SDHCI_RESPONSE + (3-i)*4) << 8;
911 + if (i != 3)
912 + host->cmd->resp[i] |=
913 + bcm2835_mmc_readb(host,
914 + SDHCI_RESPONSE + (3-i)*4-1);
915 + }
916 + } else {
917 + host->cmd->resp[0] = bcm2835_mmc_readl(host, SDHCI_RESPONSE);
918 + }
919 + }
920 +
921 + host->cmd->error = 0;
922 +
923 + /* Finished CMD23, now send actual command. */
924 + if (host->cmd == host->mrq->sbc) {
925 + host->cmd = NULL;
926 + bcm2835_mmc_send_command(host, host->mrq->cmd);
927 +
928 + if (host->mrq->cmd->data && host->use_dma) {
929 + /* DMA transfer starts now, PIO starts after interrupt */
930 + bcm2835_mmc_transfer_dma(host);
931 + }
932 + } else {
933 +
934 + /* Processed actual command. */
935 + if (host->data && host->data_early)
936 + bcm2835_mmc_finish_data(host);
937 +
938 + if (!host->cmd->data)
939 + tasklet_schedule(&host->finish_tasklet);
940 +
941 + host->cmd = NULL;
942 + }
943 +}
944 +
945 +
946 +static void bcm2835_mmc_timeout_timer(unsigned long data)
947 +{
948 + struct bcm2835_host *host;
949 + unsigned long flags;
950 +
951 + host = (struct bcm2835_host *)data;
952 +
953 + spin_lock_irqsave(&host->lock, flags);
954 +
955 + if (host->mrq) {
956 + pr_err("%s: Timeout waiting for hardware interrupt.\n",
957 + mmc_hostname(host->mmc));
958 + bcm2835_mmc_dumpregs(host);
959 +
960 + if (host->data) {
961 + host->data->error = -ETIMEDOUT;
962 + bcm2835_mmc_finish_data(host);
963 + } else {
964 + if (host->cmd)
965 + host->cmd->error = -ETIMEDOUT;
966 + else
967 + host->mrq->cmd->error = -ETIMEDOUT;
968 +
969 + tasklet_schedule(&host->finish_tasklet);
970 + }
971 + }
972 +
973 + mmiowb();
974 + spin_unlock_irqrestore(&host->lock, flags);
975 +}
976 +
977 +
978 +static void bcm2835_mmc_enable_sdio_irq_nolock(struct bcm2835_host *host, int enable)
979 +{
980 + if (!(host->flags & SDHCI_DEVICE_DEAD)) {
981 + if (enable)
982 + host->ier |= SDHCI_INT_CARD_INT;
983 + else
984 + host->ier &= ~SDHCI_INT_CARD_INT;
985 +
986 + bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE);
987 + bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
988 + mmiowb();
989 + }
990 +}
991 +
992 +static void bcm2835_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
993 +{
994 + struct bcm2835_host *host = mmc_priv(mmc);
995 + unsigned long flags;
996 +
997 + spin_lock_irqsave(&host->lock, flags);
998 + if (enable)
999 + host->flags |= SDHCI_SDIO_IRQ_ENABLED;
1000 + else
1001 + host->flags &= ~SDHCI_SDIO_IRQ_ENABLED;
1002 +
1003 + bcm2835_mmc_enable_sdio_irq_nolock(host, enable);
1004 + spin_unlock_irqrestore(&host->lock, flags);
1005 +}
1006 +
1007 +static void bcm2835_mmc_cmd_irq(struct bcm2835_host *host, u32 intmask)
1008 +{
1009 +
1010 + BUG_ON(intmask == 0);
1011 +
1012 + if (!host->cmd) {
1013 + pr_err("%s: Got command interrupt 0x%08x even "
1014 + "though no command operation was in progress.\n",
1015 + mmc_hostname(host->mmc), (unsigned)intmask);
1016 + bcm2835_mmc_dumpregs(host);
1017 + return;
1018 + }
1019 +
1020 + if (intmask & SDHCI_INT_TIMEOUT)
1021 + host->cmd->error = -ETIMEDOUT;
1022 + else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
1023 + SDHCI_INT_INDEX)) {
1024 + host->cmd->error = -EILSEQ;
1025 + }
1026 +
1027 + if (host->cmd->error) {
1028 + tasklet_schedule(&host->finish_tasklet);
1029 + return;
1030 + }
1031 +
1032 + if (intmask & SDHCI_INT_RESPONSE)
1033 + bcm2835_mmc_finish_command(host);
1034 +
1035 +}
1036 +
1037 +static void bcm2835_mmc_data_irq(struct bcm2835_host *host, u32 intmask)
1038 +{
1039 + struct dma_chan *dma_chan;
1040 + u32 dir_data;
1041 +
1042 + BUG_ON(intmask == 0);
1043 +
1044 + if (!host->data) {
1045 + /*
1046 + * The "data complete" interrupt is also used to
1047 + * indicate that a busy state has ended. See comment
1048 + * above in sdhci_cmd_irq().
1049 + */
1050 + if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
1051 + if (intmask & SDHCI_INT_DATA_END) {
1052 + bcm2835_mmc_finish_command(host);
1053 + return;
1054 + }
1055 + }
1056 +
1057 + pr_debug("%s: Got data interrupt 0x%08x even "
1058 + "though no data operation was in progress.\n",
1059 + mmc_hostname(host->mmc), (unsigned)intmask);
1060 + bcm2835_mmc_dumpregs(host);
1061 +
1062 + return;
1063 + }
1064 +
1065 + if (intmask & SDHCI_INT_DATA_TIMEOUT)
1066 + host->data->error = -ETIMEDOUT;
1067 + else if (intmask & SDHCI_INT_DATA_END_BIT)
1068 + host->data->error = -EILSEQ;
1069 + else if ((intmask & SDHCI_INT_DATA_CRC) &&
1070 + SDHCI_GET_CMD(bcm2835_mmc_readw(host, SDHCI_COMMAND))
1071 + != MMC_BUS_TEST_R)
1072 + host->data->error = -EILSEQ;
1073 +
1074 + if (host->use_dma) {
1075 + if (host->data->flags & MMC_DATA_WRITE) {
1076 + /* IRQ handled here */
1077 +
1078 + dma_chan = host->dma_chan_tx;
1079 + dir_data = DMA_TO_DEVICE;
1080 + dma_unmap_sg(dma_chan->device->dev,
1081 + host->data->sg, host->data->sg_len,
1082 + dir_data);
1083 +
1084 + bcm2835_mmc_finish_data(host);
1085 + }
1086 +
1087 + } else {
1088 + if (host->data->error)
1089 + bcm2835_mmc_finish_data(host);
1090 + else {
1091 + if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1092 + bcm2835_mmc_transfer_pio(host);
1093 +
1094 + if (intmask & SDHCI_INT_DATA_END) {
1095 + if (host->cmd) {
1096 + /*
1097 + * Data managed to finish before the
1098 + * command completed. Make sure we do
1099 + * things in the proper order.
1100 + */
1101 + host->data_early = 1;
1102 + } else {
1103 + bcm2835_mmc_finish_data(host);
1104 + }
1105 + }
1106 + }
1107 + }
1108 +}
1109 +
1110 +
1111 +static irqreturn_t bcm2835_mmc_irq(int irq, void *dev_id)
1112 +{
1113 + irqreturn_t result = IRQ_NONE;
1114 + struct bcm2835_host *host = dev_id;
1115 + u32 intmask, mask, unexpected = 0;
1116 + int max_loops = 16;
1117 +#ifndef CONFIG_OF
1118 + int cardint = 0;
1119 +#endif
1120 +
1121 + spin_lock(&host->lock);
1122 +
1123 + intmask = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1124 +
1125 + if (!intmask || intmask == 0xffffffff) {
1126 + result = IRQ_NONE;
1127 + goto out;
1128 + }
1129 +
1130 + do {
1131 + /* Clear selected interrupts. */
1132 + mask = intmask & (SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK |
1133 + SDHCI_INT_BUS_POWER);
1134 + bcm2835_mmc_writel(host, mask, SDHCI_INT_STATUS);
1135 +
1136 +
1137 + if (intmask & SDHCI_INT_CMD_MASK)
1138 + bcm2835_mmc_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1139 +
1140 + if (intmask & SDHCI_INT_DATA_MASK)
1141 + bcm2835_mmc_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1142 +
1143 + if (intmask & SDHCI_INT_BUS_POWER)
1144 + pr_err("%s: Card is consuming too much power!\n",
1145 + mmc_hostname(host->mmc));
1146 +
1147 + if (intmask & SDHCI_INT_CARD_INT) {
1148 +#ifndef CONFIG_OF
1149 + cardint = 1;
1150 +#else
1151 + bcm2835_mmc_enable_sdio_irq_nolock(host, false);
1152 + host->thread_isr |= SDHCI_INT_CARD_INT;
1153 + result = IRQ_WAKE_THREAD;
1154 +#endif
1155 + }
1156 +
1157 + intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE |
1158 + SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK |
1159 + SDHCI_INT_ERROR | SDHCI_INT_BUS_POWER |
1160 + SDHCI_INT_CARD_INT);
1161 +
1162 + if (intmask) {
1163 + unexpected |= intmask;
1164 + bcm2835_mmc_writel(host, intmask, SDHCI_INT_STATUS);
1165 + }
1166 +
1167 + if (result == IRQ_NONE)
1168 + result = IRQ_HANDLED;
1169 +
1170 + intmask = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1171 + } while (intmask && --max_loops);
1172 +out:
1173 + spin_unlock(&host->lock);
1174 +
1175 + if (unexpected) {
1176 + pr_err("%s: Unexpected interrupt 0x%08x.\n",
1177 + mmc_hostname(host->mmc), unexpected);
1178 + bcm2835_mmc_dumpregs(host);
1179 + }
1180 +
1181 +#ifndef CONFIG_OF
1182 + if (cardint)
1183 + mmc_signal_sdio_irq(host->mmc);
1184 +#endif
1185 +
1186 + return result;
1187 +}
1188 +
1189 +#ifdef CONFIG_OF
1190 +static irqreturn_t bcm2835_mmc_thread_irq(int irq, void *dev_id)
1191 +{
1192 + struct bcm2835_host *host = dev_id;
1193 + unsigned long flags;
1194 + u32 isr;
1195 +
1196 + spin_lock_irqsave(&host->lock, flags);
1197 + isr = host->thread_isr;
1198 + host->thread_isr = 0;
1199 + spin_unlock_irqrestore(&host->lock, flags);
1200 +
1201 + if (isr & SDHCI_INT_CARD_INT) {
1202 + sdio_run_irqs(host->mmc);
1203 +
1204 + spin_lock_irqsave(&host->lock, flags);
1205 + if (host->flags & SDHCI_SDIO_IRQ_ENABLED)
1206 + bcm2835_mmc_enable_sdio_irq_nolock(host, true);
1207 + spin_unlock_irqrestore(&host->lock, flags);
1208 + }
1209 +
1210 + return isr ? IRQ_HANDLED : IRQ_NONE;
1211 +}
1212 +#endif
1213 +
1214 +
1215 +
1216 +void bcm2835_mmc_set_clock(struct bcm2835_host *host, unsigned int clock)
1217 +{
1218 + int div = 0; /* Initialized for compiler warning */
1219 + int real_div = div, clk_mul = 1;
1220 + u16 clk = 0;
1221 + unsigned long timeout;
1222 +
1223 +
1224 + host->mmc->actual_clock = 0;
1225 +
1226 + bcm2835_mmc_writew(host, 0, SDHCI_CLOCK_CONTROL);
1227 +
1228 + if (clock == 0)
1229 + return;
1230 +
1231 + /* Version 3.00 divisors must be a multiple of 2. */
1232 + if (host->max_clk <= clock)
1233 + div = 1;
1234 + else {
1235 + for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
1236 + div += 2) {
1237 + if ((host->max_clk / div) <= clock)
1238 + break;
1239 + }
1240 + }
1241 +
1242 + real_div = div;
1243 + div >>= 1;
1244 +
1245 + if (real_div)
1246 + host->mmc->actual_clock = (host->max_clk * clk_mul) / real_div;
1247 +
1248 + clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
1249 + clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
1250 + << SDHCI_DIVIDER_HI_SHIFT;
1251 + clk |= SDHCI_CLOCK_INT_EN;
1252 + bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1253 +
1254 + /* Wait max 20 ms */
1255 + timeout = 20;
1256 + while (!((clk = bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL))
1257 + & SDHCI_CLOCK_INT_STABLE)) {
1258 + if (timeout == 0) {
1259 + pr_err("%s: Internal clock never "
1260 + "stabilised.\n", mmc_hostname(host->mmc));
1261 + bcm2835_mmc_dumpregs(host);
1262 + return;
1263 + }
1264 + timeout--;
1265 + mdelay(1);
1266 + }
1267 +
1268 + if (20-timeout > 10 && 20-timeout > host->max_delay) {
1269 + host->max_delay = 20-timeout;
1270 + pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
1271 + }
1272 +
1273 + clk |= SDHCI_CLOCK_CARD_EN;
1274 + bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1275 +}
1276 +
1277 +static void bcm2835_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
1278 +{
1279 + struct bcm2835_host *host;
1280 + unsigned long flags;
1281 +
1282 + host = mmc_priv(mmc);
1283 +
1284 + spin_lock_irqsave(&host->lock, flags);
1285 +
1286 + WARN_ON(host->mrq != NULL);
1287 +
1288 + host->mrq = mrq;
1289 +
1290 + if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23))
1291 + bcm2835_mmc_send_command(host, mrq->sbc);
1292 + else
1293 + bcm2835_mmc_send_command(host, mrq->cmd);
1294 +
1295 + mmiowb();
1296 + spin_unlock_irqrestore(&host->lock, flags);
1297 +
1298 + if (!(mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) && mrq->cmd->data && host->use_dma) {
1299 + /* DMA transfer starts now, PIO starts after interrupt */
1300 + bcm2835_mmc_transfer_dma(host);
1301 + }
1302 +}
1303 +
1304 +
1305 +static void bcm2835_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1306 +{
1307 +
1308 + struct bcm2835_host *host = mmc_priv(mmc);
1309 + unsigned long flags;
1310 + u8 ctrl;
1311 + u16 clk, ctrl_2;
1312 +
1313 +
1314 + spin_lock_irqsave(&host->lock, flags);
1315 +
1316 + if (!ios->clock || ios->clock != host->clock) {
1317 + bcm2835_mmc_set_clock(host, ios->clock);
1318 + host->clock = ios->clock;
1319 + }
1320 +
1321 + if (host->pwr != SDHCI_POWER_330) {
1322 + host->pwr = SDHCI_POWER_330;
1323 + bcm2835_mmc_writeb(host, SDHCI_POWER_330 | SDHCI_POWER_ON, SDHCI_POWER_CONTROL);
1324 + }
1325 +
1326 + ctrl = bcm2835_mmc_readb(host, SDHCI_HOST_CONTROL);
1327 +
1328 + /* set bus width */
1329 + ctrl &= ~SDHCI_CTRL_8BITBUS;
1330 + if (ios->bus_width == MMC_BUS_WIDTH_4)
1331 + ctrl |= SDHCI_CTRL_4BITBUS;
1332 + else
1333 + ctrl &= ~SDHCI_CTRL_4BITBUS;
1334 +
1335 + ctrl &= ~SDHCI_CTRL_HISPD; /* NO_HISPD_BIT */
1336 +
1337 +
1338 + bcm2835_mmc_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1339 + /*
1340 + * We only need to set Driver Strength if the
1341 + * preset value enable is not set.
1342 + */
1343 + ctrl_2 = bcm2835_mmc_readw(host, SDHCI_HOST_CONTROL2);
1344 + ctrl_2 &= ~SDHCI_CTRL_DRV_TYPE_MASK;
1345 + if (ios->drv_type == MMC_SET_DRIVER_TYPE_A)
1346 + ctrl_2 |= SDHCI_CTRL_DRV_TYPE_A;
1347 + else if (ios->drv_type == MMC_SET_DRIVER_TYPE_C)
1348 + ctrl_2 |= SDHCI_CTRL_DRV_TYPE_C;
1349 +
1350 + bcm2835_mmc_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
1351 +
1352 + /* Reset SD Clock Enable */
1353 + clk = bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL);
1354 + clk &= ~SDHCI_CLOCK_CARD_EN;
1355 + bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1356 +
1357 + /* Re-enable SD Clock */
1358 + bcm2835_mmc_set_clock(host, host->clock);
1359 + bcm2835_mmc_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1360 +
1361 + mmiowb();
1362 +
1363 + spin_unlock_irqrestore(&host->lock, flags);
1364 +}
1365 +
1366 +
1367 +static struct mmc_host_ops bcm2835_ops = {
1368 + .request = bcm2835_mmc_request,
1369 + .set_ios = bcm2835_mmc_set_ios,
1370 + .enable_sdio_irq = bcm2835_mmc_enable_sdio_irq,
1371 +};
1372 +
1373 +
1374 +static void bcm2835_mmc_tasklet_finish(unsigned long param)
1375 +{
1376 + struct bcm2835_host *host;
1377 + unsigned long flags;
1378 + struct mmc_request *mrq;
1379 +
1380 + host = (struct bcm2835_host *)param;
1381 +
1382 + spin_lock_irqsave(&host->lock, flags);
1383 +
1384 + /*
1385 + * If this tasklet gets rescheduled while running, it will
1386 + * be run again afterwards but without any active request.
1387 + */
1388 + if (!host->mrq) {
1389 + spin_unlock_irqrestore(&host->lock, flags);
1390 + return;
1391 + }
1392 +
1393 + del_timer(&host->timer);
1394 +
1395 + mrq = host->mrq;
1396 +
1397 + /*
1398 + * The controller needs a reset of internal state machines
1399 + * upon error conditions.
1400 + */
1401 + if (!(host->flags & SDHCI_DEVICE_DEAD) &&
1402 + ((mrq->cmd && mrq->cmd->error) ||
1403 + (mrq->data && (mrq->data->error ||
1404 + (mrq->data->stop && mrq->data->stop->error))))) {
1405 +
1406 + bcm2835_mmc_reset(host, SDHCI_RESET_CMD);
1407 + bcm2835_mmc_reset(host, SDHCI_RESET_DATA);
1408 + }
1409 +
1410 + host->mrq = NULL;
1411 + host->cmd = NULL;
1412 + host->data = NULL;
1413 +
1414 + mmiowb();
1415 +
1416 + spin_unlock_irqrestore(&host->lock, flags);
1417 + mmc_request_done(host->mmc, mrq);
1418 +}
1419 +
1420 +
1421 +
1422 +int bcm2835_mmc_add_host(struct bcm2835_host *host)
1423 +{
1424 + struct mmc_host *mmc;
1425 +#ifndef FORCE_PIO
1426 + struct dma_slave_config cfg;
1427 +#endif
1428 + int ret;
1429 +
1430 + mmc = host->mmc;
1431 +
1432 + bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
1433 +
1434 + host->clk_mul = 0;
1435 +
1436 + mmc->ops = &bcm2835_ops;
1437 + mmc->f_max = host->max_clk;
1438 + mmc->f_max = host->max_clk;
1439 + mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
1440 +
1441 + /* SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK */
1442 + host->timeout_clk = mmc->f_max / 1000;
1443 +#ifdef CONFIG_OF
1444 + mmc->max_busy_timeout = (1 << 27) / host->timeout_clk;
1445 +#endif
1446 + /* host controller capabilities */
1447 + mmc->caps = MMC_CAP_CMD23 | MMC_CAP_ERASE | MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ |
1448 + MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_4_BIT_DATA;
1449 +
1450 + host->flags = SDHCI_AUTO_CMD23;
1451 +
1452 + spin_lock_init(&host->lock);
1453 +
1454 +
1455 +#ifdef FORCE_PIO
1456 + pr_info("Forcing PIO mode\n");
1457 + host->have_dma = false;
1458 +#else
1459 + if (!host->dma_chan_tx || !host->dma_chan_rx ||
1460 + IS_ERR(host->dma_chan_tx) || IS_ERR(host->dma_chan_rx)) {
1461 + pr_err("%s: Unable to initialise DMA channels. Falling back to PIO\n", DRIVER_NAME);
1462 + host->have_dma = false;
1463 + } else {
1464 + pr_info("DMA channels allocated for the MMC driver");
1465 + host->have_dma = true;
1466 +
1467 + cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1468 + cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1469 + cfg.slave_id = 11; /* DREQ channel */
1470 +
1471 + cfg.direction = DMA_MEM_TO_DEV;
1472 + cfg.src_addr = 0;
1473 + cfg.dst_addr = host->phys_addr + SDHCI_BUFFER;
1474 + ret = dmaengine_slave_config(host->dma_chan_tx, &cfg);
1475 +
1476 + cfg.direction = DMA_DEV_TO_MEM;
1477 + cfg.src_addr = host->phys_addr + SDHCI_BUFFER;
1478 + cfg.dst_addr = 0;
1479 + ret = dmaengine_slave_config(host->dma_chan_rx, &cfg);
1480 + }
1481 +#endif
1482 +
1483 +
1484 + mmc->max_segs = 128;
1485 + mmc->max_req_size = 524288;
1486 + mmc->max_seg_size = mmc->max_req_size;
1487 + mmc->max_blk_size = 512;
1488 + mmc->max_blk_count = 65535;
1489 +
1490 + /* report supported voltage ranges */
1491 + mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1492 +
1493 + tasklet_init(&host->finish_tasklet,
1494 + bcm2835_mmc_tasklet_finish, (unsigned long)host);
1495 +
1496 + setup_timer(&host->timer, bcm2835_mmc_timeout_timer, (unsigned long)host);
1497 + init_waitqueue_head(&host->buf_ready_int);
1498 +
1499 + bcm2835_mmc_init(host, 0);
1500 +#ifndef CONFIG_OF
1501 + ret = request_irq(host->irq, bcm2835_mmc_irq, 0 /*IRQF_SHARED*/,
1502 + mmc_hostname(mmc), host);
1503 +#else
1504 + ret = request_threaded_irq(host->irq, bcm2835_mmc_irq, bcm2835_mmc_thread_irq,
1505 + IRQF_SHARED, mmc_hostname(mmc), host);
1506 +#endif
1507 + if (ret) {
1508 + pr_err("%s: Failed to request IRQ %d: %d\n",
1509 + mmc_hostname(mmc), host->irq, ret);
1510 + goto untasklet;
1511 + }
1512 +
1513 + mmiowb();
1514 + mmc_add_host(mmc);
1515 +
1516 + pr_info("Load BCM2835 MMC driver\n");
1517 +
1518 + return 0;
1519 +
1520 +untasklet:
1521 + tasklet_kill(&host->finish_tasklet);
1522 +
1523 + return ret;
1524 +}
1525 +
1526 +static int bcm2835_mmc_probe(struct platform_device *pdev)
1527 +{
1528 + struct device *dev = &pdev->dev;
1529 +#ifdef CONFIG_OF
1530 + struct device_node *node = dev->of_node;
1531 + struct clk *clk;
1532 +#endif
1533 + struct resource *iomem;
1534 + struct bcm2835_host *host = NULL;
1535 +
1536 + int ret;
1537 + struct mmc_host *mmc;
1538 +#if !defined(CONFIG_OF) && !defined(FORCE_PIO)
1539 + dma_cap_mask_t mask;
1540 +#endif
1541 +
1542 + iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1543 + if (!iomem) {
1544 + ret = -ENOMEM;
1545 + goto err;
1546 + }
1547 +
1548 + if (resource_size(iomem) < 0x100)
1549 + dev_err(&pdev->dev, "Invalid iomem size!\n");
1550 +
1551 + mmc = mmc_alloc_host(sizeof(struct bcm2835_host), dev);
1552 + host = mmc_priv(mmc);
1553 + host->mmc = mmc;
1554 +
1555 +
1556 + if (IS_ERR(host)) {
1557 + ret = PTR_ERR(host);
1558 + goto err;
1559 + }
1560 +
1561 + host->phys_addr = iomem->start + BCM2835_VCMMU_SHIFT;
1562 +
1563 +#ifndef CONFIG_OF
1564 +#ifndef FORCE_PIO
1565 + dma_cap_zero(mask);
1566 + /* we don't care about the channel, any would work */
1567 + dma_cap_set(DMA_SLAVE, mask);
1568 +
1569 + host->dma_chan_tx = dma_request_channel(mask, NULL, NULL);
1570 + host->dma_chan_rx = dma_request_channel(mask, NULL, NULL);
1571 +#endif
1572 + host->max_clk = BCM2835_CLOCK_FREQ;
1573 +
1574 +#else
1575 +#ifndef FORCE_PIO
1576 + host->dma_chan_tx = of_dma_request_slave_channel(node, "tx");
1577 + host->dma_chan_rx = of_dma_request_slave_channel(node, "rx");
1578 +#endif
1579 + clk = of_clk_get(node, 0);
1580 + if (IS_ERR(clk)) {
1581 + dev_err(dev, "get CLOCK failed\n");
1582 + ret = PTR_ERR(clk);
1583 + goto out;
1584 + }
1585 + host->max_clk = (clk_get_rate(clk));
1586 +#endif
1587 + host->irq = platform_get_irq(pdev, 0);
1588 +
1589 + if (!request_mem_region(iomem->start, resource_size(iomem),
1590 + mmc_hostname(host->mmc))) {
1591 + dev_err(&pdev->dev, "cannot request region\n");
1592 + ret = -EBUSY;
1593 + goto err_request;
1594 + }
1595 +
1596 + host->ioaddr = ioremap(iomem->start, resource_size(iomem));
1597 + if (!host->ioaddr) {
1598 + dev_err(&pdev->dev, "failed to remap registers\n");
1599 + ret = -ENOMEM;
1600 + goto err_remap;
1601 + }
1602 +
1603 + platform_set_drvdata(pdev, host);
1604 +
1605 +
1606 + if (host->irq <= 0) {
1607 + dev_err(dev, "get IRQ failed\n");
1608 + ret = -EINVAL;
1609 + goto out;
1610 + }
1611 +
1612 +
1613 +#ifndef CONFIG_OF
1614 + mmc->caps |= MMC_CAP_4_BIT_DATA;
1615 +#else
1616 + mmc_of_parse(mmc);
1617 +#endif
1618 + host->timeout = msecs_to_jiffies(1000);
1619 + spin_lock_init(&host->lock);
1620 + mmc->ops = &bcm2835_ops;
1621 + return bcm2835_mmc_add_host(host);
1622 +
1623 +
1624 +err_remap:
1625 + release_mem_region(iomem->start, resource_size(iomem));
1626 +err_request:
1627 + mmc_free_host(host->mmc);
1628 +err:
1629 + dev_err(&pdev->dev, "%s failed %d\n", __func__, ret);
1630 + return ret;
1631 +out:
1632 + if (mmc)
1633 + mmc_free_host(mmc);
1634 + return ret;
1635 +}
1636 +
1637 +static int bcm2835_mmc_remove(struct platform_device *pdev)
1638 +{
1639 + struct bcm2835_host *host = platform_get_drvdata(pdev);
1640 + struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1641 + unsigned long flags;
1642 + int dead;
1643 + u32 scratch;
1644 +
1645 + dead = 0;
1646 + scratch = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1647 + if (scratch == (u32)-1)
1648 + dead = 1;
1649 +
1650 +
1651 + if (dead) {
1652 + spin_lock_irqsave(&host->lock, flags);
1653 +
1654 + host->flags |= SDHCI_DEVICE_DEAD;
1655 +
1656 + if (host->mrq) {
1657 + pr_err("%s: Controller removed during "
1658 + " transfer!\n", mmc_hostname(host->mmc));
1659 +
1660 + host->mrq->cmd->error = -ENOMEDIUM;
1661 + tasklet_schedule(&host->finish_tasklet);
1662 + }
1663 +
1664 + spin_unlock_irqrestore(&host->lock, flags);
1665 + }
1666 +
1667 + mmc_remove_host(host->mmc);
1668 +
1669 + if (!dead)
1670 + bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
1671 +
1672 + free_irq(host->irq, host);
1673 +
1674 + del_timer_sync(&host->timer);
1675 +
1676 + tasklet_kill(&host->finish_tasklet);
1677 +
1678 + iounmap(host->ioaddr);
1679 + release_mem_region(iomem->start, resource_size(iomem));
1680 + mmc_free_host(host->mmc);
1681 + platform_set_drvdata(pdev, NULL);
1682 +
1683 + return 0;
1684 +}
1685 +
1686 +
1687 +static const struct of_device_id bcm2835_mmc_match[] = {
1688 + { .compatible = "brcm,bcm2835-mmc" },
1689 + { }
1690 +};
1691 +MODULE_DEVICE_TABLE(of, bcm2835_mmc_match);
1692 +
1693 +
1694 +
1695 +static struct platform_driver bcm2835_mmc_driver = {
1696 + .probe = bcm2835_mmc_probe,
1697 + .remove = bcm2835_mmc_remove,
1698 + .driver = {
1699 + .name = DRIVER_NAME,
1700 + .owner = THIS_MODULE,
1701 + .of_match_table = bcm2835_mmc_match,
1702 + },
1703 +};
1704 +module_platform_driver(bcm2835_mmc_driver);
1705 +
1706 +MODULE_ALIAS("platform:mmc-bcm2835");
1707 +MODULE_DESCRIPTION("BCM2835 SDHCI driver");
1708 +MODULE_LICENSE("GPL v2");
1709 +MODULE_AUTHOR("Gellert Weisz");
1710 --
1711 1.8.3.2
1712
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