target/linux/brcm47xx/patches-3.10/091-MIPS-BCM47XX-fix-detected-clock-on-Asus-WL520GC-and-.patch

   1 commit 935e93fcc022ff7be7046d2435ce6441e260abfb
   2 Author: Hauke Mehrtens <hauke@hauke-m.de>
   3 Date:   Wed Sep 18 13:33:00 2013 +0200
   4
   5     MIPS: BCM47XX: Fix detected clock on Asus WL520GC and WL520GU
   6
   7     The Asus WL520GC and WL520GU are based on the BCM5354 and clocked at
   8     200MHz, but they do not have a clkfreq nvram variable set to the
   9     correct value. This adds a workaround for these devices.
  10
  11     Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
  12     Cc: linux-mips@linux-mips.org
  13     Patchwork: https://patchwork.linux-mips.org/patch/5843/
  14     Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
  15
  16 --- a/arch/mips/bcm47xx/time.c
  17 +++ b/arch/mips/bcm47xx/time.c
  18 @@ -28,6 +28,7 @@
  19  #include <asm/time.h>
  20  #include <bcm47xx.h>
  21  #include <bcm47xx_nvram.h>
  22 +#include <bcm47xx_board.h>
  23
  24  void __init plat_time_init(void)
  25  {
  26 @@ -35,6 +36,7 @@ void __init plat_time_init(void)
  27         u16 chip_id = 0;
  28         char buf[10];
  29         int len;
  30 +       enum bcm47xx_board board = bcm47xx_board_get();
  31
  32         /*
  33          * Use deterministic values for initial counter interrupt
  34 @@ -64,6 +66,15 @@ void __init plat_time_init(void)
  35                         hz = 100000000;
  36         }
  37
  38 +       switch (board) {
  39 +       case BCM47XX_BOARD_ASUS_WL520GC:
  40 +       case BCM47XX_BOARD_ASUS_WL520GU:
  41 +               hz = 100000000;
  42 +               break;
  43 +       default:
  44 +               break;
  45 +       }
  46 +
  47         if (!hz)
  48                 hz = 100000000;
  49