27b9f62b69ab040e96ba19b626a39d725ccd2ed9
[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / dts / bcm6368.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm6368";
5
6 aliases {
7 pflash = &pflash;
8 };
9
10 cpus {
11 #address-cells = <1>;
12 #size-cells = <0>;
13
14 cpu@0 {
15 compatible = "brcm,bmips4350", "mips,mips4Kc";
16 device_type = "cpu";
17 reg = <0>;
18 };
19
20 cpu@1 {
21 compatible = "brcm,bmips4350", "mips,mips4Kc";
22 device_type = "cpu";
23 reg = <0>;
24 };
25 };
26
27 cpu_intc: interrupt-controller {
28 #address-cells = <0>;
29 compatible = "mti,cpu-interrupt-controller";
30
31 interrupt-controller;
32 #interrupt-cells = <1>;
33 };
34
35 memory { device_type = "memory"; reg = <0 0>; };
36
37 ubus@10000000 {
38 #address-cells = <1>;
39 #size-cells = <1>;
40 ranges;
41 compatible = "simple-bus";
42
43 ext_intc0: interrupt-controller@10000018 {
44 compatible = "brcm,bcm6345-ext-intc";
45 reg = <0x10000018 0x4>;
46
47 interrupt-controller;
48 #interrupt-cells = <2>;
49
50 interrupt-parent = <&periph_intc>;
51 interrupts = <20>, <21>, <22>, <23>;
52 };
53
54 ext_intc1: interrupt-controller@1000001c {
55 compatible = "brcm,bcm6345-ext-intc";
56 reg = <0x1000001c 0x4>;
57
58 interrupt-controller;
59 #interrupt-cells = <2>;
60
61 interrupt-parent = <&periph_intc>;
62 interrupts = <24>, <25>;
63 };
64
65 periph_intc: interrupt-controller@10000020 {
66 compatible = "brcm,bcm6345-periph-intc";
67 reg = <0x10000020 0x10>,
68 <0x10000030 0x10>;
69
70 interrupt-controller;
71 #interrupt-cells = <1>;
72
73 interrupt-parent = <&cpu_intc>;
74 interrupts = <2>, <3>;
75 };
76 };
77
78 pflash: nor@18000000 {
79 compatible = "cfi-flash";
80 reg = <0x18000000 0x2000000>;
81 bank-width = <2>;
82 #address-cells = <1>;
83 #size-cells = <1>;
84 status = "disabled";
85 };
86 };