target/linux/cns3xxx/patches-3.18/075-spi_support.patch

   1 --- a/drivers/spi/Kconfig
   2 +++ b/drivers/spi/Kconfig
   3 @@ -171,6 +171,13 @@ config SPI_CLPS711X
   4           This enables dedicated general purpose SPI/Microwire1-compatible
   5           master mode interface (SSI1) for CLPS711X-based CPUs.
   6
   7 +config SPI_CNS3XXX
   8 +       tristate "CNS3XXX SPI controller"
   9 +       depends on ARCH_CNS3XXX && SPI_MASTER
  10 +       select SPI_BITBANG
  11 +       help
  12 +         This enables using the CNS3XXX SPI controller in master mode.
  13 +
  14  config SPI_COLDFIRE_QSPI
  15         tristate "Freescale Coldfire QSPI controller"
  16         depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x)
  17 --- a/drivers/spi/Makefile
  18 +++ b/drivers/spi/Makefile
  19 @@ -25,6 +25,7 @@ obj-$(CONFIG_SPI_BITBANG)             += spi-bitban
  20  obj-$(CONFIG_SPI_BUTTERFLY)            += spi-butterfly.o
  21  obj-$(CONFIG_SPI_CADENCE)              += spi-cadence.o
  22  obj-$(CONFIG_SPI_CLPS711X)             += spi-clps711x.o
  23 +obj-$(CONFIG_SPI_CNS3XXX)              += spi-cns3xxx.o
  24  obj-$(CONFIG_SPI_COLDFIRE_QSPI)                += spi-coldfire-qspi.o
  25  obj-$(CONFIG_SPI_DAVINCI)              += spi-davinci.o
  26  obj-$(CONFIG_SPI_DESIGNWARE)           += spi-dw.o
  27 --- a/drivers/spi/spi-bitbang.c
  28 +++ b/drivers/spi/spi-bitbang.c
  29 @@ -335,6 +335,10 @@ static int spi_bitbang_transfer_one(stru
  30                          */
  31                         if (!m->is_dma_mapped)
  32                                 t->rx_dma = t->tx_dma = 0;
  33 +
  34 +                       t->last_in_message_list =
  35 +                               list_is_last(&t->transfer_list, &m->transfers);
  36 +
  37                         status = bitbang->txrx_bufs(spi, t);
  38                 }
  39                 if (status > 0)
  40 --- a/include/linux/spi/spi.h
  41 +++ b/include/linux/spi/spi.h
  42 @@ -630,6 +630,13 @@ struct spi_transfer {
  43         u32             speed_hz;
  44
  45         struct list_head transfer_list;
  46 +
  47 +#ifdef CONFIG_ARCH_CNS3XXX
  48 +       unsigned        last_in_message_list;
  49 +#ifdef CONFIG_SPI_CNS3XXX_2IOREAD
  50 +       u8      dio_read;
  51 +#endif
  52 +#endif
  53  };
  54
  55  /**