generic: add b53 swconfig switch driver
[openwrt/svn-archive/archive.git] / target / linux / generic / files / drivers / net / phy / b53 / b53_spi.c
1 /*
2 * B53 register access through SPI
3 *
4 * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19 #include <asm/unaligned.h>
20
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/spi/spi.h>
24 #include <linux/platform_data/b53.h>
25
26 #include "b53_priv.h"
27
28 #define B53_SPI_DATA 0xf0
29
30 #define B53_SPI_STATUS 0xfe
31 #define B53_SPI_CMD_SPIF BIT(7)
32 #define B53_SPI_CMD_RACK BIT(5)
33
34 #define B53_SPI_CMD_READ 0x00
35 #define B53_SPI_CMD_WRITE 0x01
36 #define B53_SPI_CMD_NORMAL 0x60
37 #define B53_SPI_CMD_FAST 0x10
38
39 #define B53_SPI_PAGE_SELECT 0xff
40
41 static inline int b53_spi_read_reg(struct spi_device *spi, u8 reg, u8 *val,
42 unsigned len)
43 {
44 u8 txbuf[2];
45
46 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_READ;
47 txbuf[1] = reg;
48
49 return spi_write_then_read(spi, txbuf, 2, val, len);
50 }
51
52 static inline int b53_spi_clear_status(struct spi_device *spi)
53 {
54 unsigned int i;
55 u8 rxbuf;
56 int ret;
57
58 for (i = 0; i < 10; i++) {
59 ret = b53_spi_read_reg(spi, B53_SPI_STATUS, &rxbuf, 1);
60 if (ret)
61 return ret;
62
63 if (!(rxbuf & B53_SPI_CMD_SPIF))
64 break;
65
66 mdelay(1);
67 }
68
69 if (i == 10)
70 return -EIO;
71
72 return 0;
73 }
74
75 static inline int b53_spi_set_page(struct spi_device *spi, u8 page)
76 {
77 u8 txbuf[3];
78
79 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
80 txbuf[1] = B53_SPI_PAGE_SELECT;
81 txbuf[2] = page;
82
83 return spi_write(spi, txbuf, sizeof(txbuf));
84 }
85
86 static inline int b53_prepare_reg_access(struct spi_device *spi, u8 page)
87 {
88 int ret = b53_spi_clear_status(spi);
89 if (ret)
90 return ret;
91
92 return b53_spi_set_page(spi, page);
93 }
94
95 static int b53_spi_prepare_reg_read(struct spi_device *spi, u8 reg)
96 {
97 u8 rxbuf;
98 int retry_count;
99 int ret;
100
101 ret = b53_spi_read_reg(spi, reg, &rxbuf, 1);
102 if (ret)
103 return ret;
104
105 for (retry_count = 0; retry_count < 10; retry_count++) {
106 ret = b53_spi_read_reg(spi, B53_SPI_STATUS, &rxbuf, 1);
107 if (ret)
108 return ret;
109
110 if (rxbuf & B53_SPI_CMD_RACK)
111 break;
112
113 mdelay(1);
114 }
115
116 if (retry_count == 10)
117 return -EIO;
118
119 return 0;
120 }
121
122 static int b53_spi_read(struct b53_device *dev, u8 page, u8 reg, u8 *data,
123 unsigned len)
124 {
125 struct spi_device *spi = dev->priv;
126 int ret;
127
128 ret = b53_prepare_reg_access(spi, page);
129 if (ret)
130 return ret;
131
132 ret = b53_spi_prepare_reg_read(spi, reg);
133 if (ret)
134 return ret;
135
136 return b53_spi_read_reg(spi, B53_SPI_DATA, data, len);
137 }
138
139 static int b53_spi_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
140 {
141 return b53_spi_read(dev, page, reg, val, 1);
142 }
143
144 static int b53_spi_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)
145 {
146 int ret = b53_spi_read(dev, page, reg, (u8 *)val, 2);
147 if (!ret)
148 *val = le16_to_cpu(*val);
149
150 return ret;
151 }
152
153 static int b53_spi_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)
154 {
155 int ret = b53_spi_read(dev, page, reg, (u8 *)val, 4);
156 if (!ret)
157 *val = le32_to_cpu(*val);
158
159 return ret;
160 }
161
162 static int b53_spi_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)
163 {
164 int ret;
165
166 *val = 0;
167 ret = b53_spi_read(dev, page, reg, (u8 *)val, 6);
168 if (!ret)
169 *val = le64_to_cpu(*val);
170
171 return ret;
172 }
173
174 static int b53_spi_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)
175 {
176 int ret = b53_spi_read(dev, page, reg, (u8 *)val, 8);
177 if (!ret)
178 *val = le64_to_cpu(*val);
179
180 return ret;
181 }
182
183 static int b53_spi_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)
184 {
185 struct spi_device *spi = dev->priv;
186 int ret;
187 u8 txbuf[3];
188
189 ret = b53_prepare_reg_access(spi, page);
190 if (ret)
191 return ret;
192
193 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
194 txbuf[1] = reg;
195 txbuf[2] = value;
196
197 return spi_write(spi, txbuf, sizeof(txbuf));
198 }
199
200 static int b53_spi_write16(struct b53_device *dev, u8 page, u8 reg, u16 value)
201 {
202 struct spi_device *spi = dev->priv;
203 int ret;
204 u8 txbuf[4];
205
206 ret = b53_prepare_reg_access(spi, page);
207 if (ret)
208 return ret;
209
210 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
211 txbuf[1] = reg;
212 put_unaligned_le16(value, &txbuf[2]);
213
214 return spi_write(spi, txbuf, sizeof(txbuf));
215 }
216
217 static int b53_spi_write32(struct b53_device *dev, u8 page, u8 reg, u32 value)
218 {
219 struct spi_device *spi = dev->priv;
220 int ret;
221 u8 txbuf[6];
222
223 ret = b53_prepare_reg_access(spi, page);
224 if (ret)
225 return ret;
226
227 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
228 txbuf[1] = reg;
229 put_unaligned_le32(value, &txbuf[2]);
230
231 return spi_write(spi, txbuf, sizeof(txbuf));
232 }
233
234 static int b53_spi_write48(struct b53_device *dev, u8 page, u8 reg, u64 value)
235 {
236 struct spi_device *spi = dev->priv;
237 int ret;
238 u8 txbuf[10];
239
240 ret = b53_prepare_reg_access(spi, page);
241 if (ret)
242 return ret;
243
244 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
245 txbuf[1] = reg;
246 put_unaligned_le64(value, &txbuf[2]);
247
248 return spi_write(spi, txbuf, sizeof(txbuf) - 2);
249 }
250
251 static int b53_spi_write64(struct b53_device *dev, u8 page, u8 reg, u64 value)
252 {
253 struct spi_device *spi = dev->priv;
254 int ret;
255 u8 txbuf[10];
256
257 ret = b53_prepare_reg_access(spi, page);
258 if (ret)
259 return ret;
260
261 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
262 txbuf[1] = reg;
263 put_unaligned_le64(value, &txbuf[2]);
264
265 return spi_write(spi, txbuf, sizeof(txbuf));
266 }
267
268 static struct b53_io_ops b53_spi_ops = {
269 .read8 = b53_spi_read8,
270 .read16 = b53_spi_read16,
271 .read32 = b53_spi_read32,
272 .read48 = b53_spi_read48,
273 .read64 = b53_spi_read64,
274 .write8 = b53_spi_write8,
275 .write16 = b53_spi_write16,
276 .write32 = b53_spi_write32,
277 .write48 = b53_spi_write48,
278 .write64 = b53_spi_write64,
279 };
280
281 static int __devinit b53_spi_probe(struct spi_device *spi)
282 {
283 struct b53_device *dev;
284 int ret;
285
286 dev = b53_switch_alloc(&spi->dev, &b53_spi_ops, spi);
287 if (!dev)
288 return -ENOMEM;
289
290 if (spi->dev.platform_data)
291 dev->pdata = spi->dev.platform_data;
292
293 ret = b53_switch_register(dev);
294 if (ret)
295 return ret;
296
297 spi->dev.platform_data = dev;
298
299 return 0;
300 }
301
302 static int __devexit b53_spi_remove(struct spi_device *spi)
303 {
304 struct b53_device *dev = spi->dev.platform_data;
305
306 if (dev) {
307 struct b53_platform_data *pdata = dev->pdata;
308 b53_switch_remove(dev);
309 spi->dev.platform_data = pdata;
310 }
311
312 return 0;
313 }
314
315 static struct spi_driver b53_spi_driver = {
316 .driver = {
317 .name = "b53-switch",
318 .bus = &spi_bus_type,
319 .owner = THIS_MODULE,
320 },
321 .probe = b53_spi_probe,
322 .remove = __devexit_p(b53_spi_remove),
323 };
324
325 module_spi_driver(b53_spi_driver);
326
327 MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
328 MODULE_DESCRIPTION("B53 SPI access driver");
329 MODULE_LICENSE("Dual BSD/GPL");