netfilter: fix calls to nf_ct_iterate_cleanup() with Linux >= 3.13
[openwrt/svn-archive/archive.git] / target / linux / generic / patches-3.14 / 020-ssb_update.patch
1 --- a/drivers/ssb/pci.c
2 +++ b/drivers/ssb/pci.c
3 @@ -326,13 +326,13 @@ err_ctlreg:
4 return err;
5 }
6
7 -static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in,
8 - u16 mask, u16 shift)
9 +static s8 sprom_extract_antgain(u8 sprom_revision, const u16 *in, u16 offset,
10 + u16 mask, u16 shift)
11 {
12 u16 v;
13 u8 gain;
14
15 - v = in[SPOFF(SSB_SPROM1_AGAIN)];
16 + v = in[SPOFF(offset)];
17 gain = (v & mask) >> shift;
18 if (gain == 0xFF)
19 gain = 2; /* If unset use 2dBm */
20 @@ -416,12 +416,14 @@ static void sprom_extract_r123(struct ss
21 SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
22
23 /* Extract the antenna gain values. */
24 - out->antenna_gain.a0 = r123_extract_antgain(out->revision, in,
25 - SSB_SPROM1_AGAIN_BG,
26 - SSB_SPROM1_AGAIN_BG_SHIFT);
27 - out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
28 - SSB_SPROM1_AGAIN_A,
29 - SSB_SPROM1_AGAIN_A_SHIFT);
30 + out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
31 + SSB_SPROM1_AGAIN,
32 + SSB_SPROM1_AGAIN_BG,
33 + SSB_SPROM1_AGAIN_BG_SHIFT);
34 + out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
35 + SSB_SPROM1_AGAIN,
36 + SSB_SPROM1_AGAIN_A,
37 + SSB_SPROM1_AGAIN_A_SHIFT);
38 if (out->revision >= 2)
39 sprom_extract_r23(out, in);
40 }
41 @@ -468,7 +470,15 @@ static void sprom_extract_r458(struct ss
42
43 static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
44 {
45 + static const u16 pwr_info_offset[] = {
46 + SSB_SPROM4_PWR_INFO_CORE0, SSB_SPROM4_PWR_INFO_CORE1,
47 + SSB_SPROM4_PWR_INFO_CORE2, SSB_SPROM4_PWR_INFO_CORE3
48 + };
49 u16 il0mac_offset;
50 + int i;
51 +
52 + BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
53 + ARRAY_SIZE(out->core_pwr_info));
54
55 if (out->revision == 4)
56 il0mac_offset = SSB_SPROM4_IL0MAC;
57 @@ -524,14 +534,59 @@ static void sprom_extract_r45(struct ssb
58 }
59
60 /* Extract the antenna gain values. */
61 - SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01,
62 - SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
63 - SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01,
64 - SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
65 - SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23,
66 - SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
67 - SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23,
68 - SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
69 + out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
70 + SSB_SPROM4_AGAIN01,
71 + SSB_SPROM4_AGAIN0,
72 + SSB_SPROM4_AGAIN0_SHIFT);
73 + out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
74 + SSB_SPROM4_AGAIN01,
75 + SSB_SPROM4_AGAIN1,
76 + SSB_SPROM4_AGAIN1_SHIFT);
77 + out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
78 + SSB_SPROM4_AGAIN23,
79 + SSB_SPROM4_AGAIN2,
80 + SSB_SPROM4_AGAIN2_SHIFT);
81 + out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
82 + SSB_SPROM4_AGAIN23,
83 + SSB_SPROM4_AGAIN3,
84 + SSB_SPROM4_AGAIN3_SHIFT);
85 +
86 + /* Extract cores power info info */
87 + for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
88 + u16 o = pwr_info_offset[i];
89 +
90 + SPEX(core_pwr_info[i].itssi_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
91 + SSB_SPROM4_2G_ITSSI, SSB_SPROM4_2G_ITSSI_SHIFT);
92 + SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
93 + SSB_SPROM4_2G_MAXP, 0);
94 +
95 + SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SPROM4_2G_PA_0, ~0, 0);
96 + SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SPROM4_2G_PA_1, ~0, 0);
97 + SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SPROM4_2G_PA_2, ~0, 0);
98 + SPEX(core_pwr_info[i].pa_2g[3], o + SSB_SPROM4_2G_PA_3, ~0, 0);
99 +
100 + SPEX(core_pwr_info[i].itssi_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
101 + SSB_SPROM4_5G_ITSSI, SSB_SPROM4_5G_ITSSI_SHIFT);
102 + SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
103 + SSB_SPROM4_5G_MAXP, 0);
104 + SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM4_5GHL_MAXP,
105 + SSB_SPROM4_5GH_MAXP, 0);
106 + SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM4_5GHL_MAXP,
107 + SSB_SPROM4_5GL_MAXP, SSB_SPROM4_5GL_MAXP_SHIFT);
108 +
109 + SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SPROM4_5GL_PA_0, ~0, 0);
110 + SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SPROM4_5GL_PA_1, ~0, 0);
111 + SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SPROM4_5GL_PA_2, ~0, 0);
112 + SPEX(core_pwr_info[i].pa_5gl[3], o + SSB_SPROM4_5GL_PA_3, ~0, 0);
113 + SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SPROM4_5G_PA_0, ~0, 0);
114 + SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SPROM4_5G_PA_1, ~0, 0);
115 + SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SPROM4_5G_PA_2, ~0, 0);
116 + SPEX(core_pwr_info[i].pa_5g[3], o + SSB_SPROM4_5G_PA_3, ~0, 0);
117 + SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SPROM4_5GH_PA_0, ~0, 0);
118 + SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SPROM4_5GH_PA_1, ~0, 0);
119 + SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SPROM4_5GH_PA_2, ~0, 0);
120 + SPEX(core_pwr_info[i].pa_5gh[3], o + SSB_SPROM4_5GH_PA_3, ~0, 0);
121 + }
122
123 sprom_extract_r458(out, in);
124
125 @@ -621,14 +676,22 @@ static void sprom_extract_r8(struct ssb_
126 SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
127
128 /* Extract the antenna gain values. */
129 - SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
130 - SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
131 - SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
132 - SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
133 - SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
134 - SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
135 - SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
136 - SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
137 + out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
138 + SSB_SPROM8_AGAIN01,
139 + SSB_SPROM8_AGAIN0,
140 + SSB_SPROM8_AGAIN0_SHIFT);
141 + out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
142 + SSB_SPROM8_AGAIN01,
143 + SSB_SPROM8_AGAIN1,
144 + SSB_SPROM8_AGAIN1_SHIFT);
145 + out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
146 + SSB_SPROM8_AGAIN23,
147 + SSB_SPROM8_AGAIN2,
148 + SSB_SPROM8_AGAIN2_SHIFT);
149 + out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
150 + SSB_SPROM8_AGAIN23,
151 + SSB_SPROM8_AGAIN3,
152 + SSB_SPROM8_AGAIN3_SHIFT);
153
154 /* Extract cores power info info */
155 for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
156 --- a/include/linux/ssb/ssb.h
157 +++ b/include/linux/ssb/ssb.h
158 @@ -33,6 +33,7 @@ struct ssb_sprom {
159 u8 et1phyaddr; /* MII address for enet1 */
160 u8 et0mdcport; /* MDIO for enet0 */
161 u8 et1mdcport; /* MDIO for enet1 */
162 + u16 dev_id; /* Device ID overriding e.g. PCI ID */
163 u16 board_rev; /* Board revision number from SPROM. */
164 u16 board_num; /* Board number from SPROM. */
165 u16 board_type; /* Board type from SPROM. */
166 --- a/include/linux/ssb/ssb_regs.h
167 +++ b/include/linux/ssb/ssb_regs.h
168 @@ -345,6 +345,43 @@
169 #define SSB_SPROM4_TXPID5GH2_SHIFT 0
170 #define SSB_SPROM4_TXPID5GH3 0xFF00
171 #define SSB_SPROM4_TXPID5GH3_SHIFT 8
172 +
173 +/* There are 4 blocks with power info sharing the same layout */
174 +#define SSB_SPROM4_PWR_INFO_CORE0 0x0080
175 +#define SSB_SPROM4_PWR_INFO_CORE1 0x00AE
176 +#define SSB_SPROM4_PWR_INFO_CORE2 0x00DC
177 +#define SSB_SPROM4_PWR_INFO_CORE3 0x010A
178 +
179 +#define SSB_SPROM4_2G_MAXP_ITSSI 0x00 /* 2 GHz ITSSI and 2 GHz Max Power */
180 +#define SSB_SPROM4_2G_MAXP 0x00FF
181 +#define SSB_SPROM4_2G_ITSSI 0xFF00
182 +#define SSB_SPROM4_2G_ITSSI_SHIFT 8
183 +#define SSB_SPROM4_2G_PA_0 0x02 /* 2 GHz power amp */
184 +#define SSB_SPROM4_2G_PA_1 0x04
185 +#define SSB_SPROM4_2G_PA_2 0x06
186 +#define SSB_SPROM4_2G_PA_3 0x08
187 +#define SSB_SPROM4_5G_MAXP_ITSSI 0x0A /* 5 GHz ITSSI and 5.3 GHz Max Power */
188 +#define SSB_SPROM4_5G_MAXP 0x00FF
189 +#define SSB_SPROM4_5G_ITSSI 0xFF00
190 +#define SSB_SPROM4_5G_ITSSI_SHIFT 8
191 +#define SSB_SPROM4_5GHL_MAXP 0x0C /* 5.2 GHz and 5.8 GHz Max Power */
192 +#define SSB_SPROM4_5GH_MAXP 0x00FF
193 +#define SSB_SPROM4_5GL_MAXP 0xFF00
194 +#define SSB_SPROM4_5GL_MAXP_SHIFT 8
195 +#define SSB_SPROM4_5G_PA_0 0x0E /* 5.3 GHz power amp */
196 +#define SSB_SPROM4_5G_PA_1 0x10
197 +#define SSB_SPROM4_5G_PA_2 0x12
198 +#define SSB_SPROM4_5G_PA_3 0x14
199 +#define SSB_SPROM4_5GL_PA_0 0x16 /* 5.2 GHz power amp */
200 +#define SSB_SPROM4_5GL_PA_1 0x18
201 +#define SSB_SPROM4_5GL_PA_2 0x1A
202 +#define SSB_SPROM4_5GL_PA_3 0x1C
203 +#define SSB_SPROM4_5GH_PA_0 0x1E /* 5.8 GHz power amp */
204 +#define SSB_SPROM4_5GH_PA_1 0x20
205 +#define SSB_SPROM4_5GH_PA_2 0x22
206 +#define SSB_SPROM4_5GH_PA_3 0x24
207 +
208 +/* TODO: Make it deprecated */
209 #define SSB_SPROM4_MAXP_BG 0x0080 /* Max Power BG in path 1 */
210 #define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */
211 #define SSB_SPROM4_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
212 --- a/arch/mips/bcm47xx/sprom.c
213 +++ b/arch/mips/bcm47xx/sprom.c
214 @@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
215 static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
216 const char *prefix, bool fallback)
217 {
218 + nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
219 nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
220 nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
221 nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);