target/linux/ifxmips/files-2.6.32/drivers/crypto/ifxmips/ifxmips_deu.h

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  15  *
  16  *   Copyright (C) 2010 Ralph Hempel <ralph.hempel@lantiq.com>
  17  *   Copyright (C) 2009 Mohammad Firdaus
  18  */
  19
  20 /*!
  21   \defgroup IFX_DEU IFX_DEU_DRIVERS
  22   \ingroup  API
  23   \brief ifx deu driver module
  24 */
  25
  26 /*!
  27   \file ifxmips_deu.h
  28   \brief main deu driver header file
  29 */
  30
  31 /*!
  32   \defgroup IFX_DEU_DEFINITIONS IFX_DEU_DEFINITIONS
  33   \ingroup  IFX_DEU
  34   \brief ifx deu definitions
  35 */
  36
  37
  38 #ifndef IFXMIPS_DEU_H
  39 #define IFXMIPS_DEU_H
  40
  41 #define IFX_DEU_DRV_VERSION         "1.0.1"
  42
  43 #include "ifxmips_deu_danube.h"
  44
  45 #define IFXDEU_ALIGNMENT 16
  46
  47 #define PFX     "ifxdeu: "
  48
  49 #define IFXDEU_CRA_PRIORITY     300
  50 #define IFXDEU_COMPOSITE_PRIORITY 400
  51
  52
  53 #define IFX_DEU_BASE_ADDR       (KSEG1 | 0x1E103100)
  54 #define IFX_DEU_CLK             ((volatile u32 *)(IFX_DEU_BASE_ADDR + 0x0000))
  55 #define IFX_DEU_ID              ((volatile u32 *)(IFX_DEU_BASE_ADDR + 0x0008))
  56 #define IFX_DES_CON             ((volatile u32 *)(IFX_DEU_BASE_ADDR + 0x0010))
  57 #define IFX_AES_CON             ((volatile u32 *)(IFX_DEU_BASE_ADDR + 0x0050))
  58 #define IFX_HASH_CON            ((volatile u32 *)(IFX_DEU_BASE_ADDR + 0x00B0))
  59 #define IFX_ARC4_CON            ((volatile u32 *)(IFX_DEU_BASE_ADDR + 0x0100))
  60
  61 #define IFX_DEU_ID_REV          0x00001F
  62 #define IFX_DEU_ID_ID           0x00FF00
  63 #define IFX_DEU_ID_DMA          0x010000
  64 #define IFX_DEU_ID_HASH         0x020000
  65 #define IFX_DEU_ID_AES          0x040000
  66 #define IFX_DEU_ID_3DES         0x080000
  67 #define IFX_DEU_ID_DES          0x100000
  68
  69 #define CRYPTO_DIR_ENCRYPT      1
  70 #define CRYPTO_DIR_DECRYPT      0
  71
  72 #undef CRYPTO_DEBUG
  73
  74 #ifdef CRYPTO_DEBUG
  75 extern char deu_debug_level;
  76 #define DPRINTF(level, format, args...) if (level < deu_debug_level) printk(KERN_INFO "[%s %s %d]: " format, __FILE__, __func__, __LINE__, ##args);
  77 #else
  78 #define DPRINTF(level, format, args...)
  79 #endif
  80
  81 #define IFX_MPS                                 (KSEG1 | 0x1F107000)
  82
  83 #define IFX_MPS_CHIPID                          ((volatile u32*)(IFX_MPS + 0x0344))
  84 #define IFX_MPS_CHIPID_VERSION_GET(value)       (((value) >> 28) & 0xF)
  85 #define IFX_MPS_CHIPID_VERSION_SET(value)       (((value) & 0xF) << 28)
  86 #define IFX_MPS_CHIPID_PARTNUM_GET(value)       (((value) >> 12) & 0xFFFF)
  87 #define IFX_MPS_CHIPID_PARTNUM_SET(value)       (((value) & 0xFFFF) << 12)
  88 #define IFX_MPS_CHIPID_MANID_GET(value)         (((value) >> 1) & 0x7FF)
  89 #define IFX_MPS_CHIPID_MANID_SET(value)         (((value) & 0x7FF) << 1)
  90
  91 void chip_version(void);
  92
  93 int __init ifxdeu_init_des (void);
  94 int __init ifxdeu_init_aes (void);
  95 int __init ifxdeu_init_arc4 (void);
  96 int __init ifxdeu_init_sha1 (void);
  97 int __init ifxdeu_init_md5 (void);
  98 int __init ifxdeu_init_sha1_hmac (void);
  99 int __init ifxdeu_init_md5_hmac (void);
 100
 101 void __exit ifxdeu_fini_des (void);
 102 void __exit ifxdeu_fini_aes (void);
 103 void __exit ifxdeu_fini_arc4 (void);
 104 void __exit ifxdeu_fini_sha1 (void);
 105 void __exit ifxdeu_fini_md5 (void);
 106 void __exit ifxdeu_fini_sha1_hmac (void);
 107 void __exit ifxdeu_fini_md5_hmac (void);
 108 void __exit ifxdeu_fini_dma(void);
 109
 110 int deu_dma_init (void);
 111
 112 #define DEU_WAKELIST_INIT(queue) \
 113     init_waitqueue_head(&queue)
 114
 115 #define DEU_WAIT_EVENT_TIMEOUT(queue, event, flags, timeout)     \
 116     do {                                                         \
 117         wait_event_interruptible_timeout((queue),                \
 118             test_bit((event), &(flags)), (timeout));            \
 119         clear_bit((event), &(flags));                            \
 120     }while (0)
 121
 122
 123 #define DEU_WAKEUP_EVENT(queue, event, flags)         \
 124     do {                                              \
 125         set_bit((event), &(flags));                   \
 126         wake_up_interruptible(&(queue));              \
 127     }while (0)
 128
 129 #define DEU_WAIT_EVENT(queue, event, flags)           \
 130     do {                                              \
 131         wait_event_interruptible(queue,               \
 132             test_bit((event), &(flags)));             \
 133         clear_bit((event), &(flags));                 \
 134     }while (0)
 135
 136 typedef struct deu_drv_priv {
 137     wait_queue_head_t  deu_thread_wait;
 138 #define DEU_EVENT       1
 139     volatile  long     deu_event_flags;
 140     u8                 *deu_rx_buf;
 141     u32                deu_rx_len;
 142 }deu_drv_priv_t;
 143
 144 #endif  /* IFXMIPS_DEU_H */