[ifxmips]:
[openwrt/svn-archive/archive.git] / target / linux / ifxmips / files / arch / mips / ifxmips / danube / devices.c
1 #include <linux/init.h>
2 #include <linux/module.h>
3 #include <linux/types.h>
4 #include <linux/string.h>
5 #include <linux/mtd/physmap.h>
6 #include <linux/kernel.h>
7 #include <linux/reboot.h>
8 #include <linux/platform_device.h>
9 #include <linux/leds.h>
10 #include <linux/etherdevice.h>
11 #include <linux/reboot.h>
12 #include <linux/time.h>
13 #include <linux/io.h>
14 #include <linux/gpio.h>
15 #include <linux/leds.h>
16
17 #include <asm/bootinfo.h>
18 #include <asm/irq.h>
19
20 #include <ifxmips.h>
21 #include <ifxmips_irq.h>
22 #include <ifxmips_pmu.h>
23 #include <ifxmips_led.h>
24
25 #include "devices.h"
26
27 /* asc ports */
28 static struct resource danube_asc0_resources[] =
29 {
30 [0] = {
31 .start = (IFXMIPS_ASC_BASE_ADDR & ~KSEG1),
32 .end = (IFXMIPS_ASC_BASE_ADDR & ~KSEG1) + 0x100 - 1,
33 .flags = IORESOURCE_MEM,
34 },
35 [1] = {
36 .start = IFXMIPSASC_TIR(0),
37 .end = IFXMIPSASC_TIR(0)+3,
38 .flags = IORESOURCE_IRQ,
39 },
40 };
41
42 static struct resource danube_asc1_resources[] =
43 {
44 [0] = {
45 .start = (IFXMIPS_ASC_BASE_ADDR & ~KSEG1) + IFXMIPS_ASC_BASE_DIFF,
46 .end = (IFXMIPS_ASC_BASE_ADDR & ~KSEG1) + IFXMIPS_ASC_BASE_DIFF + 0x100 - 1,
47 .flags = IORESOURCE_MEM,
48 },
49 [1] = {
50 .start = IFXMIPSASC_TIR(1),
51 .end = IFXMIPSASC_TIR(1)+3,
52 .flags = IORESOURCE_IRQ,
53 },
54 };
55
56 void __init danube_register_asc(int port)
57 {
58 switch (port) {
59 case 0:
60 platform_device_register_simple("ifxmips_asc", 0,
61 danube_asc0_resources, ARRAY_SIZE(danube_asc0_resources));
62 break;
63 case 1:
64 platform_device_register_simple("ifxmips_asc", 1,
65 danube_asc1_resources, ARRAY_SIZE(danube_asc1_resources));
66 break;
67 default:
68 break;
69 }
70 }
71
72 /* ebu gpio */
73 static struct platform_device ifxmips_ebu_gpio =
74 {
75 .name = "ifxmips_ebu",
76 .num_resources = 1,
77 };
78
79 void __init
80 danube_register_ebu_gpio(struct resource *resource, u32 value)
81 {
82 ifxmips_ebu_gpio.resource = resource;
83 ifxmips_ebu_gpio.dev.platform_data = (void*)value;
84 platform_device_register(&ifxmips_ebu_gpio);
85 }
86
87 /* ethernet */
88 unsigned char ifxmips_ethaddr[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
89 static struct resource danube_ethernet_resources =
90 {
91 .start = IFXMIPS_PPE32_BASE_ADDR,
92 .end = IFXMIPS_PPE32_BASE_ADDR + IFXMIPS_PPE32_SIZE - 1,
93 .flags = IORESOURCE_MEM,
94 };
95
96 static struct platform_device danube_ethernet =
97 {
98 .name = "ifxmips_mii0",
99 .resource = &danube_ethernet_resources,
100 .num_resources = 1,
101 .dev = {
102 .platform_data = ifxmips_ethaddr,
103 }
104 };
105
106 void __init
107 danube_register_ethernet(unsigned char *mac, int mii_mode)
108 {
109 struct ifxmips_eth_data *eth = kmalloc(sizeof(struct ifxmips_eth_data), GFP_KERNEL);
110 memset(eth, 0, sizeof(struct ifxmips_eth_data));
111 if(mac)
112 eth->mac = mac;
113 else
114 eth->mac = ifxmips_ethaddr;
115 eth->mii_mode = mii_mode;
116 danube_ethernet.dev.platform_data = eth;
117 platform_device_register(&danube_ethernet);
118 }
119
120 /* pci */
121 extern int ifxmips_pci_external_clock;
122 extern int ifxmips_pci_req_mask;
123
124 void __init
125 danube_register_pci(int clock, int irq_mask)
126 {
127 ifxmips_pci_external_clock = clock;
128 if(irq_mask)
129 ifxmips_pci_req_mask = irq_mask;
130 }
131
132 /* tapi */
133 static struct resource mps_resources[] = {
134 {
135 .name = "mem",
136 .flags = IORESOURCE_MEM,
137 .start = 0x1f107000,
138 .end = 0x1f1073ff,
139 },
140 {
141 .name = "mailbox",
142 .flags = IORESOURCE_MEM,
143 .start = 0x1f200000,
144 .end = 0x1f2007ff,
145 },
146 };
147
148 static struct platform_device mps_device = {
149 .name = "mps",
150 .resource = mps_resources,
151 .num_resources = ARRAY_SIZE(mps_resources),
152 };
153
154 static struct platform_device vmmc_device = {
155 .name = "vmmc",
156 .dev = {
157 .parent = &mps_device.dev,
158 },
159 };
160
161 void __init
162 danube_register_tapi(void)
163 {
164 #define CP1_SIZE (1 << 20)
165 dma_addr_t dma;
166 mps_device.dev.platform_data = CPHYSADDR(dma_alloc_coherent(NULL, CP1_SIZE, &dma, GFP_ATOMIC));
167 platform_device_register(&mps_device);
168 platform_device_register(&vmmc_device);
169 }