target/linux/lantiq/patches-3.10/0010-MIPS-lantiq-wifi-and-ethernet-eeprom-handling.patch

   1 From 591a9bdde1fa9aa6f1c6132ea04771bb1dcd6180 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Wed, 13 Mar 2013 10:02:58 +0100
   4 Subject: [PATCH 18/22] owrt: lantiq: wifi and ethernet eeprom handling
   5
   6 ---
   7  arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h  |    6 +
   8  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    3 +
   9  arch/mips/lantiq/xway/Makefile                     |    3 +
  10  arch/mips/lantiq/xway/ath_eep.c                    |  248 ++++++++++++++++++++
  11  arch/mips/lantiq/xway/eth_mac.c                    |   76 ++++++
  12  arch/mips/lantiq/xway/pci-ath-fixup.c              |  109 +++++++++
  13  arch/mips/lantiq/xway/rt_eep.c                     |   60 +++++
  14  arch/mips/pci/pci-lantiq.c                         |    2 +-
  15  8 files changed, 506 insertions(+), 1 deletion(-)
  16  create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
  17  create mode 100644 arch/mips/lantiq/xway/ath_eep.c
  18  create mode 100644 arch/mips/lantiq/xway/eth_mac.c
  19  create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
  20  create mode 100644 arch/mips/lantiq/xway/rt_eep.c
  21
  22 --- /dev/null
  23 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
  24 @@ -0,0 +1,6 @@
  25 +#ifndef _PCI_ATH_FIXUP
  26 +#define _PCI_ATH_FIXUP
  27 +
  28 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
  29 +
  30 +#endif /* _PCI_ATH_FIXUP */
  31 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  32 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  33 @@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev,
  34  extern void ltq_pmu_enable(unsigned int module);
  35  extern void ltq_pmu_disable(unsigned int module);
  36
  37 +/* allow the ethernet driver to load a flash mapped mac addr */
  38 +const u8* ltq_get_eth_mac(void);
  39 +
  40  #endif /* CONFIG_SOC_TYPE_XWAY */
  41  #endif /* _LTQ_XWAY_H__ */
  42 --- a/arch/mips/lantiq/xway/Makefile
  43 +++ b/arch/mips/lantiq/xway/Makefile
  44 @@ -1,3 +1,6 @@
  45  obj-y := prom.o sysctrl.o clk.o reset.o dma.o gptu.o dcdc.o
  46
  47 +obj-y += eth_mac.o
  48 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
  49 +
  50  obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
  51 --- /dev/null
  52 +++ b/arch/mips/lantiq/xway/ath_eep.c
  53 @@ -0,0 +1,248 @@
  54 +/*
  55 + *  Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
  56 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
  57 + *  Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
  58 + *  Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
  59 + *  Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
  60 + *
  61 + *  This program is free software; you can redistribute it and/or modify it
  62 + *  under the terms of the GNU General Public License version 2 as published
  63 + *  by the Free Software Foundation.
  64 + */
  65 +
  66 +#include <linux/init.h>
  67 +#include <linux/module.h>
  68 +#include <linux/platform_device.h>
  69 +#include <linux/etherdevice.h>
  70 +#include <linux/ath5k_platform.h>
  71 +#include <linux/ath9k_platform.h>
  72 +#include <linux/pci.h>
  73 +#include <linux/err.h>
  74 +#include <linux/mtd/mtd.h>
  75 +#include <pci-ath-fixup.h>
  76 +#include <lantiq_soc.h>
  77 +
  78 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
  79 +struct ath5k_platform_data ath5k_pdata;
  80 +struct ath9k_platform_data ath9k_pdata = {
  81 +       .led_pin = -1,
  82 +};
  83 +static u8 athxk_eeprom_mac[6];
  84 +
  85 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
  86 +{
  87 +       dev->dev.platform_data = &ath9k_pdata;
  88 +       return 0;
  89 +}
  90 +
  91 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
  92 +{
  93 +       struct device_node *np = pdev->dev.of_node, *mtd_np;
  94 +       struct resource *eep_res, *mac_res = NULL;
  95 +       void __iomem *eep, *mac;
  96 +       int mac_offset;
  97 +       u32 mac_inc = 0, pci_slot = 0;
  98 +       int i;
  99 +       struct mtd_info *the_mtd;
 100 +       size_t flash_readlen;
 101 +       const __be32 *list;
 102 +       const char *part;
 103 +       phandle phandle;
 104 +
 105 +       if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
 106 +                       sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
 107 +                       (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
 108 +                       of_get_property(mtd_np, "label", NULL)) || (part =
 109 +                       mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
 110 +                       != ERR_PTR(-ENODEV)) {
 111 +               i = mtd_read(the_mtd, be32_to_cpup(list),
 112 +                               ATH9K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
 113 +                               (void *) ath9k_pdata.eeprom_data);
 114 +               put_mtd_device(the_mtd);
 115 +               if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
 116 +                       dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
 117 +                       return -ENODEV;
 118 +               }
 119 +       } else {
 120 +               eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 121 +               mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 122 +
 123 +               if (!eep_res) {
 124 +                       dev_err(&pdev->dev, "failed to load eeprom address\n");
 125 +                       return -ENODEV;
 126 +               }
 127 +               if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS << 1) {
 128 +                       dev_err(&pdev->dev, "eeprom has an invalid size\n");
 129 +                       return -EINVAL;
 130 +               }
 131 +
 132 +               eep = ioremap(eep_res->start, resource_size(eep_res));
 133 +               memcpy_fromio(ath9k_pdata.eeprom_data, eep,
 134 +                               ATH9K_PLAT_EEP_MAX_WORDS << 1);
 135 +       }
 136 +
 137 +       if (of_find_property(np, "ath,eep-swap", NULL))
 138 +               for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
 139 +                       ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
 140 +
 141 +       if (of_find_property(np, "ath,eep-endian", NULL)) {
 142 +               ath9k_pdata.endian_check = true;
 143 +
 144 +               dev_info(&pdev->dev, "endian check enabled.\n");
 145 +       }
 146 +
 147 +       if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
 148 +               memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data + mac_offset, 6);
 149 +       } else if (mac_res) {
 150 +               if (resource_size(mac_res) != 6) {
 151 +                       dev_err(&pdev->dev, "mac has an invalid size\n");
 152 +                       return -EINVAL;
 153 +               }
 154 +               mac = ioremap(mac_res->start, resource_size(mac_res));
 155 +               memcpy_fromio(athxk_eeprom_mac, mac, 6);
 156 +       } else if (ltq_get_eth_mac())
 157 +               memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
 158 +       else {
 159 +               dev_warn(&pdev->dev, "using random mac\n");
 160 +               random_ether_addr(athxk_eeprom_mac);
 161 +       }
 162 +
 163 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 164 +               athxk_eeprom_mac[5] += mac_inc;
 165 +
 166 +       ath9k_pdata.macaddr = athxk_eeprom_mac;
 167 +       ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
 168 +
 169 +       if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
 170 +               ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
 171 +
 172 +               dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
 173 +       }
 174 +
 175 +       dev_info(&pdev->dev, "loaded ath9k eeprom\n");
 176 +
 177 +       return 0;
 178 +}
 179 +
 180 +static struct of_device_id ath9k_eeprom_ids[] = {
 181 +       { .compatible = "ath9k,eeprom" },
 182 +       { }
 183 +};
 184 +
 185 +static struct platform_driver ath9k_eeprom_driver = {
 186 +       .driver         = {
 187 +               .name           = "ath9k,eeprom",
 188 +               .owner  = THIS_MODULE,
 189 +               .of_match_table = of_match_ptr(ath9k_eeprom_ids),
 190 +       },
 191 +};
 192 +
 193 +static int __init of_ath9k_eeprom_init(void)
 194 +{
 195 +       return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 196 +}
 197 +arch_initcall(of_ath9k_eeprom_init);
 198 +
 199 +
 200 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
 201 +{
 202 +       dev->dev.platform_data = &ath5k_pdata;
 203 +       return 0;
 204 +}
 205 +
 206 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
 207 +{
 208 +       struct device_node *np = pdev->dev.of_node, *mtd_np;
 209 +       struct resource *eep_res, *mac_res = NULL;
 210 +       void __iomem *eep, *mac;
 211 +       int mac_offset;
 212 +       u32 mac_inc = 0;
 213 +       int i;
 214 +       struct mtd_info *the_mtd;
 215 +       size_t flash_readlen;
 216 +       const __be32 *list;
 217 +       const char *part;
 218 +       phandle phandle;
 219 +
 220 +       if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
 221 +                       sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
 222 +                       (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
 223 +                       of_get_property(mtd_np, "label", NULL)) || (part =
 224 +                       mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
 225 +                       != ERR_PTR(-ENODEV)) {
 226 +               i = mtd_read(the_mtd, be32_to_cpup(list),
 227 +                               ATH5K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
 228 +                               (void *) ath5k_pdata.eeprom_data);
 229 +               put_mtd_device(the_mtd);
 230 +               if ((sizeof(ATH5K_PLAT_EEP_MAX_WORDS << 1) != flash_readlen)
 231 +                               || i) {
 232 +                       dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
 233 +                       return -ENODEV;
 234 +               }
 235 +       } else {
 236 +               eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 237 +               mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 238 +
 239 +               if (!eep_res) {
 240 +                       dev_err(&pdev->dev, "failed to load eeprom address\n");
 241 +                       return -ENODEV;
 242 +               }
 243 +               if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS << 1) {
 244 +                       dev_err(&pdev->dev, "eeprom has an invalid size\n");
 245 +                       return -EINVAL;
 246 +               }
 247 +
 248 +               eep = ioremap(eep_res->start, resource_size(eep_res));
 249 +               ath5k_pdata.eeprom_data = kmalloc(ATH5K_PLAT_EEP_MAX_WORDS<<1,
 250 +                               GFP_KERNEL);
 251 +               memcpy_fromio(ath5k_pdata.eeprom_data, eep,
 252 +                               ATH5K_PLAT_EEP_MAX_WORDS << 1);
 253 +       }
 254 +
 255 +       if (of_find_property(np, "ath,eep-swap", NULL))
 256 +               for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
 257 +                       ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
 258 +
 259 +       if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
 260 +               memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
 261 +       } else if (mac_res) {
 262 +               if (resource_size(mac_res) != 6) {
 263 +                       dev_err(&pdev->dev, "mac has an invalid size\n");
 264 +                       return -EINVAL;
 265 +               }
 266 +               mac = ioremap(mac_res->start, resource_size(mac_res));
 267 +               memcpy_fromio(athxk_eeprom_mac, mac, 6);
 268 +       } else if (ltq_get_eth_mac())
 269 +               memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
 270 +       else {
 271 +               dev_warn(&pdev->dev, "using random mac\n");
 272 +               random_ether_addr(athxk_eeprom_mac);
 273 +       }
 274 +
 275 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 276 +               athxk_eeprom_mac[5] += mac_inc;
 277 +
 278 +       ath5k_pdata.macaddr = athxk_eeprom_mac;
 279 +       ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
 280 +
 281 +       dev_info(&pdev->dev, "loaded ath5k eeprom\n");
 282 +
 283 +       return 0;
 284 +}
 285 +
 286 +static struct of_device_id ath5k_eeprom_ids[] = {
 287 +       { .compatible = "ath5k,eeprom" },
 288 +       { }
 289 +};
 290 +
 291 +static struct platform_driver ath5k_eeprom_driver = {
 292 +       .driver         = {
 293 +               .name           = "ath5k,eeprom",
 294 +               .owner  = THIS_MODULE,
 295 +               .of_match_table = of_match_ptr(ath5k_eeprom_ids),
 296 +       },
 297 +};
 298 +
 299 +static int __init of_ath5k_eeprom_init(void)
 300 +{
 301 +       return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
 302 +}
 303 +device_initcall(of_ath5k_eeprom_init);
 304 --- /dev/null
 305 +++ b/arch/mips/lantiq/xway/eth_mac.c
 306 @@ -0,0 +1,76 @@
 307 +/*
 308 + *  Copyright (C) 2012 John Crispin <blogic@openwrt.org>
 309 + *
 310 + *  This program is free software; you can redistribute it and/or modify it
 311 + *  under the terms of the GNU General Public License version 2 as published
 312 + *  by the Free Software Foundation.
 313 + */
 314 +
 315 +#include <linux/init.h>
 316 +#include <linux/module.h>
 317 +#include <linux/of_platform.h>
 318 +#include <linux/if_ether.h>
 319 +
 320 +static u8 eth_mac[6];
 321 +static int eth_mac_set;
 322 +
 323 +const u8* ltq_get_eth_mac(void)
 324 +{
 325 +       return eth_mac;
 326 +}
 327 +
 328 +static int __init setup_ethaddr(char *str)
 329 +{
 330 +       eth_mac_set = mac_pton(str, eth_mac);
 331 +       return !eth_mac_set;
 332 +}
 333 +__setup("ethaddr=", setup_ethaddr);
 334 +
 335 +int __init of_eth_mac_probe(struct platform_device *pdev)
 336 +{
 337 +       struct device_node *np = pdev->dev.of_node;
 338 +       struct resource *mac_res;
 339 +       void __iomem *mac;
 340 +       u32 mac_inc = 0;
 341 +
 342 +       if (eth_mac_set) {
 343 +               dev_err(&pdev->dev, "mac was already set by bootloader\n");
 344 +               return -EINVAL;
 345 +       }
 346 +       mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 347 +
 348 +       if (!mac_res) {
 349 +               dev_err(&pdev->dev, "failed to load mac\n");
 350 +               return -EINVAL;
 351 +       }
 352 +       if (resource_size(mac_res) != 6) {
 353 +               dev_err(&pdev->dev, "mac has an invalid size\n");
 354 +               return -EINVAL;
 355 +       }
 356 +       mac = ioremap(mac_res->start, resource_size(mac_res));
 357 +       memcpy_fromio(eth_mac, mac, 6);
 358 +
 359 +       if (!of_property_read_u32(np, "mac-increment", &mac_inc))
 360 +               eth_mac[5] += mac_inc;
 361 +
 362 +       return 0;
 363 +}
 364 +
 365 +static struct of_device_id eth_mac_ids[] = {
 366 +       { .compatible = "lantiq,eth-mac" },
 367 +       { /* sentinel */ }
 368 +};
 369 +
 370 +static struct platform_driver eth_mac_driver = {
 371 +       .driver         = {
 372 +               .name           = "lantiq,eth-mac",
 373 +               .owner  = THIS_MODULE,
 374 +               .of_match_table = of_match_ptr(eth_mac_ids),
 375 +       },
 376 +};
 377 +
 378 +static int __init of_eth_mac_init(void)
 379 +{
 380 +       return platform_driver_probe(&eth_mac_driver, of_eth_mac_probe);
 381 +}
 382 +device_initcall(of_eth_mac_init);
 383 --- /dev/null
 384 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
 385 @@ -0,0 +1,109 @@
 386 +/*
 387 + *  Atheros AP94 reference board PCI initialization
 388 + *
 389 + *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
 390 + *
 391 + *  This program is free software; you can redistribute it and/or modify it
 392 + *  under the terms of the GNU General Public License version 2 as published
 393 + *  by the Free Software Foundation.
 394 + */
 395 +
 396 +#include <linux/pci.h>
 397 +#include <linux/init.h>
 398 +#include <linux/delay.h>
 399 +#include <lantiq_soc.h>
 400 +
 401 +#define LTQ_PCI_MEM_BASE               0x18000000
 402 +
 403 +struct ath_fixup {
 404 +       u16             *cal_data;
 405 +       unsigned        slot;
 406 +};
 407 +
 408 +static int ath_num_fixups;
 409 +static struct ath_fixup ath_fixups[2];
 410 +
 411 +static void ath_pci_fixup(struct pci_dev *dev)
 412 +{
 413 +       void __iomem *mem;
 414 +       u16 *cal_data = NULL;
 415 +       u16 cmd;
 416 +       u32 bar0;
 417 +       u32 val;
 418 +       unsigned i;
 419 +
 420 +       for (i = 0; i < ath_num_fixups; i++) {
 421 +               if (ath_fixups[i].cal_data == NULL)
 422 +                       continue;
 423 +
 424 +               if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
 425 +                       continue;
 426 +
 427 +               cal_data = ath_fixups[i].cal_data;
 428 +               break;
 429 +       }
 430 +
 431 +       if (cal_data == NULL)
 432 +               return;
 433 +
 434 +       if (*cal_data != 0xa55a) {
 435 +               pr_err("pci %s: invalid calibration data\n", pci_name(dev));
 436 +               return;
 437 +       }
 438 +
 439 +       pr_info("pci %s: fixup device configuration\n", pci_name(dev));
 440 +
 441 +       mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
 442 +       if (!mem) {
 443 +               pr_err("pci %s: ioremap error\n", pci_name(dev));
 444 +               return;
 445 +       }
 446 +
 447 +       pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
 448 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
 449 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 450 +       cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
 451 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 452 +
 453 +       /* set pointer to first reg address */
 454 +       cal_data += 3;
 455 +       while (*cal_data != 0xffff) {
 456 +               u32 reg;
 457 +               reg = *cal_data++;
 458 +               val = *cal_data++;
 459 +               val |= (*cal_data++) << 16;
 460 +
 461 +               ltq_w32(swab32(val), mem + reg);
 462 +               udelay(100);
 463 +       }
 464 +
 465 +       pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
 466 +       dev->vendor = val & 0xffff;
 467 +       dev->device = (val >> 16) & 0xffff;
 468 +
 469 +       pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
 470 +       dev->revision = val & 0xff;
 471 +       dev->class = val >> 8; /* upper 3 bytes */
 472 +
 473 +       pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
 474 +               pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
 475 +
 476 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 477 +       cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
 478 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 479 +
 480 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 481 +
 482 +       iounmap(mem);
 483 +}
 484 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
 485 +
 486 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
 487 +{
 488 +       if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
 489 +               return;
 490 +
 491 +       ath_fixups[ath_num_fixups].slot = slot;
 492 +       ath_fixups[ath_num_fixups].cal_data = cal_data;
 493 +       ath_num_fixups++;
 494 +}
 495 --- /dev/null
 496 +++ b/arch/mips/lantiq/xway/rt_eep.c
 497 @@ -0,0 +1,60 @@
 498 +/*
 499 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
 500 + *
 501 + *  This program is free software; you can redistribute it and/or modify it
 502 + *  under the terms of the GNU General Public License version 2 as published
 503 + *  by the Free Software Foundation.
 504 + */
 505 +
 506 +#include <linux/init.h>
 507 +#include <linux/module.h>
 508 +#include <linux/pci.h>
 509 +#include <linux/platform_device.h>
 510 +#include <linux/rt2x00_platform.h>
 511 +
 512 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
 513 +static struct rt2x00_platform_data rt2x00_pdata;
 514 +
 515 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
 516 +{
 517 +       dev->dev.platform_data = &rt2x00_pdata;
 518 +       return 0;
 519 +}
 520 +
 521 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
 522 +{
 523 +       struct device_node *np = pdev->dev.of_node;
 524 +       const char *eeprom;
 525 +
 526 +       if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
 527 +               dev_err(&pdev->dev, "failed to load eeprom filename\n");
 528 +               return 0;
 529 +       }
 530 +
 531 +       rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
 532 +//     rt2x00_pdata.mac_address = mac;
 533 +       ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
 534 +
 535 +       dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
 536 +
 537 +       return 0;
 538 +}
 539 +
 540 +static struct of_device_id ralink_eeprom_ids[] = {
 541 +       { .compatible = "ralink,eeprom" },
 542 +       { }
 543 +};
 544 +
 545 +static struct platform_driver ralink_eeprom_driver = {
 546 +       .driver         = {
 547 +               .name           = "ralink,eeprom",
 548 +               .owner  = THIS_MODULE,
 549 +               .of_match_table = of_match_ptr(ralink_eeprom_ids),
 550 +       },
 551 +};
 552 +
 553 +static int __init of_ralink_eeprom_init(void)
 554 +{
 555 +       return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
 556 +}
 557 +device_initcall(of_ralink_eeprom_init);