target/linux/lantiq/patches-3.18/0039-MIPS-lantiq-initialize-usb-on-boot.patch

   1 --- a/arch/mips/lantiq/xway/reset.c     2015-02-09 18:23:01.837007936 +0200
   2 +++ b/arch/mips/lantiq/xway/reset.c     2015-02-09 19:16:43.006081435 +0200
   3 @@ -44,6 +44,37 @@
   4  #define RCU_BOOT_SEL(x)                ((x >> 18) & 0x7)
   5  #define RCU_BOOT_SEL_XRX200(x) (((x >> 17) & 0xf) | ((x >> 8) & 0x10))
   6
   7 +/* dwc2 USB configuration registers */
   8 +#define RCU_USB1CFG            0x0018
   9 +#define RCU_USB2CFG            0x0034
  10 +
  11 +/* USB DMA endianness bits */
  12 +#define RCU_USBCFG_HDSEL_BIT   BIT(11)
  13 +#define RCU_USBCFG_HOST_END_BIT        BIT(10)
  14 +#define RCU_USBCFG_SLV_END_BIT BIT(9)
  15 +
  16 +/* USB reset bits */
  17 +#define RCU_USBRESET           0x0010
  18 +
  19 +#define USBRESET_BIT           BIT(4)
  20 +
  21 +#define RCU_USBRESET2          0x0048
  22 +
  23 +#define USB1RESET_BIT          BIT(4)
  24 +#define USB2RESET_BIT          BIT(5)
  25 +
  26 +#define RCU_CFG1A              0x0038
  27 +#define RCU_CFG1B              0x003C
  28 +
  29 +/* USB PMU devices */
  30 +#define PMU_AHBM               BIT(15)
  31 +#define PMU_USB0               BIT(6)
  32 +#define PMU_USB1               BIT(27)
  33 +
  34 +/* USB PHY PMU devices */
  35 +#define PMU_USB0_P             BIT(0)
  36 +#define PMU_USB1_P             BIT(26)
  37 +
  38  /* remapped base addr of the reset control unit */
  39  static void __iomem *ltq_rcu_membase;
  40  static struct device_node *ltq_rcu_np;
  41 @@ -200,6 +231,45 @@
  42         unreachable();
  43  }
  44
  45 +static void ltq_usb_init(void)
  46 +{
  47 +       /* Power for USB cores 1 & 2 */
  48 +       ltq_pmu_enable(PMU_AHBM);
  49 +       ltq_pmu_enable(PMU_USB0);
  50 +       ltq_pmu_enable(PMU_USB1);
  51 +
  52 +       ltq_rcu_w32(ltq_rcu_r32(RCU_CFG1A) | BIT(0), RCU_CFG1A);
  53 +       ltq_rcu_w32(ltq_rcu_r32(RCU_CFG1B) | BIT(0), RCU_CFG1B);
  54 +
  55 +       /* Enable USB PHY power for cores 1 & 2 */
  56 +       ltq_pmu_enable(PMU_USB0_P);
  57 +       ltq_pmu_enable(PMU_USB1_P);
  58 +
  59 +       /* Configure cores to host mode */
  60 +       ltq_rcu_w32(ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_HDSEL_BIT,
  61 +               RCU_USB1CFG);
  62 +       ltq_rcu_w32(ltq_rcu_r32(RCU_USB2CFG) & ~RCU_USBCFG_HDSEL_BIT,
  63 +               RCU_USB2CFG);
  64 +
  65 +       /* Select DMA endianness (Host-endian: big-endian) */
  66 +       ltq_rcu_w32((ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_SLV_END_BIT)
  67 +               | RCU_USBCFG_HOST_END_BIT, RCU_USB1CFG);
  68 +       ltq_rcu_w32(ltq_rcu_r32((RCU_USB2CFG) & ~RCU_USBCFG_SLV_END_BIT)
  69 +               | RCU_USBCFG_HOST_END_BIT, RCU_USB2CFG);
  70 +
  71 +       /* Hard reset USB state machines */
  72 +       ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET) | USBRESET_BIT, RCU_USBRESET);
  73 +       udelay(50 * 1000);
  74 +       ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET) & ~USBRESET_BIT, RCU_USBRESET);
  75 +
  76 +       /* Soft reset USB state machines */
  77 +       ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET2)
  78 +               | USB1RESET_BIT | USB2RESET_BIT, RCU_USBRESET2);
  79 +       udelay(50 * 1000);
  80 +       ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET2)
  81 +               & ~(USB1RESET_BIT | USB2RESET_BIT), RCU_USBRESET2);
  82 +}
  83 +
  84  static int __init mips_reboot_setup(void)
  85  {
  86         struct resource res;
  87 @@ -223,6 +293,8 @@
  88         if (!ltq_rcu_membase)
  89                 panic("Failed to remap core memory");
  90
  91 +       ltq_usb_init();
  92 +
  93         _machine_restart = ltq_machine_restart;
  94         _machine_halt = ltq_machine_halt;
  95         pm_power_off = ltq_machine_power_off;