target/linux/lantiq/patches-3.3/0031-MIPS-lantiq-unify-xway-prom-code.patch

   1 From 707d76cc9dc4ddfcea280b91df83bd726407518a Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 8 Mar 2012 11:44:55 +0100
   4 Subject: [PATCH 31/70] MIPS: lantiq: unify xway prom code
   5
   6 The xway prom-ase.c and prom-xway.c files are redundant. Unify the 2 files.
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 ---
  10  arch/mips/lantiq/xway/Makefile     |    5 +--
  11  arch/mips/lantiq/xway/Makefile.rej |   11 -----
  12  arch/mips/lantiq/xway/prom-ase.c   |   48 ----------------------
  13  arch/mips/lantiq/xway/prom-xway.c  |   64 -----------------------------
  14  arch/mips/lantiq/xway/prom.c       |   79 ++++++++++++++++++++++++++++++++++++
  15  5 files changed, 80 insertions(+), 127 deletions(-)
  16  delete mode 100644 arch/mips/lantiq/xway/Makefile.rej
  17  delete mode 100644 arch/mips/lantiq/xway/prom-ase.c
  18  delete mode 100644 arch/mips/lantiq/xway/prom-xway.c
  19  create mode 100644 arch/mips/lantiq/xway/prom.c
  20
  21 Index: linux-3.3.8/arch/mips/lantiq/xway/Makefile
  22 ===================================================================
  23 --- linux-3.3.8.orig/arch/mips/lantiq/xway/Makefile     2012-07-31 08:34:35.000000000 +0200
  24 +++ linux-3.3.8/arch/mips/lantiq/xway/Makefile  2012-07-31 08:52:14.155414782 +0200
  25 @@ -1,7 +1,4 @@
  26 -obj-y := sysctrl.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o clk.o
  27 -
  28 -obj-$(CONFIG_SOC_XWAY) += prom-xway.o
  29 -obj-$(CONFIG_SOC_AMAZON_SE) += prom-ase.o
  30 +obj-y := sysctrl.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o clk.o prom.o
  31
  32  obj-$(CONFIG_LANTIQ_MACH_EASY50712) += mach-easy50712.o
  33  obj-$(CONFIG_LANTIQ_MACH_EASY50601) += mach-easy50601.o
  34 Index: linux-3.3.8/arch/mips/lantiq/xway/prom-ase.c
  35 ===================================================================
  36 --- linux-3.3.8.orig/arch/mips/lantiq/xway/prom-ase.c   2012-07-31 08:34:34.000000000 +0200
  37 +++ /dev/null   1970-01-01 00:00:00.000000000 +0000
  38 @@ -1,48 +0,0 @@
  39 -/*
  40 - *  This program is free software; you can redistribute it and/or modify it
  41 - *  under the terms of the GNU General Public License version 2 as published
  42 - *  by the Free Software Foundation.
  43 - *
  44 - *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
  45 - */
  46 -
  47 -#include <linux/export.h>
  48 -#include <linux/clk.h>
  49 -#include <asm/bootinfo.h>
  50 -#include <asm/time.h>
  51 -
  52 -#include <lantiq_soc.h>
  53 -
  54 -#include "devices.h"
  55 -#include "../prom.h"
  56 -
  57 -#define SOC_AMAZON_SE  "Amazon_SE"
  58 -
  59 -#define PART_SHIFT     12
  60 -#define PART_MASK      0x0FFFFFFF
  61 -#define REV_SHIFT      28
  62 -#define REV_MASK       0xF0000000
  63 -
  64 -void __init ltq_soc_detect(struct ltq_soc_info *i)
  65 -{
  66 -       i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
  67 -       i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
  68 -       sprintf(i->rev_type, "1.%d", i->rev);
  69 -       switch (i->partnum) {
  70 -       case SOC_ID_AMAZON_SE:
  71 -               i->name = SOC_AMAZON_SE;
  72 -               i->type = SOC_TYPE_AMAZON_SE;
  73 -               break;
  74 -
  75 -       default:
  76 -               unreachable();
  77 -               break;
  78 -       }
  79 -}
  80 -
  81 -void __init ltq_soc_setup(void)
  82 -{
  83 -       ltq_register_ase_asc();
  84 -       ltq_register_gpio();
  85 -       ltq_register_wdt();
  86 -}
  87 Index: linux-3.3.8/arch/mips/lantiq/xway/prom-xway.c
  88 ===================================================================
  89 --- linux-3.3.8.orig/arch/mips/lantiq/xway/prom-xway.c  2012-07-31 08:34:34.000000000 +0200
  90 +++ /dev/null   1970-01-01 00:00:00.000000000 +0000
  91 @@ -1,64 +0,0 @@
  92 -/*
  93 - *  This program is free software; you can redistribute it and/or modify it
  94 - *  under the terms of the GNU General Public License version 2 as published
  95 - *  by the Free Software Foundation.
  96 - *
  97 - *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
  98 - */
  99 -
 100 -#include <linux/export.h>
 101 -#include <linux/clk.h>
 102 -#include <asm/bootinfo.h>
 103 -#include <asm/time.h>
 104 -
 105 -#include <lantiq_soc.h>
 106 -
 107 -#include "devices.h"
 108 -#include "../prom.h"
 109 -
 110 -#define SOC_DANUBE     "Danube"
 111 -#define SOC_TWINPASS   "Twinpass"
 112 -#define SOC_AR9                "AR9"
 113 -
 114 -#define PART_SHIFT     12
 115 -#define PART_MASK      0x0FFFFFFF
 116 -#define REV_SHIFT      28
 117 -#define REV_MASK       0xF0000000
 118 -
 119 -void __init ltq_soc_detect(struct ltq_soc_info *i)
 120 -{
 121 -       i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
 122 -       i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
 123 -       sprintf(i->rev_type, "1.%d", i->rev);
 124 -       switch (i->partnum) {
 125 -       case SOC_ID_DANUBE1:
 126 -       case SOC_ID_DANUBE2:
 127 -               i->name = SOC_DANUBE;
 128 -               i->type = SOC_TYPE_DANUBE;
 129 -               break;
 130 -
 131 -       case SOC_ID_TWINPASS:
 132 -               i->name = SOC_TWINPASS;
 133 -               i->type = SOC_TYPE_DANUBE;
 134 -               break;
 135 -
 136 -       case SOC_ID_ARX188:
 137 -       case SOC_ID_ARX168:
 138 -       case SOC_ID_ARX182:
 139 -               i->name = SOC_AR9;
 140 -               i->type = SOC_TYPE_AR9;
 141 -               break;
 142 -
 143 -       default:
 144 -               unreachable();
 145 -               break;
 146 -       }
 147 -}
 148 -
 149 -void __init ltq_soc_setup(void)
 150 -{
 151 -       ltq_register_asc(0);
 152 -       ltq_register_asc(1);
 153 -       ltq_register_gpio();
 154 -       ltq_register_wdt();
 155 -}
 156 Index: linux-3.3.8/arch/mips/lantiq/xway/prom.c
 157 ===================================================================
 158 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
 159 +++ linux-3.3.8/arch/mips/lantiq/xway/prom.c    2012-07-31 08:52:14.155414782 +0200
 160 @@ -0,0 +1,79 @@
 161 +/*
 162 + *  This program is free software; you can redistribute it and/or modify it
 163 + *  under the terms of the GNU General Public License version 2 as published
 164 + *  by the Free Software Foundation.
 165 + *
 166 + *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
 167 + */
 168 +
 169 +#include <linux/export.h>
 170 +#include <linux/clk.h>
 171 +#include <asm/bootinfo.h>
 172 +#include <asm/time.h>
 173 +
 174 +#include <lantiq_soc.h>
 175 +
 176 +#include "../prom.h"
 177 +#include "devices.h"
 178 +
 179 +#define SOC_DANUBE     "Danube"
 180 +#define SOC_TWINPASS   "Twinpass"
 181 +#define SOC_AR9                "AR9"
 182 +#define SOC_VR9                "VR9"
 183 +
 184 +#define PART_SHIFT     12
 185 +#define PART_MASK      0x0FFFFFFF
 186 +#define REV_SHIFT      28
 187 +#define REV_MASK       0xF0000000
 188 +
 189 +#define SOC_AMAZON_SE  "Amazon_SE"
 190 +
 191 +void __init ltq_soc_detect(struct ltq_soc_info *i)
 192 +{
 193 +       i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
 194 +       i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
 195 +       sprintf(i->rev_type, "1.%d", i->rev);
 196 +       switch (i->partnum) {
 197 +       case SOC_ID_DANUBE1:
 198 +       case SOC_ID_DANUBE2:
 199 +               i->name = SOC_DANUBE;
 200 +               i->type = SOC_TYPE_DANUBE;
 201 +               break;
 202 +
 203 +       case SOC_ID_TWINPASS:
 204 +               i->name = SOC_TWINPASS;
 205 +               i->type = SOC_TYPE_DANUBE;
 206 +               break;
 207 +
 208 +       case SOC_ID_ARX188:
 209 +       case SOC_ID_ARX168:
 210 +       case SOC_ID_ARX182:
 211 +               i->name = SOC_AR9;
 212 +               i->type = SOC_TYPE_AR9;
 213 +               break;
 214 +
 215 +       case SOC_ID_AMAZON_SE:
 216 +               i->name = SOC_AMAZON_SE;
 217 +               i->type = SOC_TYPE_AMAZON_SE;
 218 +#ifdef CONFIG_PCI
 219 +               panic("ase is only supported for non pci kernels");
 220 +#endif
 221 +               break;
 222 +
 223 +       default:
 224 +               unreachable();
 225 +               break;
 226 +       }
 227 +}
 228 +
 229 +void __init ltq_soc_setup(void)
 230 +{
 231 +       if (ltq_is_ase()) {
 232 +               ltq_register_ase_asc();
 233 +       } else {
 234 +               ltq_register_asc(0);
 235 +               ltq_register_asc(1);
 236 +       }
 237 +       ltq_register_gpio();
 238 +       ltq_register_wdt();
 239 +}