1 From 406d86e5990ac171f18ef6e2973672d8fbfe1556 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Wed, 20 Feb 2013 08:40:33 +0100
4 Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1
7 This patch adds support for the TP-Link TL-WDR4900 v1
8 concurrent dual-band wireless router. The devices uses
9 the Freescale P1014 SoC.
11 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
13 arch/powerpc/boot/Makefile | 3 +
14 arch/powerpc/boot/cuboot-tl-wdr4900-v1.c | 164 ++++++++++++++++++++++++++
15 arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 166 +++++++++++++++++++++++++++
16 arch/powerpc/boot/wrapper | 4 +
17 arch/powerpc/platforms/85xx/Kconfig | 11 ++
18 arch/powerpc/platforms/85xx/Makefile | 1 +
19 arch/powerpc/platforms/85xx/tl_wdr4900_v1.c | 145 +++++++++++++++++++++++
20 7 files changed, 494 insertions(+)
21 create mode 100644 arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
22 create mode 100644 arch/powerpc/boot/dts/tl-wdr4900-v1.dts
23 create mode 100644 arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
25 --- a/arch/powerpc/boot/Makefile
26 +++ b/arch/powerpc/boot/Makefile
27 @@ -98,6 +98,8 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot
28 src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
29 src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
30 src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c
31 +src-plat-$(CONFIG_TL_WDR4900_V1) += cuboot-tl-wdr4900-v1.c
34 src-wlib := $(sort $(src-wlib-y))
35 src-plat := $(sort $(src-plat-y))
36 @@ -278,6 +280,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm
37 image-$(CONFIG_TQM8560) += cuImage.tqm8560
38 image-$(CONFIG_SBC8548) += cuImage.sbc8548
39 image-$(CONFIG_KSI8560) += cuImage.ksi8560
40 +image-$(CONFIG_TL_WDR4900_V1) += cuImage.tl-wdr4900-v1
42 # Board ports in arch/powerpc/platform/embedded6xx/Kconfig
43 image-$(CONFIG_STORCENTER) += cuImage.storcenter
45 +++ b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
48 + * U-Boot compatibility wrapper for the TP-Link TL-WDR4900 v1 board
50 + * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
54 + * Author: Scott Wood <scottwood@freescale.com>
55 + * Copyright (c) 2007 Freescale Semiconductor, Inc.
58 + * Authors: Scott Wood <scottwood@freescale.com>
59 + * Grant Likely <grant.likely@secretlab.ca>
60 + * Copyright (c) 2007 Freescale Semiconductor, Inc.
61 + * Copyright (c) 2008 Secret Lab Technologies Ltd.
63 + * This program is free software; you can redistribute it and/or modify it
64 + * under the terms of the GNU General Public License version 2 as published
65 + * by the Free Software Foundation.
76 +static unsigned long bus_freq;
77 +static unsigned long int_freq;
79 +static unsigned char enetaddr[6];
81 +static void process_boot_dtb(void *boot_dtb)
83 + const u32 *na, *ns, *reg, *val32;
88 + /* Make sure FDT blob is sane */
89 + if (fdt_check_header(boot_dtb) != 0)
90 + fatal("Invalid device tree blob\n");
92 + /* Find the #address-cells and #size-cells properties */
93 + node = fdt_path_offset(boot_dtb, "/");
95 + fatal("Cannot find root node\n");
96 + na = fdt_getprop(boot_dtb, node, "#address-cells", &size);
97 + if (!na || (size != 4))
98 + fatal("Cannot find #address-cells property");
100 + ns = fdt_getprop(boot_dtb, node, "#size-cells", &size);
101 + if (!ns || (size != 4))
102 + fatal("Cannot find #size-cells property");
104 + /* Find the memory range */
105 + node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
106 + "memory", sizeof("memory"));
108 + fatal("Cannot find memory node\n");
109 + reg = fdt_getprop(boot_dtb, node, "reg", &size);
110 + if (size < (*na+*ns) * sizeof(u32))
111 + fatal("cannot get memory range\n");
113 + /* Only interested in memory based at 0 */
114 + for (i = 0; i < *na; i++)
116 + fatal("Memory range is not based at address 0\n");
118 + /* get the memsize and trucate it to under 4G on 32 bit machines */
120 + for (i = 0; i < *ns; i++)
121 + memsize64 = (memsize64 << 32) | *reg++;
122 + if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
123 + memsize64 = 0xffffffff;
125 + mem_size = memsize64;
127 + /* get clock frequencies */
128 + node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
129 + "cpu", sizeof("cpu"));
131 + fatal("Cannot find cpu node\n");
133 + val32 = fdt_getprop(boot_dtb, node, "clock-frequency", &size);
134 + if (!val32 || (size != 4))
135 + fatal("Cannot get clock frequency");
139 + val32 = fdt_getprop(boot_dtb, node, "bus-frequency", &size);
140 + if (!val32 || (size != 4))
141 + fatal("Cannot get bus frequency");
145 + path = fdt_get_alias(boot_dtb, "ethernet0");
149 + node = fdt_path_offset(boot_dtb, path);
151 + fatal("Cannot find ethernet0 node");
153 + p = fdt_getprop(boot_dtb, node, "mac-address", &size);
154 + if (!p || (size < 6)) {
155 + printf("no mac-address property, finding local\n\r");
156 + p = fdt_getprop(boot_dtb, node, "local-mac-address", &size);
159 + if (!p || (size < 6))
160 + fatal("cannot get MAC addres");
162 + memcpy(enetaddr, p, sizeof(enetaddr));
166 +static void platform_fixups(void)
170 + dt_fixup_memory(0, mem_size);
172 + dt_fixup_mac_address_by_alias("ethernet0", enetaddr);
173 + dt_fixup_cpu_clocks(int_freq, bus_freq / 8, bus_freq);
175 + /* Unfortunately, the specific model number is encoded in the
176 + * soc node name in existing dts files -- once that is fixed,
177 + * this can do a simple path lookup.
179 + soc = find_node_by_devtype(NULL, "soc");
181 + void *serial = NULL;
183 + setprop(soc, "bus-frequency", &bus_freq, sizeof(bus_freq));
185 + while ((serial = find_node_by_devtype(serial, "serial"))) {
186 + if (get_parent(serial) != soc)
189 + setprop(serial, "clock-frequency", &bus_freq,
195 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
196 + unsigned long r6, unsigned long r7)
198 + mem_size = 64 * 1024 * 1024;
200 + simple_alloc_init(_end, mem_size - (u32)_end - 1024*1024, 32, 64);
202 + fdt_init(_dtb_start);
203 + serial_console_init();
205 + printf("\n\r-- TL-WDR4900 v1 boot wrapper --\n\r");
207 + process_boot_dtb((void *) r3);
209 + platform_ops.fixups = platform_fixups;
212 +++ b/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
215 + * TP-Link TL-WDR4900 v1 Device Tree Source
217 + * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
219 + * This program is free software; you can redistribute it and/or modify it
220 + * under the terms of the GNU General Public License as published by the
221 + * Free Software Foundation; either version 2 of the License, or (at your
222 + * option) any later version.
225 +/include/ "fsl/p1010si-pre.dtsi"
228 + model = "TP-Link TL-WDR4900 v1";
229 + compatible = "tp-link,TL-WDR4900v1";
232 + bootargs = "console=ttyS0,115200";
234 + linux,stdout-path = "/soc@ffe00000/serial@4500";
239 + device_type = "memory";
242 + soc: soc@ffe00000 {
243 + ranges = <0x0 0x0 0xffe00000 0x100000>;
247 + #address-cells = <1>;
249 + compatible = "spansion,s25fl129p1";
251 + spi-max-frequency = <25000000>;
254 + reg = <0x0 0x0050000>;
260 + reg = <0x00050000 0x00010000>;
266 + reg = <0x00060000 0x002a0000>;
271 + reg = <0x00300000 0x00ce0000>;
276 + reg = <0x00fe0000 0x00010000>;
282 + reg = <0x00ff0000 0x00010000>;
288 + reg = <0x00060000 0x00f80000>;
289 + label = "firmware";
294 + gpio0: gpio-controller@f000 {
303 + phy0: ethernet-phy@0 {
304 + /* interrupts = <3 1 0 0>; */
310 + status = "disabled";
314 + status = "disabled";
317 + enet0: ethernet@b0000 {
318 + phy-handle = <&phy0>;
319 + phy-connection-type = "rgmii-id";
322 + enet1: ethernet@b1000 {
323 + status = "disabled";
326 + enet2: ethernet@b2000 {
327 + status = "disabled";
331 + status = "disabled";
334 + serial1: serial@4600 {
335 + status = "disabled";
339 + status = "disabled";
343 + status = "disabled";
347 + pci0: pcie@ffe09000 {
348 + reg = <0 0xffe09000 0 0x1000>;
349 + ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
350 + 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
352 + ranges = <0x2000000 0x0 0xa0000000
353 + 0x2000000 0x0 0xa0000000
362 + pci1: pcie@ffe0a000 {
363 + reg = <0 0xffe0a000 0 0x1000>;
364 + ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
365 + 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
367 + ranges = <0x2000000 0x0 0x80000000
368 + 0x2000000 0x0 0x80000000
377 + ifc: ifc@ffe1e000 {
378 + status = "disabled";
382 + compatible = "gpio-leds";
385 + gpios = <&gpio0 2 1>; /* active low */
386 + label = "tp-link:blue:system";
390 + gpios = <&gpio0 3 1>; /* active low */
391 + label = "tp-link:green:usb1";
395 + gpios = <&gpio0 4 1>; /* active low */
396 + label = "tp-link:green:usb2";
401 + compatible = "gpio-keys";
404 + label = "Reset button";
405 + gpios = <&gpio0 5 1>; /* active low */
406 + linux,code = <0x198>; /* KEY_RESTART */
411 +/include/ "fsl/p1010si-post.dtsi"
412 --- a/arch/powerpc/boot/wrapper
413 +++ b/arch/powerpc/boot/wrapper
414 @@ -197,6 +197,10 @@ cuboot*)
415 *-mpc85*|*-tqm85*|*-sbc85*)
416 platformo=$object/cuboot-85xx.o
419 + platformo=$object/cuboot-tl-wdr4900-v1.o
420 + link_address='0x1000000'
423 link_address='0x800000'
425 --- a/arch/powerpc/platforms/85xx/Kconfig
426 +++ b/arch/powerpc/platforms/85xx/Kconfig
427 @@ -147,6 +147,17 @@ config STX_GP3
429 select DEFAULT_UIMAGE
431 +config TL_WDR4900_V1
432 + bool "TP-Link TL-WDR4900 v1"
433 + select DEFAULT_UIMAGE
434 + select ARCH_REQUIRE_GPIOLIB
435 + select GPIO_MPC8XXX
437 + This option enables support for the TP-Link TL-WDR4900 v1 board.
439 + This board is a Concurrent Dual-Band wireless router with a
440 + Freescale P1014 SoC.
443 bool "TQ Components TQM8540"
445 --- a/arch/powerpc/platforms/85xx/Makefile
446 +++ b/arch/powerpc/platforms/85xx/Makefile
447 @@ -24,6 +24,7 @@ obj-$(CONFIG_P5020_DS) += p5020_ds.o
448 obj-$(CONFIG_P5040_DS) += p5040_ds.o corenet_ds.o
449 obj-$(CONFIG_STX_GP3) += stx_gp3.o
450 obj-$(CONFIG_TQM85xx) += tqm85xx.o
451 +obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
452 obj-$(CONFIG_SBC8548) += sbc8548.o
453 obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o
454 obj-$(CONFIG_KSI8560) += ksi8560.o
456 +++ b/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
459 + * TL-WDR4900 v1 board setup
461 + * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
465 + * P1010RDB Board Setup
466 + * Copyright 2011 Freescale Semiconductor Inc.
468 + * This program is free software; you can redistribute it and/or modify it
469 + * under the terms of the GNU General Public License as published by the
470 + * Free Software Foundation; either version 2 of the License, or (at your
471 + * option) any later version.
474 +#include <linux/stddef.h>
475 +#include <linux/kernel.h>
476 +#include <linux/pci.h>
477 +#include <linux/delay.h>
478 +#include <linux/interrupt.h>
479 +#include <linux/of_platform.h>
480 +#include <linux/ath9k_platform.h>
481 +#include <linux/leds.h>
483 +#include <asm/time.h>
484 +#include <asm/machdep.h>
485 +#include <asm/pci-bridge.h>
486 +#include <mm/mmu_decl.h>
487 +#include <asm/prom.h>
488 +#include <asm/udbg.h>
489 +#include <asm/mpic.h>
491 +#include <sysdev/fsl_soc.h>
492 +#include <sysdev/fsl_pci.h>
494 +#include "mpc85xx.h"
496 +void __init tl_wdr4900_v1_pic_init(void)
498 + struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
499 + MPIC_SINGLE_DEST_CPU,
500 + 0, 256, " OpenPIC ");
502 + BUG_ON(mpic == NULL);
508 +static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = {
510 + .name = "tp-link:blue:wps",
516 +static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = {
518 + .eeprom_name = "pci_wmac0.eeprom",
519 + .leds = tl_wdr4900_v1_wmac_leds_gpio,
520 + .num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio),
523 +static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = {
525 + .eeprom_name = "pci_wmac1.eeprom",
528 +static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev)
530 + if (!machine_is(tl_wdr4900_v1))
533 + if (dev->bus->number == 1 &&
534 + PCI_SLOT(dev->devfn) == 0) {
535 + dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data;
539 + if (dev->bus->number == 3 &&
540 + PCI_SLOT(dev->devfn) == 0 &&
541 + dev->device == 0xabcd) {
542 + dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data;
545 + * The PCI header of the AR9381 chip is not programmed
546 + * correctly by the bootloader and the device uses wrong
547 + * data due to that. Replace the broken values with the
550 + dev->device = 0x30;
551 + dev->class = 0x028000;
553 + pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev));
557 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
558 + tl_wdr4900_v1_pci_wmac_fixup);
559 +#endif /* CONFIG_PCI */
562 + * Setup the architecture
564 +static void __init tl_wdr4900_v1_setup_arch(void)
566 + if (ppc_md.progress)
567 + ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
569 + fsl_pci_assign_primary();
571 + printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
574 +machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
575 +machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier);
578 + * Called very early, device-tree isn't unflattened
580 +static int __init tl_wdr4900_v1_probe(void)
582 + unsigned long root = of_get_flat_dt_root();
584 + if (of_flat_dt_is_compatible(root, "tp-link,TL-WDR4900v1"))
590 +define_machine(tl_wdr4900_v1) {
591 + .name = "Freescale P1014",
592 + .probe = tl_wdr4900_v1_probe,
593 + .setup_arch = tl_wdr4900_v1_setup_arch,
594 + .init_IRQ = tl_wdr4900_v1_pic_init,
596 + .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
598 + .get_irq = mpic_get_irq,
599 + .restart = fsl_rstcr_restart,
600 + .calibrate_decr = generic_calibrate_decr,
601 + .progress = udbg_progress,