[mvebu]: update wrt1900ac dts
[openwrt/svn-archive/archive.git] / target / linux / mvebu / files / arch / arm / boot / dts / armada-xp-mamba.dts
1 /*
2 * Device Tree file for the Linksys WRT1900AC (Mamba).
3 *
4 * Note: this board is shipped with a new generation boot loader that
5 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
6 * is used, the CONFIG_DEBUG_MVEBU_UART_ALTERNATE option should be
7 * used.
8 *
9 * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
10 *
11 * Based on armada-xp-axpwifiap.dts:
12 *
13 * Copyright (C) 2013 Marvell
14 *
15 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
16 *
17 * This file is licensed under the terms of the GNU General Public
18 * License version 2. This program is licensed "as is" without any
19 * warranty of any kind, whether express or implied.
20 */
21
22 /dts-v1/;
23 #include <dt-bindings/gpio/gpio.h>
24 #include <dt-bindings/input/input.h>
25 #include "armada-xp-mv78230.dtsi"
26
27 / {
28 model = "Linksys WRT1900AC (Mamba)";
29 compatible = "linksys,mamba", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
30
31 chosen {
32 bootargs = "console=ttyS0,115200 earlyprintk";
33 };
34
35 memory {
36 device_type = "memory";
37 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
38 };
39
40 soc {
41 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
42 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
43
44 pcie-controller {
45 status = "okay";
46
47 /* Etron EJ168 USB 3.0 controller */
48 pcie@1,0 {
49 /* Port 0, Lane 0 */
50 status = "okay";
51 };
52
53 /* First mini-PCIe port */
54 pcie@2,0 {
55 /* Port 0, Lane 1 */
56 status = "okay";
57 };
58
59 /* Second mini-PCIe port */
60 pcie@3,0 {
61 /* Port 0, Lane 3 */
62 status = "okay";
63 };
64 };
65
66 internal-regs {
67 pinctrl {
68 pmx_ge0: pmx-ge0 {
69 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
70 "mpp4", "mpp5", "mpp6", "mpp7",
71 "mpp8", "mpp9", "mpp10", "mpp11";
72 marvell,function = "ge0";
73 };
74
75 pmx_ge1: pmx-ge1 {
76 marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15",
77 "mpp16", "mpp17", "mpp18", "mpp19",
78 "mpp20", "mpp21", "mpp22", "mpp23";
79 marvell,function = "ge1";
80 };
81
82 pmx_keys: pmx-keys {
83 marvell,pins = "mpp32", "mpp33";
84 marvell,function = "gpio";
85 };
86
87 pmx_spi: pmx-spi {
88 marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39";
89 marvell,function = "spi";
90 };
91
92 power_led_pin: power-led-pin {
93 marvell,pins = "mpp40";
94 marvell,function = "gpio";
95 };
96
97 gpio_fan_pin: gpio-fan-pin {
98 marvell,pins = "mpp24";
99 marvell,function = "gpio";
100 };
101
102 };
103
104 serial@12000 {
105 clock-frequency = <250000000>;
106 status = "okay";
107 };
108
109 serial@12100 {
110 clock-frequency = <250000000>;
111 status = "okay";
112 };
113
114 sata@a0000 {
115 nr-ports = <1>;
116 status = "okay";
117 };
118
119 mdio {
120 status = "disabled";
121 };
122
123 ethernet@70000 {
124 pinctrl-0 = <&pmx_ge0>;
125 pinctrl-names = "default";
126 status = "okay";
127 phy-mode = "rgmii-id";
128 fixed-link {
129 speed = <1000>;
130 full-duplex;
131 };
132 };
133
134 ethernet@74000 {
135 pinctrl-0 = <&pmx_ge1>;
136 pinctrl-names = "default";
137 status = "okay";
138 phy-mode = "rgmii-id";
139 fixed-link {
140 speed = <1000>;
141 full-duplex;
142 };
143 };
144
145 /* USB part of the eSATA/USB 2.0 port */
146 usb@50000 {
147 status = "okay";
148 };
149
150 i2c@11000 {
151 status = "okay";
152 clock-frequency = <100000>;
153
154 tlc59116@68 {
155 #gpio-cells = <2>;
156 compatible = "gpio,tlc59116";
157 reg = <0x68>;
158 gpio-controller;
159 };
160 };
161
162 nand@d0000 {
163 status = "okay";
164 num-cs = <1>;
165 marvell,nand-keep-config;
166 marvell,nand-enable-arbiter;
167 nand-on-flash-bbt;
168 nand-ecc-strength = <4>;
169 nand-ecc-step-size = <512>;
170
171
172 partition@0 {
173 label = "u-boot";
174 reg = <0x0000000 0x100000>; /* 1MB */
175 read-only;
176 };
177
178 partition@100000 {
179 label = "u_env";
180 reg = <0x100000 0x40000>; /* 256KB */
181 };
182
183 partition@140000 {
184 label = "s_env";
185 reg = <0x140000 0x40000>; /* 256KB */
186 };
187
188 partition@900000 {
189 label = "devinfo";
190 reg = <0x900000 0x100000>; /* 1MB */
191 read-only;
192 };
193
194 partition@a00000 {
195 label = "kernel1";
196 reg = <0xa00000 0x2800000>; /* 3MB */
197 };
198
199 partition@d00000 {
200 label = "rootfs1";
201 reg = <0xd00000 0x2500000>; /* 37MB */
202 };
203
204 partition@3200000 {
205 label = "kernel2";
206 reg = <0x3200000 0x2800000>; /* 3MB */
207 };
208
209 partition@3500000 {
210 label = "rootfs2";
211 reg = <0x3500000 0x2500000>; /* 37MB */
212 };
213
214 /* Last MB is for the BBT, i.e. not writable */
215 partition@5a00000 {
216 label = "syscfg";
217 reg = <0x5a00000 0x2600000>; /* 38MB */
218 };
219 };
220
221 spi0: spi@10600 {
222 status = "okay";
223 pinctrl-0 = <&pmx_spi>;
224 pinctrl-names = "default";
225
226 spi-flash@0 {
227 #address-cells = <1>;
228 #size-cells = <1>;
229 compatible = "mr25h256";
230 reg = <0>; /* Chip select 0 */
231 spi-max-frequency = <108000000>;
232 };
233 };
234 };
235 };
236
237 gpio_keys {
238 compatible = "gpio-keys";
239 #address-cells = <1>;
240 #size-cells = <0>;
241 pinctrl-0 = <&pmx_keys>;
242 pinctrl-names = "default";
243
244 button@1 {
245 label = "WPS";
246 linux,code = <KEY_WPS_BUTTON>;
247 gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
248 };
249
250 button@2 {
251 label = "Factory Reset Button";
252 linux,code = <KEY_RESTART>;
253 gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
254 };
255 };
256
257 gpio-leds {
258 compatible = "gpio-leds";
259 pinctrl-0 = <&power_led_pin>;
260 pinctrl-names = "default";
261
262 power {
263 label = "mamba:white:power";
264 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
265 default-state = "on";
266 };
267 };
268
269 gpio_fan {
270 /* SUNON HA4010V4-0000-C99 */
271 compatible = "gpio-fan";
272 gpios = <&gpio0 24 0>;
273
274 gpio-fan,speed-map = <0 0
275 4500 1>;
276 };
277 };