target/linux/mvebu/patches-3.10/0007-clk-mvebu-create-parent-child-relation-for-PCIe-cloc.patch

   1 From f12aa05cbfb88e5541814ffa7be7e195471568bd Mon Sep 17 00:00:00 2001
   2 From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   3 Date: Fri, 7 Dec 2012 20:35:20 +0100
   4 Subject: [PATCH 007/203] clk: mvebu: create parent-child relation for PCIe
   5  clocks on Armada 370
   6
   7 The Armada 370 has two gatable clocks for each PCIe interface, and we
   8 want both of them to be enabled. We therefore make one of the two
   9 clocks a child of the other, as we did for the sataX and sataXlnk
  10 clocks on Armada XP.
  11
  12 Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  13 Cc: Mike Turquette <mturquette@linaro.org>
  14 ---
  15  drivers/clk/mvebu/clk-gating-ctrl.c | 4 ++--
  16  1 file changed, 2 insertions(+), 2 deletions(-)
  17
  18 --- a/drivers/clk/mvebu/clk-gating-ctrl.c
  19 +++ b/drivers/clk/mvebu/clk-gating-ctrl.c
  20 @@ -119,8 +119,8 @@ static const struct mvebu_soc_descr __in
  21         { "pex1_en", NULL,  2 },
  22         { "ge1", NULL, 3 },
  23         { "ge0", NULL, 4 },
  24 -       { "pex0", NULL, 5 },
  25 -       { "pex1", NULL, 9 },
  26 +       { "pex0", "pex0_en", 5 },
  27 +       { "pex1", "pex1_en", 9 },
  28         { "sata0", NULL, 15 },
  29         { "sdio", NULL, 17 },
  30         { "tdm", NULL, 25 },