target/linux/mvebu/patches-3.10/0025-arm-mvebu-avoid-hardcoded-virtual-address-in-coheren.patch

   1 From a4dd628f515f361cecfae08e568891442042e4e2 Mon Sep 17 00:00:00 2001
   2 From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   3 Date: Wed, 5 Jun 2013 09:04:55 +0200
   4 Subject: [PATCH 025/203] arm: mvebu: avoid hardcoded virtual address in
   5  coherency code
   6
   7 Now that the coherency_get_cpu_count() function no longer requires a
   8 very early mapping of the coherency unit registers, we can avoid the
   9 hardcoded virtual address in coherency.c. However, the coherency
  10 features are still used quite early, so we need to do the of_iomap()
  11 early enough, at the ->init_timer() level, so we have the call of
  12 coherency_init() at this point.
  13
  14 Unfortunately, at ->init_timer() time, it is not possible to register
  15 a bus notifier, so we add a separate coherency_late_init() function
  16 that gets called as as postcore_initcall(), when bus notifiers are
  17 available.
  18
  19 Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  20 Acked-by: Arnd Bergmann <arnd@arndb.de>
  21 Signed-off-by: Jason Cooper <jason@lakedaemon.net>
  22 ---
  23  arch/arm/mach-mvebu/armada-370-xp.c |  2 +-
  24  arch/arm/mach-mvebu/coherency.c     | 20 ++++++++++----------
  25  2 files changed, 11 insertions(+), 11 deletions(-)
  26
  27 --- a/arch/arm/mach-mvebu/armada-370-xp.c
  28 +++ b/arch/arm/mach-mvebu/armada-370-xp.c
  29 @@ -47,6 +47,7 @@ static void __init armada_370_xp_timer_a
  30  {
  31         mvebu_clocks_init();
  32         armada_370_xp_timer_init();
  33 +       coherency_init();
  34  }
  35
  36  static void __init armada_370_xp_init_early(void)
  37 @@ -76,7 +77,6 @@ static void __init armada_370_xp_init_ea
  38  static void __init armada_370_xp_dt_init(void)
  39  {
  40         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  41 -       coherency_init();
  42  }
  43
  44  static const char * const armada_370_xp_dt_compat[] = {
  45 --- a/arch/arm/mach-mvebu/coherency.c
  46 +++ b/arch/arm/mach-mvebu/coherency.c
  47 @@ -27,14 +27,7 @@
  48  #include <asm/smp_plat.h>
  49  #include "armada-370-xp.h"
  50
  51 -/*
  52 - * Some functions in this file are called very early during SMP
  53 - * initialization. At that time the device tree framework is not yet
  54 - * ready, and it is not possible to get the register address to
  55 - * ioremap it. That's why the pointer below is given with an initial
  56 - * value matching its virtual mapping
  57 - */
  58 -static void __iomem *coherency_base = ARMADA_370_XP_REGS_VIRT_BASE + 0x20200;
  59 +static void __iomem *coherency_base;
  60  static void __iomem *coherency_cpu_base;
  61
  62  /* Coherency fabric registers */
  63 @@ -135,9 +128,16 @@ int __init coherency_init(void)
  64                 coherency_base = of_iomap(np, 0);
  65                 coherency_cpu_base = of_iomap(np, 1);
  66                 set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
  67 -               bus_register_notifier(&platform_bus_type,
  68 -                                       &mvebu_hwcc_platform_nb);
  69         }
  70
  71         return 0;
  72  }
  73 +
  74 +static int __init coherency_late_init(void)
  75 +{
  76 +       bus_register_notifier(&platform_bus_type,
  77 +                             &mvebu_hwcc_platform_nb);
  78 +       return 0;
  79 +}
  80 +
  81 +postcore_initcall(coherency_late_init);