target/linux/mvebu/patches-3.10/0196-ata-sata_mv-setting-PHY-speed-according-to-SControl-.patch

   1 From d587c866f34aa8e59ddc3628969113e725e36eab Mon Sep 17 00:00:00 2001
   2 From: Lior Amsalem <alior@marvell.com>
   3 Date: Mon, 23 Dec 2013 13:07:35 +0100
   4 Subject: [PATCH 196/203] ata: sata_mv: setting PHY speed according to SControl
   5  speed
   6
   7 This patch fixes a SATA hotplug issue on the Armada 370 and Armada XP
   8 SoCs. Without it, if a disk is unplugged from a SATA port, then further
   9 hotplug notification are now longer received on this port.
  10
  11 This should be applied to every -stable kernel supporting Armada SoCs.
  12
  13 Signed-off-by: Lior Amsalem <alior@marvell.com>
  14 Signed-off-by: Nadav Haklai <nadavh@marvell.com>
  15 Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
  16 Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  17 Cc: Jason Cooper <jason@lakedaemon.net>
  18 Cc: Andrew Lunn <andrew@lunn.ch>
  19 Cc: Gregory Clement <gregory.clement@free-electrons.com>
  20 Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
  21 Cc: stable@vger.kernel.org
  22 ---
  23  drivers/ata/sata_mv.c | 10 ++++++++++
  24  1 file changed, 10 insertions(+)
  25
  26 --- a/drivers/ata/sata_mv.c
  27 +++ b/drivers/ata/sata_mv.c
  28 @@ -304,6 +304,7 @@ enum {
  29         MV5_LTMODE              = 0x30,
  30         MV5_PHY_CTL             = 0x0C,
  31         SATA_IFCFG              = 0x050,
  32 +       LP_PHY_CTL              = 0x058,
  33
  34         MV_M2_PREAMP_MASK       = 0x7e0,
  35
  36 @@ -1353,6 +1354,7 @@ static int mv_scr_write(struct ata_link
  37
  38         if (ofs != 0xffffffffU) {
  39                 void __iomem *addr = mv_ap_base(link->ap) + ofs;
  40 +               void __iomem *lp_phy_addr = mv_ap_base(link->ap) + LP_PHY_CTL;
  41                 if (sc_reg_in == SCR_CONTROL) {
  42                         /*
  43                          * Workaround for 88SX60x1 FEr SATA#26:
  44 @@ -1369,6 +1371,14 @@ static int mv_scr_write(struct ata_link
  45                          */
  46                         if ((val & 0xf) == 1 || (readl(addr) & 0xf) == 1)
  47                                 val |= 0xf000;
  48 +
  49 +                       /*
  50 +                        * Setting PHY speed according to SControl speed
  51 +                        */
  52 +                       if ((val & 0xf0) == 0x10)
  53 +                               writelfl(0x7, lp_phy_addr);
  54 +                       else
  55 +                               writelfl(0x227, lp_phy_addr);
  56                 }
  57                 writelfl(val, addr);
  58                 return 0;