ralink: add support for the mt7530 eval board
[openwrt/svn-archive/archive.git] / target / linux / ramips / dts / rt3883.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "ralink,rt3883-soc";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips74Kc";
9 };
10 };
11
12 chosen {
13 bootargs = "console=ttyS0,57600";
14 };
15
16 aliases {
17 spi0 = &spi0;
18 };
19
20 cpuintc: cpuintc@0 {
21 #address-cells = <0>;
22 #interrupt-cells = <1>;
23 interrupt-controller;
24 compatible = "mti,cpu-interrupt-controller";
25 };
26
27 palmbus@10000000 {
28 compatible = "palmbus";
29 reg = <0x10000000 0x200000>;
30 ranges = <0x0 0x10000000 0x1FFFFF>;
31
32 #address-cells = <1>;
33 #size-cells = <1>;
34
35 sysc@0 {
36 compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";
37 reg = <0x0 0x100>;
38 };
39
40 timer@100 {
41 compatible = "ralink,rt3883-timer", "ralink,rt2880-timer";
42 reg = <0x100 0x20>;
43
44 interrupt-parent = <&intc>;
45 interrupts = <1>;
46 };
47
48 watchdog@120 {
49 compatible = "ralink,rt3883-wdt", "ralink,rt2880-wdt";
50 reg = <0x120 0x10>;
51
52 resets = <&rstctrl 8>;
53 reset-names = "wdt";
54
55 interrupt-parent = <&intc>;
56 interrupts = <1>;
57 };
58
59 intc: intc@200 {
60 compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
61 reg = <0x200 0x100>;
62
63 resets = <&rstctrl 19>;
64 reset-names = "intc";
65
66 interrupt-controller;
67 #interrupt-cells = <1>;
68
69 interrupt-parent = <&cpuintc>;
70 interrupts = <2>;
71 };
72
73 memc@300 {
74 compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
75 reg = <0x300 0x100>;
76
77 resets = <&rstctrl 20>;
78 reset-names = "mc";
79
80 interrupt-parent = <&intc>;
81 interrupts = <3>;
82 };
83
84 uart@500 {
85 compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
86 reg = <0x500 0x100>;
87
88 resets = <&rstctrl 12>;
89 reset-names = "uart";
90
91 interrupt-parent = <&intc>;
92 interrupts = <5>;
93
94 reg-shift = <2>;
95
96 status = "disabled";
97 };
98
99 gpio0: gpio@600 {
100 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
101 reg = <0x600 0x34>;
102
103 resets = <&rstctrl 13>;
104 reset-names = "pio";
105
106 interrupt-parent = <&intc>;
107 interrupts = <6>;
108
109 gpio-controller;
110 #gpio-cells = <2>;
111
112 ralink,gpio-base = <0>;
113 ralink,num-gpios = <24>;
114 ralink,register-map = [ 00 04 08 0c
115 20 24 28 2c
116 30 34 ];
117 };
118
119 gpio1: gpio@638 {
120 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
121 reg = <0x638 0x24>;
122
123 gpio-controller;
124 #gpio-cells = <2>;
125
126 ralink,gpio-base = <24>;
127 ralink,num-gpios = <16>;
128 ralink,register-map = [ 00 04 08 0c
129 10 14 18 1c
130 20 24 ];
131
132 status = "disabled";
133 };
134
135 gpio2: gpio@660 {
136 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
137 reg = <0x660 0x24>;
138
139 gpio-controller;
140 #gpio-cells = <2>;
141
142 ralink,gpio-base = <40>;
143 ralink,num-gpios = <32>;
144 ralink,register-map = [ 00 04 08 0c
145 10 14 18 1c
146 20 24 ];
147
148 status = "disabled";
149 };
150
151 gpio3: gpio@688 {
152 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
153 reg = <0x688 0x24>;
154
155 gpio-controller;
156 #gpio-cells = <2>;
157
158 ralink,gpio-base = <72>;
159 ralink,num-gpios = <24>;
160 ralink,register-map = [ 00 04 08 0c
161 10 14 18 1c
162 20 24 ];
163
164 status = "disabled";
165 };
166
167 spi0: spi@b00 {
168 compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
169 reg = <0xb00 0x100>;
170 #address-cells = <1>;
171 #size-cells = <0>;
172
173 resets = <&rstctrl 18>;
174 reset-names = "spi";
175
176 pinctrl-names = "default";
177 pinctrl-0 = <&spi_pins>;
178
179 status = "disabled";
180 };
181
182 uartlite@c00 {
183 compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
184 reg = <0xc00 0x100>;
185
186 resets = <&rstctrl 19>;
187 reset-names = "uartl";
188
189 interrupt-parent = <&intc>;
190 interrupts = <12>;
191
192 reg-shift = <2>;
193
194 pinctrl-names = "default";
195 pinctrl-0 = <&uartlite_pins>;
196 };
197 };
198
199 pinctrl {
200 compatible = "ralink,rt2880-pinmux";
201
202 pinctrl-names = "default";
203 pinctrl-0 = <&state_default>;
204 state_default: pinctrl0 {
205 };
206
207 spi_pins: spi {
208 spi {
209 ralink,group = "spi";
210 ralink,function = "spi";
211 };
212 };
213
214 uartlite_pins: uartlite {
215 uart {
216 ralink,group = "uartlite";
217 ralink,function = "uartlite";
218 };
219 };
220 };
221
222 ethernet@10100000 {
223 compatible = "ralink,rt3883-eth";
224 reg = <0x10100000 10000>;
225
226 interrupt-parent = <&cpuintc>;
227 interrupts = <5>;
228
229 port@0 {
230 compatible = "ralink,rt3883-port", "ralink,eth-port";
231 reg = <0>;
232 };
233
234 mdio-bus {
235 #address-cells = <1>;
236 #size-cells = <0>;
237
238 status = "disabled";
239 };
240 };
241
242 rstctrl: rstctrl {
243 compatible = "ralink,rt3883-reset", "ralink,rt2880-reset";
244 #reset-cells = <1>;
245 };
246
247 pci@10140000 {
248 compatible = "ralink,rt3883-pci";
249 reg = <0x10140000 0x20000>;
250 #address-cells = <1>;
251 #size-cells = <1>;
252 ranges; /* direct mapping */
253
254 status = "disabled";
255
256 pciintc: interrupt-controller {
257 interrupt-controller;
258 #address-cells = <0>;
259 #interrupt-cells = <1>;
260
261 interrupt-parent = <&cpuintc>;
262 interrupts = <4>;
263 };
264
265 host-bridge {
266 #address-cells = <3>;
267 #size-cells = <2>;
268 #interrupt-cells = <1>;
269
270 device_type = "pci";
271
272 bus-range = <0 255>;
273 ranges = <
274 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
275 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
276 >;
277
278 interrupt-map-mask = <0xf800 0 0 7>;
279 interrupt-map = <
280 /* IDSEL 17 */
281 0x8800 0 0 1 &pciintc 18
282 0x8800 0 0 2 &pciintc 18
283 0x8800 0 0 3 &pciintc 18
284 0x8800 0 0 4 &pciintc 18
285 /* IDSEL 18 */
286 0x9000 0 0 1 &pciintc 19
287 0x9000 0 0 2 &pciintc 19
288 0x9000 0 0 3 &pciintc 19
289 0x9000 0 0 4 &pciintc 19
290 >;
291
292 pci-bridge@1 {
293 reg = <0x0800 0 0 0 0>;
294 device_type = "pci";
295 #interrupt-cells = <1>;
296 #address-cells = <3>;
297 #size-cells = <2>;
298
299 status = "disabled";
300
301 ralink,pci-slot = <1>;
302
303 interrupt-map-mask = <0x0 0 0 0>;
304 interrupt-map = <0x0 0 0 0 &pciintc 20>;
305 };
306
307 pci-slot@17 {
308 reg = <0x8800 0 0 0 0>;
309 device_type = "pci";
310 #interrupt-cells = <1>;
311 #address-cells = <3>;
312 #size-cells = <2>;
313
314 ralink,pci-slot = <17>;
315
316 status = "disabled";
317 };
318
319 pci-slot@18 {
320 reg = <0x9000 0 0 0 0>;
321 device_type = "pci";
322 #interrupt-cells = <1>;
323 #address-cells = <3>;
324 #size-cells = <2>;
325
326 ralink,pci-slot = <18>;
327
328 status = "disabled";
329 };
330 };
331 };
332
333 ubsphy {
334 compatible = "ralink,rt3xxx-usbphy";
335
336 resets = <&rstctrl 22 &rstctrl 25>;
337 reset-names = "host", "device";
338 };
339
340 wmac@10180000 {
341 compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac";
342 reg = <0x10180000 40000>;
343
344 interrupt-parent = <&cpuintc>;
345 interrupts = <6>;
346
347 ralink,eeprom = "soc_wmac.eeprom";
348 };
349
350 ehci@101c0000 {
351 compatible = "ralink,rt3xxx-ehci", "ehci-platform";
352 reg = <0x101c0000 0x1000>;
353
354 interrupt-parent = <&intc>;
355 interrupts = <18>;
356
357 status = "disabled";
358 };
359
360 ohci@101c1000 {
361 compatible = "ralink,rt3xxx-ohci", "ohci-platform";
362 reg = <0x101c1000 0x1000>;
363
364 interrupt-parent = <&intc>;
365 interrupts = <18>;
366
367 status = "disabled";
368 };
369 };