ramips: implement clock API for RT288x
[openwrt/svn-archive/archive.git] / target / linux / ramips / files / arch / mips / ralink / rt288x / irq.c
1 /*
2 * Ralink RT288x SoC specific interrupt handling
3 *
4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/irq.h>
16
17 #include <asm/irq_cpu.h>
18 #include <asm/mipsregs.h>
19
20 #include <asm/mach-ralink/common.h>
21 #include <asm/mach-ralink/rt288x.h>
22 #include <asm/mach-ralink/rt288x_regs.h>
23
24 static void rt288x_intc_irq_dispatch(void)
25 {
26 u32 pending;
27
28 pending = ramips_intc_get_status();
29
30 if (pending & RT2880_INTC_INT_TIMER0)
31 do_IRQ(RT2880_INTC_IRQ_TIMER0);
32
33 else if (pending & RT2880_INTC_INT_TIMER1)
34 do_IRQ(RT2880_INTC_IRQ_TIMER1);
35
36 else if (pending & RT2880_INTC_INT_UART0)
37 do_IRQ(RT2880_INTC_IRQ_UART0);
38
39 else if (pending & RT2880_INTC_INT_PCM)
40 do_IRQ(RT2880_INTC_IRQ_PCM);
41
42 else if (pending & RT2880_INTC_INT_UART1)
43 do_IRQ(RT2880_INTC_IRQ_UART1);
44
45 /* TODO: handle PIO interrupts as well */
46
47 else
48 spurious_interrupt();
49 }
50
51 asmlinkage void plat_irq_dispatch(void)
52 {
53 unsigned long pending;
54
55 pending = read_c0_status() & read_c0_cause() & ST0_IM;
56
57 if (pending & STATUSF_IP7)
58 do_IRQ(RT288X_CPU_IRQ_COUNTER);
59
60 else if (pending & STATUSF_IP4)
61 do_IRQ(RT288X_CPU_IRQ_PCI);
62
63 else if (pending & STATUSF_IP5)
64 do_IRQ(RT288X_CPU_IRQ_FE);
65
66 else if (pending & STATUSF_IP6)
67 do_IRQ(RT288X_CPU_IRQ_WNIC);
68
69 else if (pending & STATUSF_IP2)
70 rt288x_intc_irq_dispatch();
71
72 else
73 spurious_interrupt();
74 }
75
76 void __init arch_init_irq(void)
77 {
78 mips_cpu_irq_init();
79 ramips_intc_irq_init(RT2880_INTC_BASE, RT288X_CPU_IRQ_INTC,
80 RT288X_INTC_IRQ_BASE);
81 }