target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c

   1 /*
   2  * Ralink RT305x SoC specific setup
   3  *
   4  * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
   5  * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  * Parts of this file are based on Ralink's 2.6.21 BSP
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License version 2 as published
  11  * by the Free Software Foundation.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/module.h>
  17
  18 #include <asm/mach-ralink/common.h>
  19 #include <asm/mach-ralink/rt305x.h>
  20 #include <asm/mach-ralink/rt305x_regs.h>
  21
  22 unsigned long rt305x_cpu_freq;
  23 EXPORT_SYMBOL_GPL(rt305x_cpu_freq);
  24
  25 unsigned long rt305x_sys_freq;
  26 EXPORT_SYMBOL_GPL(rt305x_sys_freq);
  27
  28 void __iomem * rt305x_sysc_base;
  29 void __iomem * rt305x_memc_base;
  30
  31 void __init rt305x_detect_sys_type(void)
  32 {
  33         u32 n0;
  34         u32 n1;
  35         u32 id;
  36
  37         n0 = rt305x_sysc_rr(SYSC_REG_CHIP_NAME0);
  38         n1 = rt305x_sysc_rr(SYSC_REG_CHIP_NAME1);
  39         id = rt305x_sysc_rr(SYSC_REG_CHIP_ID);
  40
  41         snprintf(ramips_sys_type, RAMIPS_SYS_TYPE_LEN,
  42                 "Ralink %c%c%c%c%c%c%c%c id:%u rev:%u",
  43                 (char) (n0 & 0xff), (char) ((n0 >> 8) & 0xff),
  44                 (char) ((n0 >> 16) & 0xff), (char) ((n0 >> 24) & 0xff),
  45                 (char) (n1 & 0xff), (char) ((n1 >> 8) & 0xff),
  46                 (char) ((n1 >> 16) & 0xff), (char) ((n1 >> 24) & 0xff),
  47                 (id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK,
  48                 (id & CHIP_ID_REV_MASK));
  49 }
  50
  51 void __init rt305x_detect_sys_freq(void)
  52 {
  53         u32     t;
  54
  55         t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
  56         t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK);
  57
  58         switch (t) {
  59         case SYSTEM_CONFIG_CPUCLK_320:
  60                 rt305x_cpu_freq = 320000000;
  61                 break;
  62         case SYSTEM_CONFIG_CPUCLK_384:
  63                 rt305x_cpu_freq = 384000000;
  64                 break;
  65         }
  66
  67         rt305x_sys_freq = rt305x_cpu_freq / 3;
  68 }