target/linux/ramips/files/drivers/net/ethernet/ralink/soc_rt305x.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; version 2 of the License
   5  *
   6  *   This program is distributed in the hope that it will be useful,
   7  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   8  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   9  *   GNU General Public License for more details.
  10  *
  11  *   You should have received a copy of the GNU General Public License
  12  *   along with this program; if not, write to the Free Software
  13  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  14  *
  15  *   Copyright (C) 2009-2013 John Crispin <blogic@openwrt.org>
  16  */
  17
  18 #include <linux/module.h>
  19
  20 #include <asm/mach-ralink/ralink_regs.h>
  21
  22 #include "ralink_soc_eth.h"
  23 #include "mdio_rt2880.h"
  24
  25 #define RT305X_RESET_FE         BIT(21)
  26 #define RT305X_RESET_ESW        BIT(23)
  27
  28 static const u32 rt5350_reg_table[FE_REG_COUNT] = {
  29         [FE_REG_PDMA_GLO_CFG] = RT5350_PDMA_GLO_CFG,
  30         [FE_REG_PDMA_RST_CFG] = RT5350_PDMA_RST_CFG,
  31         [FE_REG_DLY_INT_CFG] = RT5350_DLY_INT_CFG,
  32         [FE_REG_TX_BASE_PTR0] = RT5350_TX_BASE_PTR0,
  33         [FE_REG_TX_MAX_CNT0] = RT5350_TX_MAX_CNT0,
  34         [FE_REG_TX_CTX_IDX0] = RT5350_TX_CTX_IDX0,
  35         [FE_REG_TX_DTX_IDX0] = RT5350_TX_DTX_IDX0,
  36         [FE_REG_RX_BASE_PTR0] = RT5350_RX_BASE_PTR0,
  37         [FE_REG_RX_MAX_CNT0] = RT5350_RX_MAX_CNT0,
  38         [FE_REG_RX_CALC_IDX0] = RT5350_RX_CALC_IDX0,
  39         [FE_REG_RX_DRX_IDX0] = RT5350_RX_DRX_IDX0,
  40         [FE_REG_FE_INT_ENABLE] = RT5350_FE_INT_ENABLE,
  41         [FE_REG_FE_INT_STATUS] = RT5350_FE_INT_STATUS,
  42         [FE_REG_FE_RST_GL] = 0,
  43         [FE_REG_FE_DMA_VID_BASE] = 0,
  44 };
  45
  46 static void rt305x_init_data(struct fe_soc_data *data,
  47                 struct net_device *netdev)
  48 {
  49         struct fe_priv *priv = netdev_priv(netdev);
  50
  51         priv->flags = FE_FLAG_PADDING_64B | FE_FLAG_PADDING_BUG;
  52         netdev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM |
  53                 NETIF_F_RXCSUM | NETIF_F_HW_VLAN_CTAG_TX;
  54 }
  55
  56 static int rt3050_fwd_config(struct fe_priv *priv)
  57 {
  58         int ret;
  59
  60         if (ralink_soc != RT305X_SOC_RT3052) {
  61                 ret = fe_set_clock_cycle(priv);
  62                 if (ret)
  63                         return ret;
  64         }
  65
  66         fe_fwd_config(priv);
  67         if (ralink_soc != RT305X_SOC_RT3352)
  68                 fe_w32(FE_PSE_FQFC_CFG_INIT, FE_PSE_FQ_CFG);
  69         fe_csum_config(priv);
  70
  71         return 0;
  72 }
  73
  74 static void rt305x_fe_reset(void)
  75 {
  76         fe_reset(RT305X_RESET_FE);
  77 }
  78
  79 static void rt5350_init_data(struct fe_soc_data *data,
  80                 struct net_device *netdev)
  81 {
  82         netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM;
  83 }
  84
  85 static void rt5350_set_mac(struct fe_priv *priv, unsigned char *mac)
  86 {
  87         unsigned long flags;
  88
  89         spin_lock_irqsave(&priv->page_lock, flags);
  90         fe_w32((mac[0] << 8) | mac[1], RT5350_SDM_MAC_ADRH);
  91         fe_w32((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
  92                 RT5350_SDM_MAC_ADRL);
  93         spin_unlock_irqrestore(&priv->page_lock, flags);
  94 }
  95
  96 static void rt5350_rxcsum_config(bool enable)
  97 {
  98         if (enable)
  99                 fe_w32(fe_r32(RT5350_SDM_CFG) | (RT5350_SDM_ICS_EN |
 100                                 RT5350_SDM_TCS_EN | RT5350_SDM_UCS_EN),
 101                                 RT5350_SDM_CFG);
 102         else
 103                 fe_w32(fe_r32(RT5350_SDM_CFG) & ~(RT5350_SDM_ICS_EN |
 104                                 RT5350_SDM_TCS_EN | RT5350_SDM_UCS_EN),
 105                                 RT5350_SDM_CFG);
 106 }
 107
 108 static int rt5350_fwd_config(struct fe_priv *priv)
 109 {
 110         struct net_device *dev = priv_netdev(priv);
 111
 112         rt5350_rxcsum_config((dev->features & NETIF_F_RXCSUM));
 113
 114         return 0;
 115 }
 116
 117 static void rt5350_tx_dma(struct fe_tx_dma *txd)
 118 {
 119         txd->txd4 = 0;
 120 }
 121
 122 static void rt5350_fe_reset(void)
 123 {
 124         fe_reset(RT305X_RESET_FE | RT305X_RESET_ESW);
 125 }
 126
 127 static struct fe_soc_data rt3050_data = {
 128         .init_data = rt305x_init_data,
 129         .reset_fe = rt305x_fe_reset,
 130         .fwd_config = rt3050_fwd_config,
 131         .pdma_glo_cfg = FE_PDMA_SIZE_8DWORDS,
 132         .checksum_bit = RX_DMA_L4VALID,
 133         .rx_int = FE_RX_DONE_INT,
 134         .tx_int = FE_TX_DONE_INT,
 135         .status_int = FE_CNT_GDM_AF,
 136 };
 137
 138 static struct fe_soc_data rt5350_data = {
 139         .init_data = rt5350_init_data,
 140         .reg_table = rt5350_reg_table,
 141         .reset_fe = rt5350_fe_reset,
 142         .set_mac = rt5350_set_mac,
 143         .fwd_config = rt5350_fwd_config,
 144         .tx_dma = rt5350_tx_dma,
 145         .pdma_glo_cfg = FE_PDMA_SIZE_8DWORDS,
 146         .checksum_bit = RX_DMA_L4VALID,
 147         .rx_int = RT5350_RX_DONE_INT,
 148         .tx_int = RT5350_TX_DONE_INT,
 149 };
 150
 151 const struct of_device_id of_fe_match[] = {
 152         { .compatible = "ralink,rt3050-eth", .data = &rt3050_data },
 153         { .compatible = "ralink,rt5350-eth", .data = &rt5350_data },
 154         {},
 155 };
 156
 157 MODULE_DEVICE_TABLE(of, of_fe_match);