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[openwrt/svn-archive/archive.git] / target / linux / ramips / files / drivers / net / ethernet / ramips / ramips_main.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; version 2 of the License
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
14 *
15 * Copyright (C) 2009 John Crispin <blogic@openwrt.org>
16 */
17
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/types.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/init.h>
23 #include <linux/skbuff.h>
24 #include <linux/etherdevice.h>
25 #include <linux/ethtool.h>
26 #include <linux/platform_device.h>
27 #include <linux/phy.h>
28
29 #include <ramips_eth_platform.h>
30 #include "ramips_eth.h"
31
32 #define TX_TIMEOUT (20 * HZ / 100)
33 #define MAX_RX_LENGTH 1600
34
35 #ifdef CONFIG_RALINK_RT305X
36 #include <rt305x.h>
37 #include "ramips_esw.c"
38 #else
39 static inline int rt305x_esw_init(void) { return 0; }
40 static inline void rt305x_esw_exit(void) { }
41 static inline int soc_is_rt5350(void) { return 0; }
42 #endif
43
44 #define phys_to_bus(a) (a & 0x1FFFFFFF)
45
46 #ifdef CONFIG_RAMIPS_ETH_DEBUG
47 #define RADEBUG(fmt, args...) printk(KERN_DEBUG fmt, ## args)
48 #else
49 #define RADEBUG(fmt, args...) do {} while (0)
50 #endif
51
52 #define RX_DLY_INT ((soc_is_rt5350())?(RT5350_RX_DLY_INT):(RAMIPS_RX_DLY_INT))
53 #define TX_DLY_INT ((soc_is_rt5350())?(RT5350_TX_DLY_INT):(RAMIPS_TX_DLY_INT))
54
55 enum raeth_reg {
56 RAETH_REG_PDMA_GLO_CFG = 0,
57 RAETH_REG_PDMA_RST_CFG,
58 RAETH_REG_DLY_INT_CFG,
59 RAETH_REG_TX_BASE_PTR0,
60 RAETH_REG_TX_MAX_CNT0,
61 RAETH_REG_TX_CTX_IDX0,
62 RAETH_REG_RX_BASE_PTR0,
63 RAETH_REG_RX_MAX_CNT0,
64 RAETH_REG_RX_CALC_IDX0,
65 RAETH_REG_FE_INT_ENABLE,
66 RAETH_REG_FE_INT_STATUS,
67 RAETH_REG_COUNT
68 };
69
70 static const u32 ramips_reg_table[RAETH_REG_COUNT] = {
71 [RAETH_REG_PDMA_GLO_CFG] = RAMIPS_PDMA_GLO_CFG,
72 [RAETH_REG_PDMA_RST_CFG] = RAMIPS_PDMA_RST_CFG,
73 [RAETH_REG_DLY_INT_CFG] = RAMIPS_DLY_INT_CFG,
74 [RAETH_REG_TX_BASE_PTR0] = RAMIPS_TX_BASE_PTR0,
75 [RAETH_REG_TX_MAX_CNT0] = RAMIPS_TX_MAX_CNT0,
76 [RAETH_REG_TX_CTX_IDX0] = RAMIPS_TX_CTX_IDX0,
77 [RAETH_REG_RX_BASE_PTR0] = RAMIPS_RX_BASE_PTR0,
78 [RAETH_REG_RX_MAX_CNT0] = RAMIPS_RX_MAX_CNT0,
79 [RAETH_REG_RX_CALC_IDX0] = RAMIPS_RX_CALC_IDX0,
80 [RAETH_REG_FE_INT_ENABLE] = RAMIPS_FE_INT_ENABLE,
81 [RAETH_REG_FE_INT_STATUS] = RAMIPS_FE_INT_STATUS,
82 };
83
84 static const u32 rt5350_reg_table[RAETH_REG_COUNT] = {
85 [RAETH_REG_PDMA_GLO_CFG] = RT5350_PDMA_GLO_CFG,
86 [RAETH_REG_PDMA_RST_CFG] = RT5350_PDMA_RST_CFG,
87 [RAETH_REG_DLY_INT_CFG] = RT5350_DLY_INT_CFG,
88 [RAETH_REG_TX_BASE_PTR0] = RT5350_TX_BASE_PTR0,
89 [RAETH_REG_TX_MAX_CNT0] = RT5350_TX_MAX_CNT0,
90 [RAETH_REG_TX_CTX_IDX0] = RT5350_TX_CTX_IDX0,
91 [RAETH_REG_RX_BASE_PTR0] = RT5350_RX_BASE_PTR0,
92 [RAETH_REG_RX_MAX_CNT0] = RT5350_RX_MAX_CNT0,
93 [RAETH_REG_RX_CALC_IDX0] = RT5350_RX_CALC_IDX0,
94 [RAETH_REG_FE_INT_ENABLE] = RT5350_FE_INT_ENABLE,
95 [RAETH_REG_FE_INT_STATUS] = RT5350_FE_INT_STATUS,
96 };
97
98 static struct net_device * ramips_dev;
99 static void __iomem *ramips_fe_base = 0;
100
101 static inline u32 get_reg_offset(enum raeth_reg reg)
102 {
103 const u32 *table;
104
105 if (soc_is_rt5350())
106 table = rt5350_reg_table;
107 else
108 table = ramips_reg_table;
109
110 return table[reg];
111 }
112
113 static inline void
114 ramips_fe_wr(u32 val, unsigned reg)
115 {
116 __raw_writel(val, ramips_fe_base + reg);
117 }
118
119 static inline u32
120 ramips_fe_rr(unsigned reg)
121 {
122 return __raw_readl(ramips_fe_base + reg);
123 }
124
125 static inline void
126 ramips_fe_twr(u32 val, enum raeth_reg reg)
127 {
128 ramips_fe_wr(val, get_reg_offset(reg));
129 }
130
131 static inline u32
132 ramips_fe_trr(enum raeth_reg reg)
133 {
134 return ramips_fe_rr(get_reg_offset(reg));
135 }
136
137 static inline void
138 ramips_fe_int_disable(u32 mask)
139 {
140 ramips_fe_twr(ramips_fe_trr(RAETH_REG_FE_INT_ENABLE) & ~mask,
141 RAETH_REG_FE_INT_ENABLE);
142 /* flush write */
143 ramips_fe_trr(RAETH_REG_FE_INT_ENABLE);
144 }
145
146 static inline void
147 ramips_fe_int_enable(u32 mask)
148 {
149 ramips_fe_twr(ramips_fe_trr(RAETH_REG_FE_INT_ENABLE) | mask,
150 RAETH_REG_FE_INT_ENABLE);
151 /* flush write */
152 ramips_fe_trr(RAETH_REG_FE_INT_ENABLE);
153 }
154
155 static inline void
156 ramips_hw_set_macaddr(unsigned char *mac)
157 {
158 if (soc_is_rt5350()) {
159 ramips_fe_wr((mac[0] << 8) | mac[1], RT5350_SDM_MAC_ADRH);
160 ramips_fe_wr((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
161 RT5350_SDM_MAC_ADRL);
162 } else {
163 ramips_fe_wr((mac[0] << 8) | mac[1], RAMIPS_GDMA1_MAC_ADRH);
164 ramips_fe_wr((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
165 RAMIPS_GDMA1_MAC_ADRL);
166 }
167 }
168
169 static struct sk_buff *
170 ramips_alloc_skb(struct raeth_priv *re)
171 {
172 struct sk_buff *skb;
173
174 skb = netdev_alloc_skb(re->netdev, MAX_RX_LENGTH + NET_IP_ALIGN);
175 if (!skb)
176 return NULL;
177
178 skb_reserve(skb, NET_IP_ALIGN);
179
180 return skb;
181 }
182
183 static void
184 ramips_ring_setup(struct raeth_priv *re)
185 {
186 int len;
187 int i;
188
189 memset(re->tx_info, 0, NUM_TX_DESC * sizeof(struct raeth_tx_info));
190
191 len = NUM_TX_DESC * sizeof(struct ramips_tx_dma);
192 memset(re->tx, 0, len);
193
194 for (i = 0; i < NUM_TX_DESC; i++) {
195 struct raeth_tx_info *txi;
196 struct ramips_tx_dma *txd;
197
198 txd = &re->tx[i];
199 txd->txd4 = TX_DMA_QN(3) | TX_DMA_PN(1);
200 txd->txd2 = TX_DMA_LSO | TX_DMA_DONE;
201
202 txi = &re->tx_info[i];
203 txi->tx_desc = txd;
204 if (txi->tx_skb != NULL) {
205 netdev_warn(re->netdev,
206 "dirty skb for TX desc %d\n", i);
207 txi->tx_skb = NULL;
208 }
209 }
210
211 len = NUM_RX_DESC * sizeof(struct ramips_rx_dma);
212 memset(re->rx, 0, len);
213
214 for (i = 0; i < NUM_RX_DESC; i++) {
215 struct raeth_rx_info *rxi;
216 struct ramips_rx_dma *rxd;
217 dma_addr_t dma_addr;
218
219 rxd = &re->rx[i];
220 rxi = &re->rx_info[i];
221 BUG_ON(rxi->rx_skb == NULL);
222 dma_addr = dma_map_single(&re->netdev->dev, rxi->rx_skb->data,
223 MAX_RX_LENGTH, DMA_FROM_DEVICE);
224 rxi->rx_dma = dma_addr;
225 rxi->rx_desc = rxd;
226
227 rxd->rxd1 = (unsigned int) dma_addr;
228 rxd->rxd2 = RX_DMA_LSO;
229 }
230
231 /* flush descriptors */
232 wmb();
233 }
234
235 static void
236 ramips_ring_cleanup(struct raeth_priv *re)
237 {
238 int i;
239
240 for (i = 0; i < NUM_RX_DESC; i++) {
241 struct raeth_rx_info *rxi;
242
243 rxi = &re->rx_info[i];
244 if (rxi->rx_skb)
245 dma_unmap_single(&re->netdev->dev, rxi->rx_dma,
246 MAX_RX_LENGTH, DMA_FROM_DEVICE);
247 }
248
249 for (i = 0; i < NUM_TX_DESC; i++) {
250 struct raeth_tx_info *txi;
251
252 txi = &re->tx_info[i];
253 if (txi->tx_skb) {
254 dev_kfree_skb_any(txi->tx_skb);
255 txi->tx_skb = NULL;
256 }
257 }
258
259 netdev_reset_queue(re->netdev);
260 }
261
262 #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT3883)
263
264 #define RAMIPS_MDIO_RETRY 1000
265
266 static unsigned char *ramips_speed_str(struct raeth_priv *re)
267 {
268 switch (re->speed) {
269 case SPEED_1000:
270 return "1000";
271 case SPEED_100:
272 return "100";
273 case SPEED_10:
274 return "10";
275 }
276
277 return "?";
278 }
279
280 static void ramips_link_adjust(struct raeth_priv *re)
281 {
282 struct ramips_eth_platform_data *pdata;
283 u32 mdio_cfg;
284
285 pdata = re->parent->platform_data;
286 if (!re->link) {
287 netif_carrier_off(re->netdev);
288 netdev_info(re->netdev, "link down\n");
289 return;
290 }
291
292 mdio_cfg = RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
293 RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
294 RAMIPS_MDIO_CFG_GP1_FRC_EN;
295
296 if (re->duplex == DUPLEX_FULL)
297 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_DUPLEX;
298
299 if (re->tx_fc)
300 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_TX;
301
302 if (re->rx_fc)
303 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_RX;
304
305 switch (re->speed) {
306 case SPEED_10:
307 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_10;
308 break;
309 case SPEED_100:
310 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_100;
311 break;
312 case SPEED_1000:
313 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_1000;
314 break;
315 default:
316 BUG();
317 }
318
319 ramips_fe_wr(mdio_cfg, RAMIPS_MDIO_CFG);
320
321 netif_carrier_on(re->netdev);
322 netdev_info(re->netdev, "link up (%sMbps/%s duplex)\n",
323 ramips_speed_str(re),
324 (DUPLEX_FULL == re->duplex) ? "Full" : "Half");
325 }
326
327 static int
328 ramips_mdio_wait_ready(struct raeth_priv *re)
329 {
330 int retries;
331
332 retries = RAMIPS_MDIO_RETRY;
333 while (1) {
334 u32 t;
335
336 t = ramips_fe_rr(RAMIPS_MDIO_ACCESS);
337 if ((t & (0x1 << 31)) == 0)
338 return 0;
339
340 if (retries-- == 0)
341 break;
342
343 udelay(1);
344 }
345
346 dev_err(re->parent, "MDIO operation timed out\n");
347 return -ETIMEDOUT;
348 }
349
350 static int
351 ramips_mdio_read(struct mii_bus *bus, int phy_addr, int phy_reg)
352 {
353 struct raeth_priv *re = bus->priv;
354 int err;
355 u32 t;
356
357 err = ramips_mdio_wait_ready(re);
358 if (err)
359 return 0xffff;
360
361 t = (phy_addr << 24) | (phy_reg << 16);
362 ramips_fe_wr(t, RAMIPS_MDIO_ACCESS);
363 t |= (1 << 31);
364 ramips_fe_wr(t, RAMIPS_MDIO_ACCESS);
365
366 err = ramips_mdio_wait_ready(re);
367 if (err)
368 return 0xffff;
369
370 RADEBUG("%s: addr=%04x, reg=%04x, value=%04x\n", __func__,
371 phy_addr, phy_reg, ramips_fe_rr(RAMIPS_MDIO_ACCESS) & 0xffff);
372
373 return ramips_fe_rr(RAMIPS_MDIO_ACCESS) & 0xffff;
374 }
375
376 static int
377 ramips_mdio_write(struct mii_bus *bus, int phy_addr, int phy_reg, u16 val)
378 {
379 struct raeth_priv *re = bus->priv;
380 int err;
381 u32 t;
382
383 RADEBUG("%s: addr=%04x, reg=%04x, value=%04x\n", __func__,
384 phy_addr, phy_reg, ramips_fe_rr(RAMIPS_MDIO_ACCESS) & 0xffff);
385
386 err = ramips_mdio_wait_ready(re);
387 if (err)
388 return err;
389
390 t = (1 << 30) | (phy_addr << 24) | (phy_reg << 16) | val;
391 ramips_fe_wr(t, RAMIPS_MDIO_ACCESS);
392 t |= (1 << 31);
393 ramips_fe_wr(t, RAMIPS_MDIO_ACCESS);
394
395 return ramips_mdio_wait_ready(re);
396 }
397
398 static int
399 ramips_mdio_reset(struct mii_bus *bus)
400 {
401 /* TODO */
402 return 0;
403 }
404
405 static int
406 ramips_mdio_init(struct raeth_priv *re)
407 {
408 int err;
409 int i;
410
411 re->mii_bus = mdiobus_alloc();
412 if (re->mii_bus == NULL)
413 return -ENOMEM;
414
415 re->mii_bus->name = "ramips_mdio";
416 re->mii_bus->read = ramips_mdio_read;
417 re->mii_bus->write = ramips_mdio_write;
418 re->mii_bus->reset = ramips_mdio_reset;
419 re->mii_bus->irq = re->mii_irq;
420 re->mii_bus->priv = re;
421 re->mii_bus->parent = re->parent;
422
423 snprintf(re->mii_bus->id, MII_BUS_ID_SIZE, "%s", "ramips_mdio");
424 re->mii_bus->phy_mask = 0;
425
426 for (i = 0; i < PHY_MAX_ADDR; i++)
427 re->mii_irq[i] = PHY_POLL;
428
429 err = mdiobus_register(re->mii_bus);
430 if (err)
431 goto err_free_bus;
432
433 return 0;
434
435 err_free_bus:
436 kfree(re->mii_bus);
437 return err;
438 }
439
440 static void
441 ramips_mdio_cleanup(struct raeth_priv *re)
442 {
443 mdiobus_unregister(re->mii_bus);
444 kfree(re->mii_bus);
445 }
446
447 static void
448 ramips_phy_link_adjust(struct net_device *dev)
449 {
450 struct raeth_priv *re = netdev_priv(dev);
451 struct phy_device *phydev = re->phy_dev;
452 unsigned long flags;
453 int status_change = 0;
454
455 spin_lock_irqsave(&re->phy_lock, flags);
456
457 if (phydev->link)
458 if (re->duplex != phydev->duplex ||
459 re->speed != phydev->speed)
460 status_change = 1;
461
462 if (phydev->link != re->link)
463 status_change = 1;
464
465 re->link = phydev->link;
466 re->duplex = phydev->duplex;
467 re->speed = phydev->speed;
468
469 if (status_change)
470 ramips_link_adjust(re);
471
472 spin_unlock_irqrestore(&re->phy_lock, flags);
473 }
474
475 static int
476 ramips_phy_connect_multi(struct raeth_priv *re)
477 {
478 struct net_device *netdev = re->netdev;
479 struct ramips_eth_platform_data *pdata;
480 struct phy_device *phydev = NULL;
481 int phy_addr;
482 int ret = 0;
483
484 pdata = re->parent->platform_data;
485 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
486 if (!(pdata->phy_mask & (1 << phy_addr)))
487 continue;
488
489 if (re->mii_bus->phy_map[phy_addr] == NULL)
490 continue;
491
492 RADEBUG("%s: PHY found at %s, uid=%08x\n",
493 netdev->name,
494 dev_name(&re->mii_bus->phy_map[phy_addr]->dev),
495 re->mii_bus->phy_map[phy_addr]->phy_id);
496
497 if (phydev == NULL)
498 phydev = re->mii_bus->phy_map[phy_addr];
499 }
500
501 if (!phydev) {
502 netdev_err(netdev, "no PHY found with phy_mask=%08x\n",
503 pdata->phy_mask);
504 return -ENODEV;
505 }
506
507 re->phy_dev = phy_connect(netdev, dev_name(&phydev->dev),
508 ramips_phy_link_adjust, 0,
509 pdata->phy_if_mode);
510
511 if (IS_ERR(re->phy_dev)) {
512 netdev_err(netdev, "could not connect to PHY at %s\n",
513 dev_name(&phydev->dev));
514 return PTR_ERR(re->phy_dev);
515 }
516
517 phydev->supported &= PHY_GBIT_FEATURES;
518 phydev->advertising = phydev->supported;
519
520 RADEBUG("%s: connected to PHY at %s [uid=%08x, driver=%s]\n",
521 netdev->name, dev_name(&phydev->dev),
522 phydev->phy_id, phydev->drv->name);
523
524 re->link = 0;
525 re->speed = 0;
526 re->duplex = -1;
527 re->rx_fc = 0;
528 re->tx_fc = 0;
529
530 return ret;
531 }
532
533 static int
534 ramips_phy_connect_fixed(struct raeth_priv *re)
535 {
536 struct ramips_eth_platform_data *pdata;
537
538 pdata = re->parent->platform_data;
539 switch (pdata->speed) {
540 case SPEED_10:
541 case SPEED_100:
542 case SPEED_1000:
543 break;
544 default:
545 netdev_err(re->netdev, "invalid speed specified\n");
546 return -EINVAL;
547 }
548
549 RADEBUG("%s: using fixed link parameters\n", re->netdev->name);
550
551 re->speed = pdata->speed;
552 re->duplex = pdata->duplex;
553 re->tx_fc = pdata->tx_fc;
554 re->rx_fc = pdata->tx_fc;
555
556 return 0;
557 }
558
559 static int
560 ramips_phy_connect(struct raeth_priv *re)
561 {
562 struct ramips_eth_platform_data *pdata;
563
564 pdata = re->parent->platform_data;
565 if (pdata->phy_mask)
566 return ramips_phy_connect_multi(re);
567
568 return ramips_phy_connect_fixed(re);
569 }
570
571 static void
572 ramips_phy_disconnect(struct raeth_priv *re)
573 {
574 if (re->phy_dev)
575 phy_disconnect(re->phy_dev);
576 }
577
578 static void
579 ramips_phy_start(struct raeth_priv *re)
580 {
581 unsigned long flags;
582
583 if (re->phy_dev) {
584 phy_start(re->phy_dev);
585 } else {
586 spin_lock_irqsave(&re->phy_lock, flags);
587 re->link = 1;
588 ramips_link_adjust(re);
589 spin_unlock_irqrestore(&re->phy_lock, flags);
590 }
591 }
592
593 static void
594 ramips_phy_stop(struct raeth_priv *re)
595 {
596 unsigned long flags;
597
598 if (re->phy_dev)
599 phy_stop(re->phy_dev);
600
601 spin_lock_irqsave(&re->phy_lock, flags);
602 re->link = 0;
603 ramips_link_adjust(re);
604 spin_unlock_irqrestore(&re->phy_lock, flags);
605 }
606 #else
607 static inline int
608 ramips_mdio_init(struct raeth_priv *re)
609 {
610 return 0;
611 }
612
613 static inline void
614 ramips_mdio_cleanup(struct raeth_priv *re)
615 {
616 }
617
618 static inline int
619 ramips_phy_connect(struct raeth_priv *re)
620 {
621 return 0;
622 }
623
624 static inline void
625 ramips_phy_disconnect(struct raeth_priv *re)
626 {
627 }
628
629 static inline void
630 ramips_phy_start(struct raeth_priv *re)
631 {
632 }
633
634 static inline void
635 ramips_phy_stop(struct raeth_priv *re)
636 {
637 }
638 #endif /* CONFIG_RALINK_RT288X || CONFIG_RALINK_RT3883 */
639
640 static void
641 ramips_ring_free(struct raeth_priv *re)
642 {
643 int len;
644 int i;
645
646 if (re->rx_info) {
647 for (i = 0; i < NUM_RX_DESC; i++) {
648 struct raeth_rx_info *rxi;
649
650 rxi = &re->rx_info[i];
651 if (rxi->rx_skb)
652 dev_kfree_skb_any(rxi->rx_skb);
653 }
654 kfree(re->rx_info);
655 }
656
657 if (re->rx) {
658 len = NUM_RX_DESC * sizeof(struct ramips_rx_dma);
659 dma_free_coherent(&re->netdev->dev, len, re->rx,
660 re->rx_desc_dma);
661 }
662
663 if (re->tx) {
664 len = NUM_TX_DESC * sizeof(struct ramips_tx_dma);
665 dma_free_coherent(&re->netdev->dev, len, re->tx,
666 re->tx_desc_dma);
667 }
668
669 kfree(re->tx_info);
670 }
671
672 static int
673 ramips_ring_alloc(struct raeth_priv *re)
674 {
675 int len;
676 int err = -ENOMEM;
677 int i;
678
679 re->tx_info = kzalloc(NUM_TX_DESC * sizeof(struct raeth_tx_info),
680 GFP_ATOMIC);
681 if (!re->tx_info)
682 goto err_cleanup;
683
684 re->rx_info = kzalloc(NUM_RX_DESC * sizeof(struct raeth_rx_info),
685 GFP_ATOMIC);
686 if (!re->rx_info)
687 goto err_cleanup;
688
689 /* allocate tx ring */
690 len = NUM_TX_DESC * sizeof(struct ramips_tx_dma);
691 re->tx = dma_alloc_coherent(&re->netdev->dev, len,
692 &re->tx_desc_dma, GFP_ATOMIC);
693 if (!re->tx)
694 goto err_cleanup;
695
696 /* allocate rx ring */
697 len = NUM_RX_DESC * sizeof(struct ramips_rx_dma);
698 re->rx = dma_alloc_coherent(&re->netdev->dev, len,
699 &re->rx_desc_dma, GFP_ATOMIC);
700 if (!re->rx)
701 goto err_cleanup;
702
703 for (i = 0; i < NUM_RX_DESC; i++) {
704 struct sk_buff *skb;
705
706 skb = ramips_alloc_skb(re);
707 if (!skb)
708 goto err_cleanup;
709
710 re->rx_info[i].rx_skb = skb;
711 }
712
713 return 0;
714
715 err_cleanup:
716 ramips_ring_free(re);
717 return err;
718 }
719
720 static void
721 ramips_setup_dma(struct raeth_priv *re)
722 {
723 ramips_fe_twr(re->tx_desc_dma, RAETH_REG_TX_BASE_PTR0);
724 ramips_fe_twr(NUM_TX_DESC, RAETH_REG_TX_MAX_CNT0);
725 ramips_fe_twr(0, RAETH_REG_TX_CTX_IDX0);
726 ramips_fe_twr(RAMIPS_PST_DTX_IDX0, RAETH_REG_PDMA_RST_CFG);
727
728 ramips_fe_twr(re->rx_desc_dma, RAETH_REG_RX_BASE_PTR0);
729 ramips_fe_twr(NUM_RX_DESC, RAETH_REG_RX_MAX_CNT0);
730 ramips_fe_twr((NUM_RX_DESC - 1), RAETH_REG_RX_CALC_IDX0);
731 ramips_fe_twr(RAMIPS_PST_DRX_IDX0, RAETH_REG_PDMA_RST_CFG);
732 }
733
734 static int
735 ramips_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
736 {
737 struct raeth_priv *re = netdev_priv(dev);
738 struct raeth_tx_info *txi, *txi_next;
739 struct ramips_tx_dma *txd, *txd_next;
740 unsigned long tx;
741 unsigned int tx_next;
742 dma_addr_t mapped_addr;
743
744 if (re->plat->min_pkt_len) {
745 if (skb->len < re->plat->min_pkt_len) {
746 if (skb_padto(skb, re->plat->min_pkt_len)) {
747 printk(KERN_ERR
748 "ramips_eth: skb_padto failed\n");
749 kfree_skb(skb);
750 return 0;
751 }
752 skb_put(skb, re->plat->min_pkt_len - skb->len);
753 }
754 }
755
756 dev->trans_start = jiffies;
757 mapped_addr = dma_map_single(&re->netdev->dev, skb->data, skb->len,
758 DMA_TO_DEVICE);
759
760 spin_lock(&re->page_lock);
761 tx = ramips_fe_trr(RAETH_REG_TX_CTX_IDX0);
762 tx_next = (tx + 1) % NUM_TX_DESC;
763
764 txi = &re->tx_info[tx];
765 txd = txi->tx_desc;
766 txi_next = &re->tx_info[tx_next];
767 txd_next = txi_next->tx_desc;
768
769 if ((txi->tx_skb) || (txi_next->tx_skb) ||
770 !(txd->txd2 & TX_DMA_DONE) ||
771 !(txd_next->txd2 & TX_DMA_DONE))
772 goto out;
773
774 txi->tx_skb = skb;
775
776 txd->txd1 = (unsigned int) mapped_addr;
777 wmb();
778 txd->txd2 = TX_DMA_LSO | TX_DMA_PLEN0(skb->len);
779 dev->stats.tx_packets++;
780 dev->stats.tx_bytes += skb->len;
781 ramips_fe_twr(tx_next, RAETH_REG_TX_CTX_IDX0);
782 netdev_sent_queue(dev, skb->len);
783 spin_unlock(&re->page_lock);
784 return NETDEV_TX_OK;
785
786 out:
787 spin_unlock(&re->page_lock);
788 dev->stats.tx_dropped++;
789 kfree_skb(skb);
790 return NETDEV_TX_OK;
791 }
792
793 static void
794 ramips_eth_rx_hw(unsigned long ptr)
795 {
796 struct net_device *dev = (struct net_device *) ptr;
797 struct raeth_priv *re = netdev_priv(dev);
798 int rx;
799 int max_rx = 16;
800
801 rx = ramips_fe_trr(RAETH_REG_RX_CALC_IDX0);
802
803 while (max_rx) {
804 struct raeth_rx_info *rxi;
805 struct ramips_rx_dma *rxd;
806 struct sk_buff *rx_skb, *new_skb;
807 int pktlen;
808
809 rx = (rx + 1) % NUM_RX_DESC;
810
811 rxi = &re->rx_info[rx];
812 rxd = rxi->rx_desc;
813 if (!(rxd->rxd2 & RX_DMA_DONE))
814 break;
815
816 rx_skb = rxi->rx_skb;
817 pktlen = RX_DMA_PLEN0(rxd->rxd2);
818
819 new_skb = ramips_alloc_skb(re);
820 /* Reuse the buffer on allocation failures */
821 if (new_skb) {
822 dma_addr_t dma_addr;
823
824 dma_unmap_single(&re->netdev->dev, rxi->rx_dma,
825 MAX_RX_LENGTH, DMA_FROM_DEVICE);
826
827 skb_put(rx_skb, pktlen);
828 rx_skb->dev = dev;
829 rx_skb->protocol = eth_type_trans(rx_skb, dev);
830 rx_skb->ip_summed = CHECKSUM_NONE;
831 dev->stats.rx_packets++;
832 dev->stats.rx_bytes += pktlen;
833 netif_rx(rx_skb);
834
835 rxi->rx_skb = new_skb;
836
837 dma_addr = dma_map_single(&re->netdev->dev,
838 new_skb->data,
839 MAX_RX_LENGTH,
840 DMA_FROM_DEVICE);
841 rxi->rx_dma = dma_addr;
842 rxd->rxd1 = (unsigned int) dma_addr;
843 wmb();
844 } else {
845 dev->stats.rx_dropped++;
846 }
847
848 rxd->rxd2 = RX_DMA_LSO;
849 ramips_fe_twr(rx, RAETH_REG_RX_CALC_IDX0);
850 max_rx--;
851 }
852
853 if (max_rx == 0)
854 tasklet_schedule(&re->rx_tasklet);
855 else
856 ramips_fe_int_enable(RX_DLY_INT);
857 }
858
859 static void
860 ramips_eth_tx_housekeeping(unsigned long ptr)
861 {
862 struct net_device *dev = (struct net_device*)ptr;
863 struct raeth_priv *re = netdev_priv(dev);
864 unsigned int bytes_compl = 0, pkts_compl = 0;
865
866 spin_lock(&re->page_lock);
867 while (1) {
868 struct raeth_tx_info *txi;
869 struct ramips_tx_dma *txd;
870
871 txi = &re->tx_info[re->skb_free_idx];
872 txd = txi->tx_desc;
873
874 if (!(txd->txd2 & TX_DMA_DONE) || !(txi->tx_skb))
875 break;
876
877 pkts_compl++;
878 bytes_compl += txi->tx_skb->len;
879
880 dev_kfree_skb_irq(txi->tx_skb);
881 txi->tx_skb = NULL;
882 re->skb_free_idx++;
883 if (re->skb_free_idx >= NUM_TX_DESC)
884 re->skb_free_idx = 0;
885 }
886 netdev_completed_queue(dev, pkts_compl, bytes_compl);
887 spin_unlock(&re->page_lock);
888
889 ramips_fe_int_enable(TX_DLY_INT);
890 }
891
892 static void
893 ramips_eth_timeout(struct net_device *dev)
894 {
895 struct raeth_priv *re = netdev_priv(dev);
896
897 tasklet_schedule(&re->tx_housekeeping_tasklet);
898 }
899
900 static irqreturn_t
901 ramips_eth_irq(int irq, void *dev)
902 {
903 struct raeth_priv *re = netdev_priv(dev);
904 unsigned int status;
905
906 status = ramips_fe_trr(RAETH_REG_FE_INT_STATUS);
907 status &= ramips_fe_trr(RAETH_REG_FE_INT_ENABLE);
908
909 if (!status)
910 return IRQ_NONE;
911
912 ramips_fe_twr(status, RAETH_REG_FE_INT_STATUS);
913
914 if (status & RX_DLY_INT) {
915 ramips_fe_int_disable(RX_DLY_INT);
916 tasklet_schedule(&re->rx_tasklet);
917 }
918
919 if (status & TX_DLY_INT) {
920 ramips_fe_int_disable(TX_DLY_INT);
921 tasklet_schedule(&re->tx_housekeeping_tasklet);
922 }
923
924 raeth_debugfs_update_int_stats(re, status);
925
926 return IRQ_HANDLED;
927 }
928
929 static int
930 ramips_eth_open(struct net_device *dev)
931 {
932 struct raeth_priv *re = netdev_priv(dev);
933 int err;
934
935 err = request_irq(dev->irq, ramips_eth_irq, IRQF_DISABLED,
936 dev->name, dev);
937 if (err)
938 return err;
939
940 err = ramips_ring_alloc(re);
941 if (err)
942 goto err_free_irq;
943
944 ramips_ring_setup(re);
945 ramips_hw_set_macaddr(dev->dev_addr);
946
947 ramips_setup_dma(re);
948 ramips_fe_twr((ramips_fe_trr(RAETH_REG_PDMA_GLO_CFG) & 0xff) |
949 (RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN |
950 RAMIPS_TX_DMA_EN | RAMIPS_PDMA_SIZE_4DWORDS),
951 RAETH_REG_PDMA_GLO_CFG);
952 ramips_fe_wr((ramips_fe_rr(RAMIPS_FE_GLO_CFG) &
953 ~(RAMIPS_US_CYC_CNT_MASK << RAMIPS_US_CYC_CNT_SHIFT)) |
954 ((re->plat->sys_freq / RAMIPS_US_CYC_CNT_DIVISOR) << RAMIPS_US_CYC_CNT_SHIFT),
955 RAMIPS_FE_GLO_CFG);
956
957 tasklet_init(&re->tx_housekeeping_tasklet, ramips_eth_tx_housekeeping,
958 (unsigned long)dev);
959 tasklet_init(&re->rx_tasklet, ramips_eth_rx_hw, (unsigned long)dev);
960
961 ramips_phy_start(re);
962
963 ramips_fe_twr(RAMIPS_DELAY_INIT, RAETH_REG_DLY_INT_CFG);
964 ramips_fe_twr(TX_DLY_INT | RX_DLY_INT, RAETH_REG_FE_INT_ENABLE);
965 if (soc_is_rt5350()) {
966 ramips_fe_wr(ramips_fe_rr(RT5350_SDM_CFG) &
967 ~(RT5350_SDM_ICS_EN | RT5350_SDM_TCS_EN | RT5350_SDM_UCS_EN | 0xffff),
968 RT5350_SDM_CFG);
969 } else {
970 ramips_fe_wr(ramips_fe_rr(RAMIPS_GDMA1_FWD_CFG) &
971 ~(RAMIPS_GDM1_ICS_EN | RAMIPS_GDM1_TCS_EN | RAMIPS_GDM1_UCS_EN | 0xffff),
972 RAMIPS_GDMA1_FWD_CFG);
973 ramips_fe_wr(ramips_fe_rr(RAMIPS_CDMA_CSG_CFG) &
974 ~(RAMIPS_ICS_GEN_EN | RAMIPS_TCS_GEN_EN | RAMIPS_UCS_GEN_EN),
975 RAMIPS_CDMA_CSG_CFG);
976 ramips_fe_wr(RAMIPS_PSE_FQFC_CFG_INIT, RAMIPS_PSE_FQ_CFG);
977 }
978 ramips_fe_wr(1, RAMIPS_FE_RST_GL);
979 ramips_fe_wr(0, RAMIPS_FE_RST_GL);
980
981 netif_start_queue(dev);
982 return 0;
983
984 err_free_irq:
985 free_irq(dev->irq, dev);
986 return err;
987 }
988
989 static int
990 ramips_eth_stop(struct net_device *dev)
991 {
992 struct raeth_priv *re = netdev_priv(dev);
993
994 ramips_fe_twr(ramips_fe_trr(RAETH_REG_PDMA_GLO_CFG) &
995 ~(RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN | RAMIPS_TX_DMA_EN),
996 RAETH_REG_PDMA_GLO_CFG);
997
998 /* disable all interrupts in the hw */
999 ramips_fe_twr(0, RAETH_REG_FE_INT_ENABLE);
1000
1001 ramips_phy_stop(re);
1002 free_irq(dev->irq, dev);
1003 netif_stop_queue(dev);
1004 tasklet_kill(&re->tx_housekeeping_tasklet);
1005 tasklet_kill(&re->rx_tasklet);
1006 ramips_ring_cleanup(re);
1007 ramips_ring_free(re);
1008 RADEBUG("ramips_eth: stopped\n");
1009 return 0;
1010 }
1011
1012 static int __init
1013 ramips_eth_probe(struct net_device *dev)
1014 {
1015 struct raeth_priv *re = netdev_priv(dev);
1016 int err;
1017
1018 BUG_ON(!re->plat->reset_fe);
1019 re->plat->reset_fe();
1020 net_srandom(jiffies);
1021 memcpy(dev->dev_addr, re->plat->mac, ETH_ALEN);
1022
1023 ether_setup(dev);
1024 dev->mtu = 1500;
1025 dev->watchdog_timeo = TX_TIMEOUT;
1026 spin_lock_init(&re->page_lock);
1027 spin_lock_init(&re->phy_lock);
1028
1029 err = ramips_mdio_init(re);
1030 if (err)
1031 return err;
1032
1033 err = ramips_phy_connect(re);
1034 if (err)
1035 goto err_mdio_cleanup;
1036
1037 err = raeth_debugfs_init(re);
1038 if (err)
1039 goto err_phy_disconnect;
1040
1041 return 0;
1042
1043 err_phy_disconnect:
1044 ramips_phy_disconnect(re);
1045 err_mdio_cleanup:
1046 ramips_mdio_cleanup(re);
1047 return err;
1048 }
1049
1050 static void
1051 ramips_eth_uninit(struct net_device *dev)
1052 {
1053 struct raeth_priv *re = netdev_priv(dev);
1054
1055 raeth_debugfs_exit(re);
1056 ramips_phy_disconnect(re);
1057 ramips_mdio_cleanup(re);
1058 }
1059
1060 static const struct net_device_ops ramips_eth_netdev_ops = {
1061 .ndo_init = ramips_eth_probe,
1062 .ndo_uninit = ramips_eth_uninit,
1063 .ndo_open = ramips_eth_open,
1064 .ndo_stop = ramips_eth_stop,
1065 .ndo_start_xmit = ramips_eth_hard_start_xmit,
1066 .ndo_tx_timeout = ramips_eth_timeout,
1067 .ndo_change_mtu = eth_change_mtu,
1068 .ndo_set_mac_address = eth_mac_addr,
1069 .ndo_validate_addr = eth_validate_addr,
1070 };
1071
1072 static int
1073 ramips_eth_plat_probe(struct platform_device *plat)
1074 {
1075 struct raeth_priv *re;
1076 struct ramips_eth_platform_data *data = plat->dev.platform_data;
1077 struct resource *res;
1078 int err;
1079
1080 if (!data) {
1081 dev_err(&plat->dev, "no platform data specified\n");
1082 return -EINVAL;
1083 }
1084
1085 res = platform_get_resource(plat, IORESOURCE_MEM, 0);
1086 if (!res) {
1087 dev_err(&plat->dev, "no memory resource found\n");
1088 return -ENXIO;
1089 }
1090
1091 ramips_fe_base = ioremap_nocache(res->start, res->end - res->start + 1);
1092 if (!ramips_fe_base)
1093 return -ENOMEM;
1094
1095 ramips_dev = alloc_etherdev(sizeof(struct raeth_priv));
1096 if (!ramips_dev) {
1097 dev_err(&plat->dev, "alloc_etherdev failed\n");
1098 err = -ENOMEM;
1099 goto err_unmap;
1100 }
1101
1102 strcpy(ramips_dev->name, "eth%d");
1103 ramips_dev->irq = platform_get_irq(plat, 0);
1104 if (ramips_dev->irq < 0) {
1105 dev_err(&plat->dev, "no IRQ resource found\n");
1106 err = -ENXIO;
1107 goto err_free_dev;
1108 }
1109 ramips_dev->addr_len = ETH_ALEN;
1110 ramips_dev->base_addr = (unsigned long)ramips_fe_base;
1111 ramips_dev->netdev_ops = &ramips_eth_netdev_ops;
1112
1113 re = netdev_priv(ramips_dev);
1114
1115 re->netdev = ramips_dev;
1116 re->parent = &plat->dev;
1117 re->speed = data->speed;
1118 re->duplex = data->duplex;
1119 re->rx_fc = data->rx_fc;
1120 re->tx_fc = data->tx_fc;
1121 re->plat = data;
1122
1123 err = register_netdev(ramips_dev);
1124 if (err) {
1125 dev_err(&plat->dev, "error bringing up device\n");
1126 goto err_free_dev;
1127 }
1128
1129 RADEBUG("ramips_eth: loaded\n");
1130 return 0;
1131
1132 err_free_dev:
1133 kfree(ramips_dev);
1134 err_unmap:
1135 iounmap(ramips_fe_base);
1136 return err;
1137 }
1138
1139 static int
1140 ramips_eth_plat_remove(struct platform_device *plat)
1141 {
1142 unregister_netdev(ramips_dev);
1143 free_netdev(ramips_dev);
1144 RADEBUG("ramips_eth: unloaded\n");
1145 return 0;
1146 }
1147
1148 static struct platform_driver ramips_eth_driver = {
1149 .probe = ramips_eth_plat_probe,
1150 .remove = ramips_eth_plat_remove,
1151 .driver = {
1152 .name = "ramips_eth",
1153 .owner = THIS_MODULE,
1154 },
1155 };
1156
1157 static int __init
1158 ramips_eth_init(void)
1159 {
1160 int ret;
1161
1162 ret = raeth_debugfs_root_init();
1163 if (ret)
1164 goto err_out;
1165
1166 ret = rt305x_esw_init();
1167 if (ret)
1168 goto err_debugfs_exit;
1169
1170 ret = platform_driver_register(&ramips_eth_driver);
1171 if (ret) {
1172 printk(KERN_ERR
1173 "ramips_eth: Error registering platfom driver!\n");
1174 goto esw_cleanup;
1175 }
1176
1177 return 0;
1178
1179 esw_cleanup:
1180 rt305x_esw_exit();
1181 err_debugfs_exit:
1182 raeth_debugfs_root_exit();
1183 err_out:
1184 return ret;
1185 }
1186
1187 static void __exit
1188 ramips_eth_cleanup(void)
1189 {
1190 platform_driver_unregister(&ramips_eth_driver);
1191 rt305x_esw_exit();
1192 raeth_debugfs_root_exit();
1193 }
1194
1195 module_init(ramips_eth_init);
1196 module_exit(ramips_eth_cleanup);
1197
1198 MODULE_LICENSE("GPL");
1199 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
1200 MODULE_DESCRIPTION("ethernet driver for ramips boards");
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