ramips: fix subtarget kernel version assignment (only mt7621 is ready for now)
[openwrt/svn-archive/archive.git] / target / linux / ramips / patches-4.3 / 0010-arch-mips-ralink-add-spi1-clocks.patch
1 From 39ce22c870f4503bed5e451acfcab21eba3b6239 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Sun, 27 Jul 2014 09:49:07 +0100
4 Subject: [PATCH 10/53] arch: mips: ralink: add spi1 clocks
5
6 based on f3bc64d6d1f21c1b92d75f233a37b75d77af6963
7
8 Signed-off-by: John Crispin <blogic@openwrt.org>
9 ---
10 arch/mips/ralink/mt7620.c | 1 +
11 arch/mips/ralink/rt305x.c | 1 +
12 arch/mips/ralink/rt3883.c | 1 +
13 3 files changed, 3 insertions(+)
14
15 --- a/arch/mips/ralink/mt7620.c
16 +++ b/arch/mips/ralink/mt7620.c
17 @@ -427,6 +427,7 @@ void __init ralink_clk_init(void)
18 ralink_clk_add("10000100.timer", periph_rate);
19 ralink_clk_add("10000120.watchdog", periph_rate);
20 ralink_clk_add("10000b00.spi", sys_rate);
21 + ralink_clk_add("10000b40.spi", sys_rate);
22 ralink_clk_add("10000c00.uartlite", periph_rate);
23 ralink_clk_add("10180000.wmac", xtal_rate);
24
25 --- a/arch/mips/ralink/rt305x.c
26 +++ b/arch/mips/ralink/rt305x.c
27 @@ -202,6 +202,7 @@ void __init ralink_clk_init(void)
28
29 ralink_clk_add("cpu", cpu_rate);
30 ralink_clk_add("10000b00.spi", sys_rate);
31 + ralink_clk_add("10000b40.spi", sys_rate);
32 ralink_clk_add("10000100.timer", wdt_rate);
33 ralink_clk_add("10000120.watchdog", wdt_rate);
34 ralink_clk_add("10000500.uart", uart_rate);
35 --- a/arch/mips/ralink/rt3883.c
36 +++ b/arch/mips/ralink/rt3883.c
37 @@ -109,6 +109,7 @@ void __init ralink_clk_init(void)
38 ralink_clk_add("10000120.watchdog", sys_rate);
39 ralink_clk_add("10000500.uart", 40000000);
40 ralink_clk_add("10000b00.spi", sys_rate);
41 + ralink_clk_add("10000b40.spi", sys_rate);
42 ralink_clk_add("10000c00.uartlite", 40000000);
43 ralink_clk_add("10100000.ethernet", sys_rate);
44 ralink_clk_add("10180000.wmac", 40000000);