target/linux/ramips/patches-4.4/0500-Documentation-DT-net-add-docs-for-ralink-mediatek-So.patch

   1 From 9c2487f148ee38807d86beaf12dc2b818a764a99 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Tue, 17 Nov 2015 00:20:07 +0100
   4 Subject: [PATCH 500/513] Documentation: DT: net: add docs for ralink/mediatek
   5  SoC ethernet binding
   6
   7 Add three files. ralink,rt2880-net.txt  descibes the actual frame engine
   8 and the other two describe the switch forntend bindings.
   9
  10 Signed-off-by: John Crispin <blogic@openwrt.org>
  11 Signed-off-by: Felix Fietkau <nbd@openwrt.org>
  12 Signed-off-by: Michael Lee <igvtee@gmail.com>
  13 Cc: devicetree@vger.kernel.org
  14 ---
  15  .../bindings/net/mediatek,mt7620-gsw.txt           |   26 +++++++++
  16  .../devicetree/bindings/net/ralink,rt2880-net.txt  |   61 ++++++++++++++++++++
  17  .../devicetree/bindings/net/ralink,rt3050-esw.txt  |   32 ++++++++++
  18  3 files changed, 119 insertions(+)
  19  create mode 100644 Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt
  20  create mode 100644 Documentation/devicetree/bindings/net/ralink,rt2880-net.txt
  21  create mode 100644 Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt
  22
  23 --- /dev/null
  24 +++ b/Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt
  25 @@ -0,0 +1,26 @@
  26 +Mediatek Gigabit Switch
  27 +=======================
  28 +
  29 +The mediatek gigabit switch can be found on Mediatek SoCs (mt7620, mt7621).
  30 +
  31 +Required properties:
  32 +- compatible: Should be "mediatek,mt7620-gsw"
  33 +- reg: Address and length of the register set for the device
  34 +- interrupt-parent: Should be the phandle for the interrupt controller
  35 +  that services interrupts for this device
  36 +- interrupts: Should contain the gigabit switches interrupt
  37 +- resets: Should contain the gigabit switches resets
  38 +- reset-names: Should contain the reset names "gsw"
  39 +
  40 +Example:
  41 +
  42 +gsw@10110000 {
  43 +       compatible = "ralink,mt7620-gsw";
  44 +       reg = <0x10110000 8000>;
  45 +
  46 +       resets = <&rstctrl 23>;
  47 +       reset-names = "gsw";
  48 +
  49 +       interrupt-parent = <&intc>;
  50 +       interrupts = <17>;
  51 +};
  52 --- /dev/null
  53 +++ b/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt
  54 @@ -0,0 +1,61 @@
  55 +Ralink Frame Engine Ethernet controller
  56 +=======================================
  57 +
  58 +The Ralink frame engine ethernet controller can be found on Ralink and
  59 +Mediatek SoCs (RT288x, RT3x5x, RT366x, RT388x, rt5350, mt7620, mt7621, mt76x8).
  60 +
  61 +Depending on the SoC, there is a number of ports connected to the CPU port
  62 +directly and/or via a (gigabit-)switch.
  63 +
  64 +* Ethernet controller node
  65 +
  66 +Required properties:
  67 +- compatible: Should be one of "ralink,rt2880-eth", "ralink,rt3050-eth",
  68 +  "ralink,rt3050-eth", "ralink,rt3883-eth", "ralink,rt5350-eth",
  69 +  "mediatek,mt7620-eth", "mediatek,mt7621-eth"
  70 +- reg: Address and length of the register set for the device
  71 +- interrupt-parent: Should be the phandle for the interrupt controller
  72 +  that services interrupts for this device
  73 +- interrupts: Should contain the frame engines interrupt
  74 +- resets: Should contain the frame engines resets
  75 +- reset-names: Should contain the reset names "fe". If a switch is present
  76 +  "esw" is also required.
  77 +
  78 +
  79 +* Ethernet port node
  80 +
  81 +Required properties:
  82 +- compatible: Should be "ralink,eth-port"
  83 +- reg: The number of the physical port
  84 +- phy-handle: reference to the node describing the phy
  85 +
  86 +Example:
  87 +
  88 +mdio-bus {
  89 +       ...
  90 +       phy0: ethernet-phy@0 {
  91 +               phy-mode = "mii";
  92 +               reg = <0>;
  93 +       };
  94 +};
  95 +
  96 +ethernet@400000 {
  97 +       compatible = "ralink,rt2880-eth";
  98 +       reg = <0x00400000 10000>;
  99 +
 100 +       #address-cells = <1>;
 101 +       #size-cells = <0>;
 102 +
 103 +       resets = <&rstctrl 18>;
 104 +       reset-names = "fe";
 105 +
 106 +       interrupt-parent = <&cpuintc>;
 107 +       interrupts = <5>;
 108 +
 109 +       port@0 {
 110 +               compatible = "ralink,eth-port";
 111 +               reg = <0>;
 112 +               phy-handle = <&phy0>;
 113 +       };
 114 +
 115 +};
 116 --- /dev/null
 117 +++ b/Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt
 118 @@ -0,0 +1,32 @@
 119 +Ralink Fast Ethernet Embedded Switch
 120 +====================================
 121 +
 122 +The ralink fast ethernet embedded switch can be found on Ralink and Mediatek
 123 +SoCs (RT3x5x, rt5350, mt76x8).
 124 +
 125 +Required properties:
 126 +- compatible: Should be "ralink,rt3050-esw"
 127 +- reg: Address and length of the register set for the device
 128 +- interrupt-parent: Should be the phandle for the interrupt controller
 129 +  that services interrupts for this device
 130 +- interrupts: Should contain the embedded switches interrupt
 131 +- resets: Should contain the embedded switches resets
 132 +- reset-names: Should contain the reset names "esw"
 133 +
 134 +Optional properties:
 135 +- ralink,portmap: can be used to choose if the default switch setup is
 136 +  llllw or wllll
 137 +- ralink,led_polarity: override the active high/low settings of the leds
 138 +
 139 +Example:
 140 +
 141 +esw@10110000 {
 142 +       compatible = "ralink,rt3050-esw";
 143 +       reg = <0x10110000 8000>;
 144 +
 145 +       resets = <&rstctrl 23>;
 146 +       reset-names = "esw";
 147 +
 148 +       interrupt-parent = <&intc>;
 149 +       interrupts = <17>;
 150 +};